#ifndef RADEON_CS_WRAPPER_H
#define RADEON_CS_WRAPPER_H
-#ifndef RADEON_PARAM_DEVICE_ID
-#define RADEON_PARAM_DEVICE_ID 17
-#endif
-
#ifdef HAVE_LIBDRM_RADEON
#include "radeon_bo.h"
#define RADEON_GEM_DOMAIN_GTT 0x2 // GTT or cache flushed
#define RADEON_GEM_DOMAIN_VRAM 0x4 // VRAM domain
+#define RADEON_TILING_MACRO 0x1
+#define RADEON_TILING_MICRO 0x2
+#define RADEON_TILING_SWAP 0x4
+#define RADEON_TILING_SURFACE 0x8 /* this object requires a surface
+ * when mapped - i.e. front buffer */
+
/* to be used to build locally in mesa with no libdrm bits */
#include "../radeon/radeon_bo_drm.h"
#include "../radeon/radeon_cs_drm.h"
#define DRM_RADEON_GEM_INFO 0x1c
struct drm_radeon_gem_info {
- uint64_t gart_start;
uint64_t gart_size;
- uint64_t vram_start;
uint64_t vram_size;
uint64_t vram_visible;
};
+
+struct drm_radeon_info {
+ uint32_t request;
+ uint32_t pad;
+ uint32_t value;
+};
+#endif
+
+#ifndef RADEON_PARAM_DEVICE_ID
+#define RADEON_PARAM_DEVICE_ID 16
+#endif
+
+#ifndef RADEON_INFO_DEVICE_ID
+#define RADEON_INFO_DEVICE_ID 0
+#endif
+#ifndef RADEON_INFO_NUM_GB_PIPES
+#define RADEON_INFO_NUM_GB_PIPES 0
+#endif
+
+#ifndef DRM_RADEON_INFO
+#define DRM_RADEON_INFO 0x1
#endif
-uint32_t radeon_gem_bo_name(struct radeon_bo *dummy)
+static inline uint32_t radeon_gem_name_bo(struct radeon_bo *dummy)
{
return 0;
}