dri/nouveau: nv04: Use rules-ng-ng headers

[mesa.git] / src / mesa / drivers / dri / radeon / radeon_chipset.h

diff --git a/src/mesa/drivers/dri/radeon/radeon_chipset.h b/src/mesa/drivers/dri/radeon/radeon_chipset.h
index 0a6a2df35b811e95ada41a75242a7a494255a7f8..61106fbc43f5b6777a9ecae5baa09d802270c75d 100644 (file)
--- a/src/mesa/drivers/dri/radeon/radeon_chipset.h
+++ b/src/mesa/drivers/dri/radeon/radeon_chipset.h
@@ -12,6 +12,7 @@
 #define PCI_CHIP_RV380_3150            0x3150
 #define PCI_CHIP_RV380_3152            0x3152
 #define PCI_CHIP_RV380_3154            0x3154
+#define PCI_CHIP_RV380_3155            0x3155
 #define PCI_CHIP_RV380_3E50            0x3E50
 #define PCI_CHIP_RV380_3E54            0x3E54
 #define PCI_CHIP_RS100_4136            0x4136
@@ -335,9 +336,17 @@
 #define PCI_CHIP_RS780_9615             0x9615
 #define PCI_CHIP_RS780_9616             0x9616
 
+#define PCI_CHIP_RS880_9710             0x9710
+#define PCI_CHIP_RS880_9711             0x9711
+#define PCI_CHIP_RS880_9712             0x9712
+#define PCI_CHIP_RS880_9713             0x9713
+#define PCI_CHIP_RS880_9714             0x9714
+#define PCI_CHIP_RS880_9715             0x9715
+
 #define PCI_CHIP_RV770_9440             0x9440
 #define PCI_CHIP_RV770_9441             0x9441
 #define PCI_CHIP_RV770_9442             0x9442
+#define PCI_CHIP_RV770_9443             0x9443
 #define PCI_CHIP_RV770_9444             0x9444
 #define PCI_CHIP_RV770_9446             0x9446
 #define PCI_CHIP_RV770_944A             0x944A
@@ -349,6 +358,7 @@
 #define PCI_CHIP_RV770_9456             0x9456
 #define PCI_CHIP_RV770_945A             0x945A
 #define PCI_CHIP_RV770_945B             0x945B
+#define PCI_CHIP_RV770_945E             0x945E
 #define PCI_CHIP_RV790_9460             0x9460
 #define PCI_CHIP_RV790_9462             0x9462
 #define PCI_CHIP_RV770_946A             0x946A
@@ -356,11 +366,15 @@
 #define PCI_CHIP_RV770_947A             0x947A
 #define PCI_CHIP_RV770_947B             0x947B
 
+#define PCI_CHIP_RV730_9480             0x9480
 #define PCI_CHIP_RV730_9487             0x9487
+#define PCI_CHIP_RV730_9488             0x9488
 #define PCI_CHIP_RV730_9489             0x9489
+#define PCI_CHIP_RV730_948A             0x948A
 #define PCI_CHIP_RV730_948F             0x948F
 #define PCI_CHIP_RV730_9490             0x9490
 #define PCI_CHIP_RV730_9491             0x9491
+#define PCI_CHIP_RV730_9495             0x9495
 #define PCI_CHIP_RV730_9498             0x9498
 #define PCI_CHIP_RV730_949C             0x949C
 #define PCI_CHIP_RV730_949E             0x949E
@@ -374,12 +388,57 @@
 #define PCI_CHIP_RV710_9552             0x9552
 #define PCI_CHIP_RV710_9553             0x9553
 #define PCI_CHIP_RV710_9555             0x9555
+#define PCI_CHIP_RV710_9557             0x9557
+#define PCI_CHIP_RV710_955F             0x955F
 
 #define PCI_CHIP_RV740_94A0             0x94A0
 #define PCI_CHIP_RV740_94A1             0x94A1
+#define PCI_CHIP_RV740_94A3             0x94A3
 #define PCI_CHIP_RV740_94B1             0x94B1
 #define PCI_CHIP_RV740_94B3             0x94B3
+#define PCI_CHIP_RV740_94B4             0x94B4
 #define PCI_CHIP_RV740_94B5             0x94B5
+#define PCI_CHIP_RV740_94B9             0x94B9
+
+#define PCI_CHIP_CEDAR_68E0             0x68E0
+#define PCI_CHIP_CEDAR_68E1             0x68E1
+#define PCI_CHIP_CEDAR_68E4             0x68E4
+#define PCI_CHIP_CEDAR_68E5             0x68E5
+#define PCI_CHIP_CEDAR_68E8             0x68E8
+#define PCI_CHIP_CEDAR_68E9             0x68E9
+#define PCI_CHIP_CEDAR_68F1             0x68F1
+#define PCI_CHIP_CEDAR_68F8             0x68F8
+#define PCI_CHIP_CEDAR_68F9             0x68F9
+#define PCI_CHIP_CEDAR_68FE             0x68FE
+
+#define PCI_CHIP_REDWOOD_68C0           0x68C0
+#define PCI_CHIP_REDWOOD_68C1           0x68C1
+#define PCI_CHIP_REDWOOD_68C8           0x68C8
+#define PCI_CHIP_REDWOOD_68C9           0x68C9
+#define PCI_CHIP_REDWOOD_68D8           0x68D8
+#define PCI_CHIP_REDWOOD_68D9           0x68D9
+#define PCI_CHIP_REDWOOD_68DA           0x68DA
+#define PCI_CHIP_REDWOOD_68DE           0x68DE
+
+#define PCI_CHIP_JUNIPER_68A0           0x68A0
+#define PCI_CHIP_JUNIPER_68A1           0x68A1
+#define PCI_CHIP_JUNIPER_68A8           0x68A8
+#define PCI_CHIP_JUNIPER_68A9           0x68A9
+#define PCI_CHIP_JUNIPER_68B0           0x68B0
+#define PCI_CHIP_JUNIPER_68B8           0x68B8
+#define PCI_CHIP_JUNIPER_68B9           0x68B9
+#define PCI_CHIP_JUNIPER_68BE           0x68BE
+
+#define PCI_CHIP_CYPRESS_6880           0x6880
+#define PCI_CHIP_CYPRESS_6888           0x6888
+#define PCI_CHIP_CYPRESS_6889           0x6889
+#define PCI_CHIP_CYPRESS_688A           0x688A
+#define PCI_CHIP_CYPRESS_6898           0x6898
+#define PCI_CHIP_CYPRESS_6899           0x6899
+#define PCI_CHIP_CYPRESS_689E           0x689E
+
+#define PCI_CHIP_HEMLOCK_689C           0x689C
+#define PCI_CHIP_HEMLOCK_689D           0x689D
 
 enum {
    CHIP_FAMILY_R100,
@@ -395,9 +454,9 @@ enum {
    CHIP_FAMILY_R350,
    CHIP_FAMILY_RV350,
    CHIP_FAMILY_RV380,
+   CHIP_FAMILY_RS400,
    CHIP_FAMILY_R420,
    CHIP_FAMILY_RV410,
-   CHIP_FAMILY_RS400,
    CHIP_FAMILY_RS600,
    CHIP_FAMILY_RS690,
    CHIP_FAMILY_RS740,
@@ -414,10 +473,16 @@ enum {
    CHIP_FAMILY_RV620,
    CHIP_FAMILY_RV635,
    CHIP_FAMILY_RS780,
+   CHIP_FAMILY_RS880,
    CHIP_FAMILY_RV770,
    CHIP_FAMILY_RV730,
    CHIP_FAMILY_RV710,
    CHIP_FAMILY_RV740,
+   CHIP_FAMILY_CEDAR,
+   CHIP_FAMILY_REDWOOD,
+   CHIP_FAMILY_JUNIPER,
+   CHIP_FAMILY_CYPRESS,
+   CHIP_FAMILY_HEMLOCK,
    CHIP_FAMILY_LAST
 };