i965/miptree: Replace is_lossless_compressed with mt->aux_usage checks

[mesa.git] / src / mesa / drivers / dri / radeon / radeon_cmdbuf.h

diff --git a/src/mesa/drivers/dri/radeon/radeon_cmdbuf.h b/src/mesa/drivers/dri/radeon/radeon_cmdbuf.h
index 5f454cbd0017b15b2df141989f4b4e6896615f9f..da179a7e367df12d61b17aef051fd455cfdfbb3b 100644 (file)
--- a/src/mesa/drivers/dri/radeon/radeon_cmdbuf.h
+++ b/src/mesa/drivers/dri/radeon/radeon_cmdbuf.h
@@ -31,7 +31,7 @@ void rcommonBeginBatch(radeonContextPtr rmesa,
  * Prepare writing n dwords to the command buffer.  Does not cause automatic
  * state emits.
  */
-#define BEGIN_BATCH(n) rcommonBeginBatch(b_l_rmesa, n, __FILE__, __FUNCTION__, __LINE__)
+#define BEGIN_BATCH(n) rcommonBeginBatch(b_l_rmesa, n, __FILE__, __func__, __LINE__)
 
 /**
  * Write one dword to the command buffer.
@@ -49,7 +49,7 @@ void rcommonBeginBatch(radeonContextPtr rmesa,
        int  __offset = (offset);                               \
         if (0 && __offset) {                                   \
             fprintf(stderr, "(%s:%s:%d) offset : %d\n",                \
-            __FILE__, __FUNCTION__, __LINE__, __offset);       \
+            __FILE__, __func__, __LINE__, __offset);   \
         }                                                      \
         radeon_cs_write_dword(b_l_rmesa->cmdbuf.cs, __offset); \
         radeon_cs_write_reloc(b_l_rmesa->cmdbuf.cs,            \
@@ -72,7 +72,7 @@ void rcommonBeginBatch(radeonContextPtr rmesa,
  */
 #define END_BATCH() \
        do { \
-        radeon_cs_end(b_l_rmesa->cmdbuf.cs, __FILE__, __FUNCTION__, __LINE__);\
+        radeon_cs_end(b_l_rmesa->cmdbuf.cs, __FILE__, __func__, __LINE__);\
        } while(0)
 
 /**