radeon: fixup some issue with fbos and sw fallbacks

[mesa.git] / src / mesa / drivers / dri / radeon / radeon_common_context.h

diff --git a/src/mesa/drivers/dri/radeon/radeon_common_context.h b/src/mesa/drivers/dri/radeon/radeon_common_context.h
index 7618b3482f30ca80eac711ac2dcb044218ac1ccc..0ce72c919851b2c46368b0628112f2e8d061f1eb 100644 (file)
--- a/src/mesa/drivers/dri/radeon/radeon_common_context.h
+++ b/src/mesa/drivers/dri/radeon/radeon_common_context.h
@@ -39,6 +39,8 @@ typedef struct radeon_context *radeonContextPtr;
 #define RADEON_FALLBACK_BLEND_FUNC     0x0020
 #define RADEON_FALLBACK_DISABLE        0x0040
 #define RADEON_FALLBACK_BORDER_MODE    0x0080
+#define RADEON_FALLBACK_DEPTH_BUFFER   0x0100
+#define RADEON_FALLBACK_STENCIL_BUFFER  0x0200
 
 #define R200_FALLBACK_TEXTURE           0x01
 #define R200_FALLBACK_DRAW_BUFFER       0x02
@@ -68,6 +70,8 @@ typedef struct radeon_context *radeonContextPtr;
 #include "tnl_dd/t_dd_vertex.h"
 #undef TAG
 
+#define RADEON_RB_CLASS 0xdeadbeef
+
 struct radeon_renderbuffer
 {
        struct gl_renderbuffer base;
@@ -78,21 +82,47 @@ struct radeon_renderbuffer
        unsigned int width;
        unsigned int height;
 
+       uint32_t draw_offset; /* FBO */
        /* boo Xorg 6.8.2 compat */
        int has_surface;
 
+       GLuint pf_pending;  /**< sequence number of pending flip */
+       GLuint vbl_pending;   /**< vblank sequence number of pending flip */
        __DRIdrawablePrivate *dPriv;
 };
 
+struct radeon_framebuffer
+{
+       struct gl_framebuffer base;
+
+       struct radeon_renderbuffer *color_rb[2];
+
+       GLuint vbl_waited;
+
+       /* buffer swap */
+       int64_t swap_ust;
+       int64_t swap_missed_ust;
+
+       GLuint swap_count;
+       GLuint swap_missed_count;
+
+       /* Drawable page flipping state */
+       GLboolean pf_active;
+       GLint pf_current_page;
+       GLint pf_num_pages;
+
+};
+
+ 
 struct radeon_colorbuffer_state {
        GLuint clear;
        int roundEnable;
        struct radeon_renderbuffer *rrb;
+       uint32_t draw_offset; /* offset into color renderbuffer - FBOs */
 };
 
 struct radeon_depthbuffer_state {
        GLuint clear;
-       GLfloat scale;
        struct radeon_renderbuffer *rrb;
 };
 
@@ -106,7 +136,6 @@ struct radeon_scissor_state {
 };
 
 struct radeon_stencilbuffer_state {
-       GLboolean hwBuffer;
        GLuint clear;           /* rb3d_stencilrefmask value */
 };
 
@@ -375,9 +404,6 @@ struct radeon_context {
   
    /* Texture object bookkeeping
     */
-   unsigned              nr_heaps;
-   driTexHeap          * texture_heaps[ RADEON_NR_TEX_HEAPS ];
-   driTextureObject      swapped;
    int                   texture_depth;
    float                 initialMaxAnisotropy;
 
@@ -390,9 +416,6 @@ struct radeon_context {
    GLuint NewGLState;
    DECLARE_RENDERINPUTS(tnl_index_bitset);     /* index of bits for last tnl_install_attrs */
 
-   /* Page flipping */
-   GLuint doPageFlip;
-
    /* Drawable, cliprect and scissor information */
    GLuint numClipRects;        /* Cliprects for the draw buffer */
    drm_clip_rect_t *pClipRects;
@@ -409,13 +432,6 @@ struct radeon_context {
    GLuint irqsEmitted;
    drm_radeon_irq_wait_t iw;
 
-   /* buffer swap */
-   int64_t swap_ust;
-   int64_t swap_missed_ust;
-
-   GLuint swap_count;
-   GLuint swap_missed_count;
-
    /* Derived state - for r300 only */
    struct radeon_state state;
 
@@ -425,15 +441,33 @@ struct radeon_context {
    driOptionCache optionCache;
 
    struct radeon_cmdbuf cmdbuf;
+       
+  drm_clip_rect_t fboRect;
+  GLboolean constant_cliprect; /* use for FBO or DRI2 rendering */
+  GLboolean front_cliprects;
+
+  struct {
+      struct gl_fragment_program *bitmap_fp;
+      struct gl_vertex_program *passthrough_vp;
+
+      struct gl_fragment_program *saved_fp;
+      GLboolean saved_fp_enable;
+      struct gl_vertex_program *saved_vp;
+      GLboolean saved_vp_enable;
+
+      GLint saved_vp_x, saved_vp_y;
+      GLsizei saved_vp_width, saved_vp_height;
+      GLenum saved_matrix_mode;
+   } meta;
 
    struct {
           void (*get_lock)(radeonContextPtr radeon);
           void (*update_viewport_offset)(GLcontext *ctx);
-          void (*update_draw_buffer)(GLcontext *ctx);
           void (*emit_cs_header)(struct radeon_cs *cs, radeonContextPtr rmesa);
           void (*swtcl_flush)(GLcontext *ctx, uint32_t offset);
           void (*pre_emit_atoms)(radeonContextPtr rmesa);
           void (*pre_emit_state)(radeonContextPtr rmesa);
+          void (*fallback)(GLcontext *ctx, GLuint bit, GLboolean mode);
    } vtbl;
 };