radeon/r200/r300: Fix swtcl prediction to work after primitie change.

[mesa.git] / src / mesa / drivers / dri / radeon / radeon_common_context.h

diff --git a/src/mesa/drivers/dri/radeon/radeon_common_context.h b/src/mesa/drivers/dri/radeon/radeon_common_context.h
index ee46c1f81a668c17fc452ef43fc9a94a87df981e..427eb946ffa8316d0754567f3d33f3efb1aec55b 100644 (file)
--- a/src/mesa/drivers/dri/radeon/radeon_common_context.h
+++ b/src/mesa/drivers/dri/radeon/radeon_common_context.h
@@ -18,6 +18,22 @@ struct radeon_context;
 
 #include "radeon_bocs_wrapper.h"
 
+/* From http://gcc. gnu.org/onlinedocs/gcc-3.2.3/gcc/Variadic-Macros.html .
+   I suppose we could inline this and use macro to fetch out __LINE__ and stuff in case we run into trouble
+   with other compilers ... GLUE!
+*/
+#define WARN_ONCE(a, ...)      { \
+       static int warn##__LINE__=1; \
+       if(warn##__LINE__){ \
+               fprintf(stderr, "*********************************WARN_ONCE*********************************\n"); \
+               fprintf(stderr, "File %s function %s line %d\n", \
+                       __FILE__, __FUNCTION__, __LINE__); \
+               fprintf(stderr,  a, ## __VA_ARGS__);\
+               fprintf(stderr, "***************************************************************************\n"); \
+               warn##__LINE__=0;\
+               } \
+       }
+
 /* This union is used to avoid warnings/miscompilation
    with float to uint32_t casts due to strict-aliasing */
 typedef union { GLfloat f; uint32_t ui32; } float_ui32_type;
@@ -163,6 +179,7 @@ struct radeon_hw_state {
        /* Head of the linked list of state atoms. */
        struct radeon_state_atom atomlist;
        int max_state_size;     /* Number of bytes necessary for a full state emit. */
+       int max_post_flush_size; /* Number of bytes necessary for post flushing emits */
        GLboolean is_dirty, all_dirty;
 };
 
@@ -254,6 +271,17 @@ static INLINE radeonTexObj* radeon_tex_obj(struct gl_texture_object *texObj)
        return (radeonTexObj*)texObj;
 }
 
+/* occlusion query */
+struct radeon_query_object {
+       struct gl_query_object Base;
+       struct radeon_bo *bo;
+       int curr_offset;
+       GLboolean emitted_begin;
+
+       /* Double linked list of not flushed query objects */
+       struct radeon_query_object *prev, *next;
+};
+
 /* Need refcounting on dma buffers:
  */
 struct radeon_dma_buffer {
@@ -269,14 +297,25 @@ struct radeon_aos {
        int count; /** Number of vertices */
 };
 
+#define DMA_BO_FREE_TIME 100
+
+struct radeon_dma_bo {
+  struct radeon_dma_bo *next, *prev;
+  struct radeon_bo *bo;
+  int expire_counter;
+};
+
 struct radeon_dma {
         /* Active dma region.  Allocations for vertices and retained
          * regions come from here.  Also used for emitting random vertices,
          * these may be flushed by calling flush_current();
          */
-        struct radeon_bo *current; /** Buffer that DMA memory is allocated from */
-        int current_used; /** Number of bytes allocated and forgotten about */
-        int current_vertexptr; /** End of active vertex region */
+       struct radeon_dma_bo free;
+       struct radeon_dma_bo wait;
+       struct radeon_dma_bo reserved;
+        size_t current_used; /** Number of bytes allocated and forgotten about */
+        size_t current_vertexptr; /** End of active vertex region */
+        size_t minimum_size;
 
         /**
          * If current_vertexptr != current_used then flush must be non-zero.
@@ -284,12 +323,6 @@ struct radeon_dma {
          * performed.
          */
         void (*flush) (GLcontext *);
-
-        /* Number of "in-flight" DMA buffers, i.e. the number of buffers
-         * for which a DISCARD command is currently queued in the command buffer
-.
-         */
-        GLuint nr_released_bufs;
 };
 
 /* radeon_swtcl.c
@@ -309,6 +342,7 @@ struct radeon_swtcl_info {
        struct tnl_attr_map vertex_attrs[VERT_ATTRIB_MAX];
        GLuint vertex_attr_count;
 
+       GLuint emit_prediction;
 };
 
 #define RADEON_MAX_AOS_ARRAYS          16
@@ -321,7 +355,8 @@ struct radeon_tcl_info {
 
 struct radeon_ioctl {
        GLuint vertex_offset;
-        struct radeon_bo *bo;
+       GLuint vertex_max;
+       struct radeon_bo *bo;
        GLuint vertex_size;
 };
 
@@ -499,6 +534,12 @@ struct radeon_context {
 
    struct dri_metaops meta;
 
+   struct {
+       struct radeon_query_object *current;
+       struct radeon_query_object not_flushed_head;
+       struct radeon_state_atom queryobj;
+   } query;
+
    struct {
           void (*get_lock)(radeonContextPtr radeon);
           void (*update_viewport_offset)(GLcontext *ctx);
@@ -508,6 +549,8 @@ struct radeon_context {
           void (*pre_emit_state)(radeonContextPtr rmesa);
           void (*fallback)(GLcontext *ctx, GLuint bit, GLboolean mode);
           void (*free_context)(GLcontext *ctx);
+          void (*emit_query_finish)(radeonContextPtr radeon);
+          void (*update_scissor)(GLcontext *ctx);
    } vtbl;
 };
 
@@ -523,7 +566,6 @@ static inline __DRIdrawablePrivate* radeon_get_readable(radeonContextPtr radeon)
        return radeon->dri.context->driReadablePriv;
 }
 
-
 /**
  * This function takes a float and packs it into a uint32_t
  */