radeon: emit scissor when using cs path

[mesa.git] / src / mesa / drivers / dri / radeon / radeon_common_context.h

diff --git a/src/mesa/drivers/dri/radeon/radeon_common_context.h b/src/mesa/drivers/dri/radeon/radeon_common_context.h
index 612cc97f2554c732ccd2e1fe1c418346c50e1d0d..d32e5af5441785bb1f8104a604e12f0a51ec5c66 100644 (file)
--- a/src/mesa/drivers/dri/radeon/radeon_common_context.h
+++ b/src/mesa/drivers/dri/radeon/radeon_common_context.h
@@ -13,6 +13,10 @@
 #include "dri_util.h"
 #include "tnl/t_vertex.h"
 
+struct radeon_context;
+
+#include "radeon_bocs_wrapper.h"
+
 /* This union is used to avoid warnings/miscompilation
    with float to uint32_t casts due to strict-aliasing */
 typedef union { GLfloat f; uint32_t ui32; } float_ui32_type;
@@ -123,7 +127,6 @@ struct radeon_colorbuffer_state {
 
 struct radeon_depthbuffer_state {
        GLuint clear;
-       GLfloat scale;
        struct radeon_renderbuffer *rrb;
 };
 
@@ -137,7 +140,6 @@ struct radeon_scissor_state {
 };
 
 struct radeon_stencilbuffer_state {
-       GLboolean hwBuffer;
        GLuint clear;           /* rb3d_stencilrefmask value */
 };
 
@@ -292,6 +294,14 @@ struct radeon_swtcl_info {
 
 };
 
+#define RADEON_MAX_AOS_ARRAYS          16
+struct radeon_tcl_info {
+       struct radeon_aos aos[RADEON_MAX_AOS_ARRAYS];
+       GLuint aos_count;
+       struct radeon_bo *elt_dma_bo; /** Buffer object that contains element indices */
+       int elt_dma_offset; /** Offset into this buffer object, in bytes */
+};
+
 struct radeon_ioctl {
        GLuint vertex_offset;
         struct radeon_bo *bo;
@@ -369,7 +379,6 @@ struct radeon_dri_mirror {
 #define DEBUG_MEMORY    0x4000
 
 
-
 typedef void (*radeon_tri_func) (radeonContextPtr,
                                 radeonVertex *,
                                 radeonVertex *, radeonVertex *);
@@ -379,11 +388,15 @@ typedef void (*radeon_line_func) (radeonContextPtr,
 
 typedef void (*radeon_point_func) (radeonContextPtr, radeonVertex *);
 
+#define RADEON_MAX_BOS 24
 struct radeon_state {
        struct radeon_colorbuffer_state color;
        struct radeon_depthbuffer_state depth;
        struct radeon_scissor_state scissor;
        struct radeon_stencilbuffer_state stencil;
+
+       struct radeon_cs_space_check bos[RADEON_MAX_BOS];
+       int validated_bo_count;
 };
 
 /**
@@ -438,15 +451,30 @@ struct radeon_context {
    struct radeon_state state;
 
    struct radeon_swtcl_info swtcl;
+   struct radeon_tcl_info tcl;
    /* Configuration cache
     */
    driOptionCache optionCache;
 
    struct radeon_cmdbuf cmdbuf;
        
-       drm_clip_rect_t fboRect;
-       GLboolean constant_cliprect; /* use for FBO or DRI2 rendering */
-       GLboolean front_cliprects;
+  drm_clip_rect_t fboRect;
+  GLboolean constant_cliprect; /* use for FBO or DRI2 rendering */
+  GLboolean front_cliprects;
+
+  struct {
+      struct gl_fragment_program *bitmap_fp;
+      struct gl_vertex_program *passthrough_vp;
+
+      struct gl_fragment_program *saved_fp;
+      GLboolean saved_fp_enable;
+      struct gl_vertex_program *saved_vp;
+      GLboolean saved_vp_enable;
+
+      GLint saved_vp_x, saved_vp_y;
+      GLsizei saved_vp_width, saved_vp_height;
+      GLenum saved_matrix_mode;
+   } meta;
 
    struct {
           void (*get_lock)(radeonContextPtr radeon);
@@ -456,6 +484,7 @@ struct radeon_context {
           void (*pre_emit_atoms)(radeonContextPtr rmesa);
           void (*pre_emit_state)(radeonContextPtr rmesa);
           void (*fallback)(GLcontext *ctx, GLuint bit, GLboolean mode);
+          void (*free_context)(GLcontext *ctx);
    } vtbl;
 };
 
@@ -518,6 +547,7 @@ void radeon_update_renderbuffers(__DRIcontext *context, __DRIdrawable *drawable)
 GLboolean radeonMakeCurrent(__DRIcontextPrivate * driContextPriv,
                            __DRIdrawablePrivate * driDrawPriv,
                            __DRIdrawablePrivate * driReadPriv);
+extern void radeonDestroyContext(__DRIcontextPrivate * driContextPriv);
 
 /* ================================================================
  * Debugging: