#include "radeon_vtxfmt.h"
#include "radeon_maos.h"
-#define DRIVER_DATE "20030328"
+#define DRIVER_DATE "20041207"
#include "vblank.h"
#include "utils.h"
"GL_ARB_texture_compression",
"GL_ARB_texture_env_add",
"GL_ARB_texture_env_combine",
+ "GL_ARB_texture_env_crossbar",
"GL_ARB_texture_env_dot3",
"GL_ARB_texture_mirrored_repeat",
"GL_EXT_blend_logic_op",
"GL_EXT_blend_subtract",
"GL_EXT_secondary_color",
+ "GL_EXT_stencil_wrap",
"GL_EXT_texture_edge_clamp",
"GL_EXT_texture_env_combine",
"GL_EXT_texture_env_dot3",
{ "dri", DEBUG_DRI },
{ "dma", DEBUG_DMA },
{ "san", DEBUG_SANITY },
+ { "sync", DEBUG_SYNC },
{ NULL, 0 }
};
static int
-get_ust_nop( uint64_t * ust )
+get_ust_nop( int64_t * ust )
{
*ust = 1;
return 0;
* the default textures.
*/
driParseConfigFiles (&rmesa->optionCache, &screen->optionCache,
- screen->driScreen->myNum, "r200");
+ screen->driScreen->myNum, "radeon");
rmesa->initialMaxAnisotropy = driQueryOptionf(&rmesa->optionCache,
"def_max_anisotropy");
+ if ( driQueryOptionb( &rmesa->optionCache, "hyperz" ) ) {
+ if ( sPriv->drmMinor < 13 )
+ fprintf( stderr, "DRM version 1.%d too old to support HyperZ, "
+ "disabling.\n",sPriv->drmMinor );
+ else
+ rmesa->using_hyperz = GL_TRUE;
+ }
+
/* Init default driver functions then plug in our Radeon-specific functions
* (the texture functions are especially important)
*/
rmesa->dri.drmMinor = sPriv->drmMinor;
rmesa->radeonScreen = screen;
- rmesa->sarea = (RADEONSAREAPrivPtr)((GLubyte *)sPriv->pSAREA +
+ rmesa->sarea = (drm_radeon_sarea_t *)((GLubyte *)sPriv->pSAREA +
screen->sarea_priv_offset);
screen->texSize[i],
12,
RADEON_NR_TEX_REGIONS,
- rmesa->sarea->texList[i],
- & rmesa->sarea->texAge[i],
+ (drmTextureRegionPtr)rmesa->sarea->tex_list[i],
+ & rmesa->sarea->tex_age[i],
& rmesa->swapped,
sizeof( radeonTexObj ),
(destroy_texture_object_t *) radeonDestroyTexObj );
DRI_CONF_TEXTURE_DEPTH_32 : DRI_CONF_TEXTURE_DEPTH_16;
rmesa->swtcl.RenderIndex = ~0;
- rmesa->lost_context = 1;
+ rmesa->hw.all_dirty = GL_TRUE;
/* Set the maximum texture size small enough that we can guarentee that
* all texture units can bind a maximal texture and have them both in
rmesa->boxes = 0;
- /* formerly in radeon_tex.c */
- driInitTextureObjects( ctx, & rmesa->swapped,
- DRI_TEXMGR_DO_TEXTURE_1D
- | DRI_TEXMGR_DO_TEXTURE_2D );
-
/* Initialize the software rasterizer and helper modules.
*/
_swrast_CreateContext( ctx );
_tnl_isolate_materials( ctx, GL_TRUE );
- /* Configure swrast to match hardware characteristics:
+ /* Configure swrast and T&L to match hardware characteristics:
*/
_swrast_allow_pixel_fog( ctx, GL_FALSE );
_swrast_allow_vertex_fog( ctx, GL_TRUE );
+ _tnl_allow_pixel_fog( ctx, GL_FALSE );
+ _tnl_allow_vertex_fog( ctx, GL_TRUE );
_math_matrix_ctr( &rmesa->TexGenMatrix[0] );
_math_matrix_set_identity( &rmesa->tmpmat );
driInitExtensions( ctx, card_extensions, GL_TRUE );
+ if (rmesa->glCtx->Mesa_DXTn) {
+ _mesa_enable_extension( ctx, "GL_EXT_texture_compression_s3tc" );
+ _mesa_enable_extension( ctx, "GL_S3_s3tc" );
+ }
+ else if (driQueryOptionb (&rmesa->optionCache, "force_s3tc_enable")) {
+ _mesa_enable_extension( ctx, "GL_EXT_texture_compression_s3tc" );
+ }
if (rmesa->dri.drmMinor >= 9)
_mesa_enable_extension( ctx, "GL_NV_texture_rectangle");
rmesa->vblank_flags = (rmesa->radeonScreen->irq != 0)
? driGetDefaultVBlankFlags(&rmesa->optionCache) : VBLANK_FLAG_NO_IRQ;
-#ifndef _SOLO
+
rmesa->get_ust = (PFNGLXGETUSTPROC) glXGetProcAddress( (const GLubyte *) "__glXGetUST" );
if ( rmesa->get_ust == NULL ) {
rmesa->get_ust = get_ust_nop;
}
-#else
- rmesa->get_ust = get_ust_nop;
-#endif
-
(*rmesa->get_ust)( & rmesa->swap_ust );
tcl_mode = driQueryOptioni(&rmesa->optionCache, "tcl_mode");
if (driQueryOptionb(&rmesa->optionCache, "no_rast")) {
fprintf(stderr, "disabling 3D acceleration\n");
- FALLBACK(rmesa, RADEON_FALLBACK_DISABLE, 1);
+ FALLBACK(rmesa, RADEON_FALLBACK_DISABLE, 1);
} else if (tcl_mode == DRI_CONF_TCL_SW ||
!(rmesa->radeonScreen->chipset & RADEON_CHIPSET_TCL)) {
- rmesa->radeonScreen->chipset &= ~RADEON_CHIPSET_TCL;
- fprintf(stderr, "disabling TCL support\n");
- TCL_FALLBACK(rmesa->glCtx, RADEON_TCL_FALLBACK_TCL_DISABLE, 1);
+ if (rmesa->radeonScreen->chipset & RADEON_CHIPSET_TCL) {
+ rmesa->radeonScreen->chipset &= ~RADEON_CHIPSET_TCL;
+ fprintf(stderr, "Disabling HW TCL support\n");
+ }
+ TCL_FALLBACK(rmesa->glCtx, RADEON_TCL_FALLBACK_TCL_DISABLE, 1);
}
if (rmesa->radeonScreen->chipset & RADEON_CHIPSET_TCL) {
(radeonContextPtr) driContextPriv->driverPrivate;
if (RADEON_DEBUG & DEBUG_DRI)
- fprintf(stderr, "%s ctx %p\n", __FUNCTION__, newCtx->glCtx);
+ fprintf(stderr, "%s ctx %p\n", __FUNCTION__, (void *) newCtx->glCtx);
if ( newCtx->dri.drawable != driDrawPriv ) {
driDrawableInitVBlank( driDrawPriv, newCtx->vblank_flags );
(GLframebuffer *) driDrawPriv->driverPrivate,
(GLframebuffer *) driReadPriv->driverPrivate );
- if ( !newCtx->glCtx->Viewport.Width ) {
- _mesa_set_viewport( newCtx->glCtx, 0, 0,
- driDrawPriv->w, driDrawPriv->h );
- }
-
if (newCtx->vb.enabled)
radeonVtxfmtMakeCurrent( newCtx->glCtx );
radeonContextPtr rmesa = (radeonContextPtr) driContextPriv->driverPrivate;
if (RADEON_DEBUG & DEBUG_DRI)
- fprintf(stderr, "%s ctx %p\n", __FUNCTION__, rmesa->glCtx);
+ fprintf(stderr, "%s ctx %p\n", __FUNCTION__, (void *) rmesa->glCtx);
return GL_TRUE;
}