* Authors:
* Kevin E. Martin <martin@valinux.com>
* Gareth Hughes <gareth@valinux.com>
- * Keith Whitwell <keith@tungstengraphics.com>
+ * Keith Whitwell <keithw@vmware.com>
*/
#include <stdbool.h>
#include "main/api_arrayelt.h"
#include "main/api_exec.h"
#include "main/context.h"
-#include "main/simple_list.h"
+#include "util/simple_list.h"
#include "main/imports.h"
#include "main/extensions.h"
#include "main/version.h"
NULL,
};
-static void r100_get_lock(radeonContextPtr radeon)
-{
- r100ContextPtr rmesa = (r100ContextPtr)radeon;
- drm_radeon_sarea_t *sarea = radeon->sarea;
-
- RADEON_STATECHANGE(rmesa, ctx);
- if (rmesa->radeon.sarea->tiling_enabled) {
- rmesa->hw.ctx.cmd[CTX_RB3D_COLORPITCH] |=
- RADEON_COLOR_TILE_ENABLE;
- } else {
- rmesa->hw.ctx.cmd[CTX_RB3D_COLORPITCH] &=
- ~RADEON_COLOR_TILE_ENABLE;
- }
-
- if (sarea->ctx_owner != rmesa->radeon.dri.hwContext) {
- sarea->ctx_owner = rmesa->radeon.dri.hwContext;
- }
-}
-
-static void r100_vtbl_emit_cs_header(struct radeon_cs *cs, radeonContextPtr rmesa)
-{
-}
-
static void r100_vtbl_pre_emit_state(radeonContextPtr radeon)
{
r100ContextPtr rmesa = (r100ContextPtr)radeon;
BATCH_LOCALS(radeon);
struct radeon_query_object *query = radeon->query.current;
- BEGIN_BATCH_NO_AUTOSTATE(4);
+ BEGIN_BATCH(4);
OUT_BATCH(CP_PACKET0(RADEON_RB3D_ZPASS_ADDR, 0));
OUT_BATCH_RELOC(0, query->bo, query->curr_offset, 0, RADEON_GEM_DOMAIN_GTT, 0);
END_BATCH();
static void r100_init_vtbl(radeonContextPtr radeon)
{
- radeon->vtbl.get_lock = r100_get_lock;
- radeon->vtbl.update_viewport_offset = radeonUpdateViewportOffset;
- radeon->vtbl.emit_cs_header = r100_vtbl_emit_cs_header;
radeon->vtbl.swtcl_flush = r100_swtcl_flush;
radeon->vtbl.pre_emit_state = r100_vtbl_pre_emit_state;
radeon->vtbl.fallback = radeonFallback;
radeon->vtbl.check_blit = r100_check_blit;
radeon->vtbl.blit = r100_blit;
radeon->vtbl.is_format_renderable = radeonIsFormatRenderable;
+ radeon->vtbl.revalidate_all_buffers = r100ValidateBuffers;
}
/* Create the device specific context.
unsigned major_version,
unsigned minor_version,
uint32_t flags,
+ bool notify_reset,
unsigned *error,
void *sharedContextPrivate)
{
int i;
int tcl_mode, fthrottle_mode;
- /* Flag filtering is handled in dri2CreateContextAttribs.
- */
- (void) flags;
+ if (flags & ~__DRI_CTX_FLAG_DEBUG) {
+ *error = __DRI_CTX_ERROR_UNKNOWN_FLAG;
+ return false;
+ }
+
+ if (notify_reset) {
+ *error = __DRI_CTX_ERROR_UNKNOWN_ATTRIBUTE;
+ return false;
+ }
assert(glVisual);
assert(driContextPriv);
rmesa->radeon.initialMaxAnisotropy = driQueryOptionf(&rmesa->radeon.optionCache,
"def_max_anisotropy");
- if ( driQueryOptionb( &rmesa->radeon.optionCache, "hyperz" ) ) {
- if ( sPriv->drm_version.minor < 13 )
- fprintf( stderr, "DRM version 1.%d too old to support HyperZ, "
- "disabling.\n", sPriv->drm_version.minor );
- else
- rmesa->using_hyperz = GL_TRUE;
- }
-
- if ( sPriv->drm_version.minor >= 15 )
- rmesa->texmicrotile = GL_TRUE;
+ if (driQueryOptionb(&rmesa->radeon.optionCache, "hyperz"))
+ rmesa->using_hyperz = GL_TRUE;
/* Init default driver functions then plug in our Radeon-specific functions
* (the texture functions are especially important)
radeonInitTextureFuncs( &rmesa->radeon, &functions );
radeonInitQueryObjFunctions(&functions);
- if (!radeonInitContext(&rmesa->radeon, &functions,
+ if (!radeonInitContext(&rmesa->radeon, api, &functions,
glVisual, driContextPriv,
sharedContextPrivate)) {
free(rmesa);
rmesa->radeon.hw.all_dirty = GL_TRUE;
ctx = &rmesa->radeon.glCtx;
+
+ driContextSetFlags(ctx, flags);
+
/* Initialize the software rasterizer and helper modules.
*/
_swrast_CreateContext( ctx );
ctx->Const.MaxTextureUnits = driQueryOptioni (&rmesa->radeon.optionCache,
"texture_units");
- ctx->Const.FragmentProgram.MaxTextureImageUnits = ctx->Const.MaxTextureUnits;
+ ctx->Const.Program[MESA_SHADER_FRAGMENT].MaxTextureImageUnits = ctx->Const.MaxTextureUnits;
ctx->Const.MaxTextureCoordUnits = ctx->Const.MaxTextureUnits;
ctx->Const.MaxCombinedTextureImageUnits = ctx->Const.MaxTextureUnits;
ctx->Const.MaxColorAttachments = 1;
ctx->Const.MaxRenderbufferSize = 2048;
- ctx->ShaderCompilerOptions[MESA_SHADER_VERTEX].PreferDP4 = true;
+ ctx->Const.ShaderCompilerOptions[MESA_SHADER_VERTEX].OptimizeForAOS = true;
/* Install the customized pipeline:
*/
_math_matrix_set_identity( &rmesa->tmpmat[i] );
}
+ ctx->Extensions.ARB_occlusion_query = true;
ctx->Extensions.ARB_texture_border_clamp = true;
+ ctx->Extensions.ARB_texture_cube_map = true;
ctx->Extensions.ARB_texture_env_combine = true;
ctx->Extensions.ARB_texture_env_crossbar = true;
ctx->Extensions.ARB_texture_env_dot3 = true;
ctx->Extensions.ARB_texture_mirror_clamp_to_edge = true;
- ctx->Extensions.EXT_packed_depth_stencil = true;
+ ctx->Extensions.ATI_texture_env_combine3 = true;
+ ctx->Extensions.ATI_texture_mirror_once = true;
ctx->Extensions.EXT_texture_env_dot3 = true;
ctx->Extensions.EXT_texture_filter_anisotropic = true;
ctx->Extensions.EXT_texture_mirror_clamp = true;
- ctx->Extensions.ATI_texture_env_combine3 = true;
- ctx->Extensions.ATI_texture_mirror_once = true;
ctx->Extensions.MESA_ycbcr_texture = true;
+ ctx->Extensions.NV_texture_rectangle = true;
ctx->Extensions.OES_EGL_image = true;
- ctx->Extensions.ARB_texture_cube_map = true;
if (rmesa->radeon.glCtx.Mesa_DXTn) {
ctx->Extensions.EXT_texture_compression_s3tc = true;
ctx->Extensions.ANGLE_texture_compression_dxt = true;
}
- ctx->Extensions.NV_texture_rectangle = true;
- ctx->Extensions.ARB_occlusion_query = true;
-
/* XXX these should really go right after _mesa_init_driver_functions() */
radeon_fbo_init(&rmesa->radeon);
radeonInitSpanFuncs( ctx );