#include "radeon_tcl.h"
#include "radeon_maos.h"
-#define need_GL_ARB_multisample
-#define need_GL_ARB_texture_compression
-#define need_GL_ARB_vertex_buffer_object
#define need_GL_EXT_blend_minmax
#define need_GL_EXT_fog_coord
#define need_GL_EXT_secondary_color
+#define need_GL_EXT_framebuffer_object
#include "extension_helper.h"
#define DRIVER_DATE "20061018"
*/
const struct dri_extension card_extensions[] =
{
- { "GL_ARB_multisample", GL_ARB_multisample_functions },
{ "GL_ARB_multitexture", NULL },
{ "GL_ARB_texture_border_clamp", NULL },
- { "GL_ARB_texture_compression", GL_ARB_texture_compression_functions },
{ "GL_ARB_texture_env_add", NULL },
{ "GL_ARB_texture_env_combine", NULL },
{ "GL_ARB_texture_env_crossbar", NULL },
{ "GL_ARB_texture_env_dot3", NULL },
{ "GL_ARB_texture_mirrored_repeat", NULL },
- { "GL_ARB_vertex_buffer_object", GL_ARB_vertex_buffer_object_functions },
{ "GL_EXT_blend_logic_op", NULL },
{ "GL_EXT_blend_subtract", GL_EXT_blend_minmax_functions },
{ "GL_EXT_fog_coord", GL_EXT_fog_coord_functions },
+ { "GL_EXT_packed_depth_stencil", NULL},
{ "GL_EXT_secondary_color", GL_EXT_secondary_color_functions },
{ "GL_EXT_stencil_wrap", NULL },
{ "GL_EXT_texture_edge_clamp", NULL },
{ NULL, NULL }
};
+const struct dri_extension mm_extensions[] = {
+ { "GL_EXT_framebuffer_object", GL_EXT_framebuffer_object_functions },
+ { NULL, NULL }
+};
+
extern const struct tnl_pipeline_stage _radeon_render_stage;
extern const struct tnl_pipeline_stage _radeon_tcl_stage;
}
if (sarea->ctx_owner != rmesa->radeon.dri.hwContext) {
- int i;
sarea->ctx_owner = rmesa->radeon.dri.hwContext;
- for (i = 0; i < rmesa->radeon.nr_heaps; i++) {
- DRI_AGE_TEXTURES(rmesa->radeon.texture_heaps[i]);
- }
+ if (!radeon->radeonScreen->kernel_mm)
+ radeon_bo_legacy_texture_age(radeon->radeonScreen->bom);
}
}
{
radeon->vtbl.get_lock = r100_get_lock;
radeon->vtbl.update_viewport_offset = radeonUpdateViewportOffset;
- radeon->vtbl.update_draw_buffer = radeonUpdateDrawBuffer;
radeon->vtbl.emit_cs_header = r100_vtbl_emit_cs_header;
radeon->vtbl.swtcl_flush = r100_swtcl_flush;
radeon->vtbl.pre_emit_state = r100_vtbl_pre_emit_state;
+ radeon->vtbl.fallback = radeonFallback;
}
/* Create the device specific context.
return GL_FALSE;
}
- (void) memset( rmesa->radeon.texture_heaps, 0, sizeof( rmesa->radeon.texture_heaps ) );
- make_empty_list( & rmesa->radeon.swapped );
-
-#if 0
- rmesa->radeon.nr_heaps = screen->numTexHeaps;
- for ( i = 0 ; i < rmesa->radeon.nr_heaps ; i++ ) {
- rmesa->radeon.texture_heaps[i] = driCreateTextureHeap( i, rmesa,
- screen->texSize[i],
- 12,
- RADEON_NR_TEX_REGIONS,
- (drmTextureRegionPtr)rmesa->radeon.sarea->tex_list[i],
- & rmesa->radeon.sarea->tex_age[i],
- & rmesa->radeon.swapped,
- sizeof( radeonTexObj ),
- (destroy_texture_object_t *) radeonDestroyTexObj );
-
- driSetTextureSwapCounterLocation( rmesa->radeon.texture_heaps[i],
- & rmesa->c_textureSwaps );
- }
-#endif
rmesa->radeon.texture_depth = driQueryOptioni (&rmesa->radeon.optionCache,
"texture_depth");
if (rmesa->radeon.texture_depth == DRI_CONF_TEXTURE_DEPTH_FB)
i = driQueryOptioni( &rmesa->radeon.optionCache, "allow_large_textures");
- driCalculateMaxTextureLevels( rmesa->radeon.texture_heaps,
- rmesa->radeon.nr_heaps,
- & ctx->Const,
- 4,
- 11, /* max 2D texture size is 2048x2048 */
- 8, /* 256^3 */
- 9, /* \todo: max cube texture size seems to be 512x512(x6) */
- 11, /* max rect texture size is 2048x2048. */
- 12,
- GL_FALSE,
- i );
-
-
ctx->Const.MaxTextureMaxAnisotropy = 16.0;
/* No wide points.
rmesa->boxes = 0;
+ ctx->Const.MaxDrawBuffers = 1;
+
/* Initialize the software rasterizer and helper modules.
*/
_swrast_CreateContext( ctx );
}
driInitExtensions( ctx, card_extensions, GL_TRUE );
+ if (rmesa->radeon.radeonScreen->kernel_mm)
+ driInitExtensions(ctx, mm_extensions, GL_FALSE);
if (rmesa->radeon.radeonScreen->drmSupportsCubeMapsR100)
_mesa_enable_extension( ctx, "GL_ARB_texture_cube_map" );
if (rmesa->radeon.glCtx->Mesa_DXTn) {
_mesa_enable_extension( ctx, "GL_NV_texture_rectangle");
/* XXX these should really go right after _mesa_init_driver_functions() */
+ radeon_fbo_init(&rmesa->radeon);
radeonInitSpanFuncs( ctx );
radeonInitIoctlFuncs( ctx );
radeonInitStateFuncs( ctx );
rmesa->radeon.do_usleeps = (fthrottle_mode == DRI_CONF_FTHROTTLE_USLEEPS);
- (*sPriv->systemTime->getUST)( & rmesa->radeon.swap_ust );
-
#if DO_DEBUG
RADEON_DEBUG = driParseDebugString( getenv( "RADEON_DEBUG" ),
/* Free radeon context resources */
assert(rmesa); /* should never be null */
if ( rmesa ) {
- GLboolean release_texture_heaps;
-
- release_texture_heaps = (rmesa->radeon.glCtx->Shared->RefCount == 1);
_swsetup_DestroyContext( rmesa->radeon.glCtx );
_tnl_DestroyContext( rmesa->radeon.glCtx );
_vbo_DestroyContext( rmesa->radeon.glCtx );
rmesa->radeon.state.scissor.pClipRects = NULL;
}
- if ( release_texture_heaps ) {
- /* This share group is about to go away, free our private
- * texture object data.
- */
- int i;
-
- for ( i = 0 ; i < rmesa->radeon.nr_heaps ; i++ ) {
- driDestroyTextureHeap( rmesa->radeon.texture_heaps[ i ] );
- rmesa->radeon.texture_heaps[ i ] = NULL;
- }
-
- assert( is_empty_list( & rmesa->radeon.swapped ) );
- }
-
radeonCleanupContext(&rmesa->radeon);
FREE( rmesa );