i965: Rename do_<stage>_prog to brw_compile_<stage>_prog (and export)

[mesa.git] / src / mesa / drivers / dri / radeon / radeon_context.c

diff --git a/src/mesa/drivers/dri/radeon/radeon_context.c b/src/mesa/drivers/dri/radeon/radeon_context.c
index 67385763dc7ca66f196ebfec153dcab52928af49..d4d19354b6dd718cf83b986dd5f880be057bb62f 100644 (file)
--- a/src/mesa/drivers/dri/radeon/radeon_context.c
+++ b/src/mesa/drivers/dri/radeon/radeon_context.c
@@ -31,7 +31,7 @@ WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
  * Authors:
  *   Kevin E. Martin <martin@valinux.com>
  *   Gareth Hughes <gareth@valinux.com>
- *   Keith Whitwell <keith@tungstengraphics.com>
+ *   Keith Whitwell <keithw@vmware.com>
  */
 
 #include <stdbool.h>
@@ -39,7 +39,7 @@ WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
 #include "main/api_arrayelt.h"
 #include "main/api_exec.h"
 #include "main/context.h"
-#include "main/simple_list.h"
+#include "util/simple_list.h"
 #include "main/imports.h"
 #include "main/extensions.h"
 #include "main/version.h"
@@ -92,29 +92,6 @@ static const struct tnl_pipeline_stage *radeon_pipeline[] = {
    NULL,
 };
 
-static void r100_get_lock(radeonContextPtr radeon)
-{
-   r100ContextPtr rmesa = (r100ContextPtr)radeon;
-   drm_radeon_sarea_t *sarea = radeon->sarea;
-
-   RADEON_STATECHANGE(rmesa, ctx);
-   if (rmesa->radeon.sarea->tiling_enabled) {
-      rmesa->hw.ctx.cmd[CTX_RB3D_COLORPITCH] |=
-        RADEON_COLOR_TILE_ENABLE;
-   } else {
-      rmesa->hw.ctx.cmd[CTX_RB3D_COLORPITCH] &=
-        ~RADEON_COLOR_TILE_ENABLE;
-   }
-   
-   if (sarea->ctx_owner != rmesa->radeon.dri.hwContext) {
-      sarea->ctx_owner = rmesa->radeon.dri.hwContext;
-   }
-}
-
-static void r100_vtbl_emit_cs_header(struct radeon_cs *cs, radeonContextPtr rmesa)
-{
-}
-
 static void r100_vtbl_pre_emit_state(radeonContextPtr radeon)
 {
    r100ContextPtr rmesa = (r100ContextPtr)radeon;
@@ -135,7 +112,7 @@ static void r100_emit_query_finish(radeonContextPtr radeon)
    BATCH_LOCALS(radeon);
    struct radeon_query_object *query = radeon->query.current;
 
-   BEGIN_BATCH_NO_AUTOSTATE(4);
+   BEGIN_BATCH(4);
    OUT_BATCH(CP_PACKET0(RADEON_RB3D_ZPASS_ADDR, 0));
    OUT_BATCH_RELOC(0, query->bo, query->curr_offset, 0, RADEON_GEM_DOMAIN_GTT, 0);
    END_BATCH();
@@ -146,9 +123,6 @@ static void r100_emit_query_finish(radeonContextPtr radeon)
 
 static void r100_init_vtbl(radeonContextPtr radeon)
 {
-   radeon->vtbl.get_lock = r100_get_lock;
-   radeon->vtbl.update_viewport_offset = radeonUpdateViewportOffset;
-   radeon->vtbl.emit_cs_header = r100_vtbl_emit_cs_header;
    radeon->vtbl.swtcl_flush = r100_swtcl_flush;
    radeon->vtbl.pre_emit_state = r100_vtbl_pre_emit_state;
    radeon->vtbl.fallback = radeonFallback;
@@ -157,6 +131,7 @@ static void r100_init_vtbl(radeonContextPtr radeon)
    radeon->vtbl.check_blit = r100_check_blit;
    radeon->vtbl.blit = r100_blit;
    radeon->vtbl.is_format_renderable = radeonIsFormatRenderable;
+   radeon->vtbl.revalidate_all_buffers = r100ValidateBuffers;
 }
 
 /* Create the device specific context.
@@ -168,6 +143,7 @@ r100CreateContext( gl_api api,
                   unsigned major_version,
                   unsigned minor_version,
                   uint32_t flags,
+                   bool notify_reset,
                   unsigned *error,
                   void *sharedContextPrivate)
 {
@@ -179,23 +155,15 @@ r100CreateContext( gl_api api,
    int i;
    int tcl_mode, fthrottle_mode;
 
-   switch (api) {
-   case API_OPENGL_COMPAT:
-      if (major_version > 1 || minor_version > 3) {
-         *error = __DRI_CTX_ERROR_BAD_VERSION;
-         return GL_FALSE;
-      }
-      break;
-   case API_OPENGLES:
-      break;
-   default:
-      *error = __DRI_CTX_ERROR_BAD_API;
-      return GL_FALSE;
+   if (flags & ~__DRI_CTX_FLAG_DEBUG) {
+      *error = __DRI_CTX_ERROR_UNKNOWN_FLAG;
+      return false;
    }
 
-   /* Flag filtering is handled in dri2CreateContextAttribs.
-    */
-   (void) flags;
+   if (notify_reset) {
+      *error = __DRI_CTX_ERROR_UNKNOWN_ATTRIBUTE;
+      return false;
+   }
 
    assert(glVisual);
    assert(driContextPriv);
@@ -241,7 +209,7 @@ r100CreateContext( gl_api api,
    radeonInitTextureFuncs( &rmesa->radeon, &functions );
    radeonInitQueryObjFunctions(&functions);
 
-   if (!radeonInitContext(&rmesa->radeon, &functions,
+   if (!radeonInitContext(&rmesa->radeon, api, &functions,
                          glVisual, driContextPriv,
                          sharedContextPrivate)) {
      free(rmesa);
@@ -253,6 +221,9 @@ r100CreateContext( gl_api api,
    rmesa->radeon.hw.all_dirty = GL_TRUE;
 
    ctx = &rmesa->radeon.glCtx;
+
+   driContextSetFlags(ctx, flags);
+
    /* Initialize the software rasterizer and helper modules.
     */
    _swrast_CreateContext( ctx );
@@ -261,22 +232,14 @@ r100CreateContext( gl_api api,
    _swsetup_CreateContext( ctx );
    _ae_create_context( ctx );
 
-   /* Set the maximum texture size small enough that we can guarentee that
-    * all texture units can bind a maximal texture and have all of them in
-    * texturable memory at once. Depending on the allow_large_textures driconf
-    * setting allow larger textures.
-    */
-
    ctx->Const.MaxTextureUnits = driQueryOptioni (&rmesa->radeon.optionCache,
                                                 "texture_units");
-   ctx->Const.FragmentProgram.MaxTextureImageUnits = ctx->Const.MaxTextureUnits;
+   ctx->Const.Program[MESA_SHADER_FRAGMENT].MaxTextureImageUnits = ctx->Const.MaxTextureUnits;
    ctx->Const.MaxTextureCoordUnits = ctx->Const.MaxTextureUnits;
    ctx->Const.MaxCombinedTextureImageUnits = ctx->Const.MaxTextureUnits;
 
    ctx->Const.StripTextureBorder = GL_TRUE;
 
-   i = driQueryOptioni( &rmesa->radeon.optionCache, "allow_large_textures");
-
    /* FIXME: When no memory manager is available we should set this 
     * to some reasonable value based on texture memory pool size */
    ctx->Const.MaxTextureLevels = 12;
@@ -314,7 +277,7 @@ r100CreateContext( gl_api api,
    ctx->Const.MaxColorAttachments = 1;
    ctx->Const.MaxRenderbufferSize = 2048;
 
-   ctx->ShaderCompilerOptions[MESA_SHADER_VERTEX].PreferDP4 = true;
+   ctx->Const.ShaderCompilerOptions[MESA_SHADER_VERTEX].OptimizeForAOS = true;
 
    /* Install the customized pipeline:
     */
@@ -340,21 +303,21 @@ r100CreateContext( gl_api api,
       _math_matrix_set_identity( &rmesa->tmpmat[i] );
    }
 
+   ctx->Extensions.ARB_occlusion_query = true;
    ctx->Extensions.ARB_texture_border_clamp = true;
+   ctx->Extensions.ARB_texture_cube_map = true;
    ctx->Extensions.ARB_texture_env_combine = true;
    ctx->Extensions.ARB_texture_env_crossbar = true;
    ctx->Extensions.ARB_texture_env_dot3 = true;
-   ctx->Extensions.EXT_fog_coord = true;
-   ctx->Extensions.EXT_packed_depth_stencil = true;
+   ctx->Extensions.ARB_texture_mirror_clamp_to_edge = true;
+   ctx->Extensions.ATI_texture_env_combine3 = true;
+   ctx->Extensions.ATI_texture_mirror_once = true;
    ctx->Extensions.EXT_texture_env_dot3 = true;
    ctx->Extensions.EXT_texture_filter_anisotropic = true;
    ctx->Extensions.EXT_texture_mirror_clamp = true;
-   ctx->Extensions.ATI_texture_env_combine3 = true;
-   ctx->Extensions.ATI_texture_mirror_once = true;
    ctx->Extensions.MESA_ycbcr_texture = true;
-   ctx->Extensions.NV_blend_square = true;
+   ctx->Extensions.NV_texture_rectangle = true;
    ctx->Extensions.OES_EGL_image = true;
-   ctx->Extensions.ARB_texture_cube_map = true;
 
    if (rmesa->radeon.glCtx.Mesa_DXTn) {
       ctx->Extensions.EXT_texture_compression_s3tc = true;
@@ -365,9 +328,6 @@ r100CreateContext( gl_api api,
       ctx->Extensions.ANGLE_texture_compression_dxt = true;
    }
 
-   ctx->Extensions.NV_texture_rectangle = true;
-   ctx->Extensions.ARB_occlusion_query = true;
-
    /* XXX these should really go right after _mesa_init_driver_functions() */
    radeon_fbo_init(&rmesa->radeon);
    radeonInitSpanFuncs( ctx );