make render_quads_verts call EMIT_PRIM with the arguments in the right order,
[mesa.git] / src / mesa / drivers / dri / radeon / radeon_context.c
index 0abf5b2e3e718dee6904f06e70e9887d38f7c25a..fc69ec1b5bcc88faf0e8c502c247f411a87d62b5 100644 (file)
@@ -50,6 +50,8 @@ WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
 #include "tnl/tnl.h"
 #include "tnl/t_pipeline.h"
 
+#include "drivers/common/driverfuncs.h"
+
 #include "radeon_context.h"
 #include "radeon_ioctl.h"
 #include "radeon_state.h"
@@ -60,38 +62,16 @@ WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
 #include "radeon_vtxfmt.h"
 #include "radeon_maos.h"
 
-#define DRIVER_DATE    "20030328"
+#define DRIVER_DATE    "20041007"
 
 #include "vblank.h"
 #include "utils.h"
+#include "xmlpool.h" /* for symbolic values of enum-type options */
 #ifndef RADEON_DEBUG
 int RADEON_DEBUG = (0);
 #endif
 
 
-/* Radeon configuration
- */
-#include "xmlpool.h"
-
-const char __driConfigOptions[] =
-DRI_CONF_BEGIN
-    DRI_CONF_SECTION_PERFORMANCE
-        DRI_CONF_TCL_MODE(DRI_CONF_TCL_CODEGEN)
-        DRI_CONF_FTHROTTLE_MODE(DRI_CONF_FTHROTTLE_IRQS)
-        DRI_CONF_VBLANK_MODE(DRI_CONF_VBLANK_DEF_INTERVAL_0)
-    DRI_CONF_SECTION_END
-    DRI_CONF_SECTION_QUALITY
-        DRI_CONF_TEXTURE_DEPTH(DRI_CONF_TEXTURE_DEPTH_FB)
-        DRI_CONF_COLOR_REDUCTION(DRI_CONF_COLOR_REDUCTION_DITHER)
-        DRI_CONF_ROUND_MODE(DRI_CONF_ROUND_TRUNC)
-        DRI_CONF_DITHER_MODE(DRI_CONF_DITHER_XERRORDIFF)
-    DRI_CONF_SECTION_END
-    DRI_CONF_SECTION_DEBUG
-        DRI_CONF_NO_RAST(false)
-    DRI_CONF_SECTION_END
-DRI_CONF_END;
-const GLuint __driNConfigOptions = 8;
-
 /* Return the width and height of the given buffer.
  */
 static void radeonGetBufferSize( GLframebuffer *buffer,
@@ -124,7 +104,7 @@ static const GLubyte *radeonGetString( GLcontext *ctx, GLenum name )
       offset = driGetRendererString( buffer, "Radeon", DRIVER_DATE,
                                     agp_mode );
 
-      sprintf( & buffer[ offset ], "%sTCL",
+      sprintf( & buffer[ offset ], " %sTCL",
               !(rmesa->TclFallback & RADEON_TCL_FALLBACK_TCL_DISABLE)
               ? "" : "NO-" );
 
@@ -146,25 +126,23 @@ static const char * const card_extensions[] =
     "GL_ARB_texture_compression",
     "GL_ARB_texture_env_add",
     "GL_ARB_texture_env_combine",
+    "GL_ARB_texture_env_crossbar",
     "GL_ARB_texture_env_dot3",
     "GL_ARB_texture_mirrored_repeat",
     "GL_EXT_blend_logic_op",
     "GL_EXT_blend_subtract",
     "GL_EXT_secondary_color",
     "GL_EXT_texture_edge_clamp",
-    "GL_EXT_texture_env_add",
     "GL_EXT_texture_env_combine",
     "GL_EXT_texture_env_dot3",
     "GL_EXT_texture_filter_anisotropic",
     "GL_EXT_texture_lod_bias",
+    "GL_EXT_texture_mirror_clamp",
     "GL_ATI_texture_env_combine3",
     "GL_ATI_texture_mirror_once",
-    "GL_IBM_texture_mirrored_repeat",
     "GL_MESA_ycbcr_texture",
     "GL_NV_blend_square",
     "GL_SGIS_generate_mipmap",
-    "GL_SGIS_texture_border_clamp",
-    "GL_SGIS_texture_edge_clamp",
     NULL
 };
 
@@ -200,15 +178,11 @@ static const struct tnl_pipeline_stage *radeon_pipeline[] = {
 
 /* Initialize the driver's misc functions.
  */
-static void radeonInitDriverFuncs( GLcontext *ctx )
+static void radeonInitDriverFuncs( struct dd_function_table *functions )
 {
-    ctx->Driver.GetBufferSize          = radeonGetBufferSize;
-    ctx->Driver.ResizeBuffers           = _swrast_alloc_buffers;
-    ctx->Driver.GetString              = radeonGetString;
-
-    ctx->Driver.Error                  = NULL;
-    ctx->Driver.DrawPixels             = NULL;
-    ctx->Driver.Bitmap                 = NULL;
+    functions->GetBufferSize   = radeonGetBufferSize;
+    functions->ResizeBuffers   = _swrast_alloc_buffers;
+    functions->GetString       = radeonGetString;
 }
 
 static const struct dri_debug_control debug_control[] =
@@ -247,6 +221,7 @@ radeonCreateContext( const __GLcontextModes *glVisual,
 {
    __DRIscreenPrivate *sPriv = driContextPriv->driScreenPriv;
    radeonScreenPtr screen = (radeonScreenPtr)(sPriv->private);
+   struct dd_function_table functions;
    radeonContextPtr rmesa;
    GLcontext *ctx, *shareCtx;
    int i;
@@ -261,12 +236,29 @@ radeonCreateContext( const __GLcontextModes *glVisual,
    if ( !rmesa )
       return GL_FALSE;
 
+   /* Parse configuration files.
+    * Do this here so that initialMaxAnisotropy is set before we create
+    * the default textures.
+    */
+   driParseConfigFiles (&rmesa->optionCache, &screen->optionCache,
+                       screen->driScreen->myNum, "radeon");
+   rmesa->initialMaxAnisotropy = driQueryOptionf(&rmesa->optionCache,
+                                                 "def_max_anisotropy");
+
+   /* Init default driver functions then plug in our Radeon-specific functions
+    * (the texture functions are especially important)
+    */
+   _mesa_init_driver_functions( &functions );
+   radeonInitDriverFuncs( &functions );
+   radeonInitTextureFuncs( &functions );
+
    /* Allocate the Mesa context */
    if (sharedContextPrivate)
       shareCtx = ((radeonContextPtr) sharedContextPrivate)->glCtx;
    else
       shareCtx = NULL;
-   rmesa->glCtx = _mesa_create_context(glVisual, shareCtx, (void *) rmesa, GL_TRUE);
+   rmesa->glCtx = _mesa_create_context(glVisual, shareCtx,
+                                       &functions, (void *) rmesa);
    if (!rmesa->glCtx) {
       FREE(rmesa);
       return GL_FALSE;
@@ -282,12 +274,8 @@ radeonCreateContext( const __GLcontextModes *glVisual,
    rmesa->dri.fd = sPriv->fd;
    rmesa->dri.drmMinor = sPriv->drmMinor;
 
-   /* Parse configuration files */
-   driParseConfigFiles (&rmesa->optionCache, &screen->optionCache,
-                       screen->driScreen->myNum, "radeon");
-
    rmesa->radeonScreen = screen;
-   rmesa->sarea = (RADEONSAREAPrivPtr)((GLubyte *)sPriv->pSAREA +
+   rmesa->sarea = (drm_radeon_sarea_t *)((GLubyte *)sPriv->pSAREA +
                                       screen->sarea_priv_offset);
 
 
@@ -302,8 +290,8 @@ radeonCreateContext( const __GLcontextModes *glVisual,
            screen->texSize[i],
            12,
            RADEON_NR_TEX_REGIONS,
-           rmesa->sarea->texList[i],
-           & rmesa->sarea->texAge[i],
+           (drmTextureRegionPtr)rmesa->sarea->tex_list[i],
+           & rmesa->sarea->tex_age[i],
            & rmesa->swapped,
            sizeof( radeonTexObj ),
            (destroy_texture_object_t *) radeonDestroyTexObj );
@@ -318,7 +306,7 @@ radeonCreateContext( const __GLcontextModes *glVisual,
         DRI_CONF_TEXTURE_DEPTH_32 : DRI_CONF_TEXTURE_DEPTH_16;
 
    rmesa->swtcl.RenderIndex = ~0;
-   rmesa->lost_context = 1;
+   rmesa->hw.all_dirty = GL_TRUE;
 
    /* Set the maximum texture size small enough that we can guarentee that
     * all texture units can bind a maximal texture and have them both in
@@ -327,6 +315,8 @@ radeonCreateContext( const __GLcontextModes *glVisual,
 
    ctx = rmesa->glCtx;
    ctx->Const.MaxTextureUnits = 2;
+   ctx->Const.MaxTextureImageUnits = 2;
+   ctx->Const.MaxTextureCoordUnits = 2;
 
    driCalculateMaxTextureLevels( rmesa->texture_heaps,
                                 rmesa->nr_heaps,
@@ -391,10 +381,12 @@ radeonCreateContext( const __GLcontextModes *glVisual,
    _tnl_isolate_materials( ctx, GL_TRUE );
 
 
-   /* Configure swrast to match hardware characteristics:
+   /* Configure swrast and T&L to match hardware characteristics:
     */
    _swrast_allow_pixel_fog( ctx, GL_FALSE );
    _swrast_allow_vertex_fog( ctx, GL_TRUE );
+   _tnl_allow_pixel_fog( ctx, GL_FALSE );
+   _tnl_allow_vertex_fog( ctx, GL_TRUE );
 
 
    _math_matrix_ctr( &rmesa->TexGenMatrix[0] );
@@ -405,15 +397,21 @@ radeonCreateContext( const __GLcontextModes *glVisual,
    _math_matrix_set_identity( &rmesa->tmpmat );
 
    driInitExtensions( ctx, card_extensions, GL_TRUE );
+   if (rmesa->glCtx->Mesa_DXTn) {
+      _mesa_enable_extension( ctx, "GL_EXT_texture_compression_s3tc" );
+      _mesa_enable_extension( ctx, "GL_S3_s3tc" );
+   }
+   else if (driQueryOptionb (&rmesa->optionCache, "force_s3tc_enable")) {
+      _mesa_enable_extension( ctx, "GL_EXT_texture_compression_s3tc" );
+   }
 
    if (rmesa->dri.drmMinor >= 9)
       _mesa_enable_extension( ctx, "GL_NV_texture_rectangle");
 
-   radeonInitDriverFuncs( ctx );
+   /* XXX these should really go right after _mesa_init_driver_functions() */
    radeonInitIoctlFuncs( ctx );
    radeonInitStateFuncs( ctx );
    radeonInitSpanFuncs( ctx );
-   radeonInitTextureFuncs( ctx );
    radeonInitState( rmesa );
    radeonInitSwtcl( ctx );
 
@@ -430,15 +428,11 @@ radeonCreateContext( const __GLcontextModes *glVisual,
 
    rmesa->vblank_flags = (rmesa->radeonScreen->irq != 0)
        ? driGetDefaultVBlankFlags(&rmesa->optionCache) : VBLANK_FLAG_NO_IRQ;
-#ifndef _SOLO
+
    rmesa->get_ust = (PFNGLXGETUSTPROC) glXGetProcAddress( (const GLubyte *) "__glXGetUST" );
    if ( rmesa->get_ust == NULL ) {
       rmesa->get_ust = get_ust_nop;
    }
-#else
-   rmesa->get_ust = get_ust_nop;
-#endif   
-
    (*rmesa->get_ust)( & rmesa->swap_ust );
 
 
@@ -450,12 +444,14 @@ radeonCreateContext( const __GLcontextModes *glVisual,
    tcl_mode = driQueryOptioni(&rmesa->optionCache, "tcl_mode");
    if (driQueryOptionb(&rmesa->optionCache, "no_rast")) {
       fprintf(stderr, "disabling 3D acceleration\n");
-      FALLBACK(rmesa, RADEON_FALLBACK_DISABLE, 1); 
+      FALLBACK(rmesa, RADEON_FALLBACK_DISABLE, 1);
    } else if (tcl_mode == DRI_CONF_TCL_SW ||
              !(rmesa->radeonScreen->chipset & RADEON_CHIPSET_TCL)) {
-      rmesa->radeonScreen->chipset &= ~RADEON_CHIPSET_TCL;
-      fprintf(stderr, "disabling TCL support\n");
-      TCL_FALLBACK(rmesa->glCtx, RADEON_TCL_FALLBACK_TCL_DISABLE, 1); 
+      if (rmesa->radeonScreen->chipset & RADEON_CHIPSET_TCL) {
+        rmesa->radeonScreen->chipset &= ~RADEON_CHIPSET_TCL;
+        fprintf(stderr, "Disabling HW TCL support\n");
+      }
+      TCL_FALLBACK(rmesa->glCtx, RADEON_TCL_FALLBACK_TCL_DISABLE, 1);
    }
 
    if (rmesa->radeonScreen->chipset & RADEON_CHIPSET_TCL) {
@@ -584,7 +580,7 @@ radeonMakeCurrent( __DRIcontextPrivate *driContextPriv,
         (radeonContextPtr) driContextPriv->driverPrivate;
 
       if (RADEON_DEBUG & DEBUG_DRI)
-        fprintf(stderr, "%s ctx %p\n", __FUNCTION__, newCtx->glCtx);
+        fprintf(stderr, "%s ctx %p\n", __FUNCTION__, (void *) newCtx->glCtx);
 
       if ( newCtx->dri.drawable != driDrawPriv ) {
         driDrawableInitVBlank( driDrawPriv, newCtx->vblank_flags );
@@ -624,7 +620,7 @@ radeonUnbindContext( __DRIcontextPrivate *driContextPriv )
    radeonContextPtr rmesa = (radeonContextPtr) driContextPriv->driverPrivate;
 
    if (RADEON_DEBUG & DEBUG_DRI)
-      fprintf(stderr, "%s ctx %p\n", __FUNCTION__, rmesa->glCtx);
+      fprintf(stderr, "%s ctx %p\n", __FUNCTION__, (void *) rmesa->glCtx);
 
    return GL_TRUE;
 }