Revert the move of lost_context setting to UNLOCK_HARDWARE that was done in the

[mesa.git] / src / mesa / drivers / dri / radeon / radeon_context.h

diff --git a/src/mesa/drivers/dri/radeon/radeon_context.h b/src/mesa/drivers/dri/radeon/radeon_context.h
index 69808837ea401f4ccab085e556173b22c4cdc355..03392ee6754ad670e2ae1de7196c508123a075c9 100644 (file)
--- a/src/mesa/drivers/dri/radeon/radeon_context.h
+++ b/src/mesa/drivers/dri/radeon/radeon_context.h
@@ -40,9 +40,9 @@ WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
 
 #ifdef GLX_DIRECT_RENDERING
 
-#include <inttypes.h>
 #include "dri_util.h"
-#include "radeon_common.h"
+#include "drm.h"
+#include "radeon_drm.h"
 #include "texmem.h"
 
 #include "macros.h"
@@ -57,6 +57,8 @@ typedef struct radeon_context *radeonContextPtr;
 #include "radeon_screen.h"
 #include "mm.h"
 
+#include "math/m_vector.h"
+
 /* Flags for software fallback cases */
 /* See correponding strings in radeon_swtcl.c */
 #define RADEON_FALLBACK_TEXTURE                0x0001
@@ -95,6 +97,7 @@ typedef void (*radeon_point_func)( radeonContextPtr,
 struct radeon_colorbuffer_state {
    GLuint clear;
    GLint drawOffset, drawPitch;
+   int roundEnable;
 };
 
 
@@ -108,12 +111,12 @@ struct radeon_pixel_state {
 };
 
 struct radeon_scissor_state {
-   XF86DRIClipRectRec rect;
+   drm_clip_rect_t rect;
    GLboolean enabled;
 
    GLuint numClipRects;                        /* Cliprects active */
    GLuint numAllocedClipRects;         /* Cliprects available */
-   XF86DRIClipRectPtr pClipRects;
+   drm_clip_rect_t *pClipRects;
 };
 
 struct radeon_stencilbuffer_state {
@@ -148,7 +151,7 @@ struct radeon_tex_obj {
                                           brought into the
                                           texunit. */
 
-   drmRadeonTexImage image[6][RADEON_MAX_TEXTURE_LEVELS];
+   drm_radeon_tex_image_t image[6][RADEON_MAX_TEXTURE_LEVELS];
                                        /* Six, for the cube faces */
 
    GLuint pp_txfilter;                 /* hardware register values */
@@ -182,6 +185,7 @@ struct radeon_state_atom {
    GLuint is_tcl;
    int *cmd;                            /* one or more cmd's */
    int *lastcmd;                        /* one or more cmd's */
+   GLboolean dirty;                      /* dirty-mark in emit_state_list */
    GLboolean (*check)( GLcontext * );    /* is this state active? */
 };
    
@@ -336,9 +340,9 @@ struct radeon_state_atom {
 #define LIT_DIRECTION_Y            18
 #define LIT_DIRECTION_Z            19
 #define LIT_DIRECTION_W            20
-#define LIT_ATTEN_CONST            21
+#define LIT_ATTEN_QUADRATIC        21
 #define LIT_ATTEN_LINEAR           22
-#define LIT_ATTEN_QUADRATIC        23
+#define LIT_ATTEN_CONST            23
 #define LIT_ATTEN_XXX              24
 #define LIT_CMD_1                  25
 #define LIT_SPOT_DCD               26
@@ -346,7 +350,7 @@ struct radeon_state_atom {
 #define LIT_SPOT_CUTOFF            28
 #define LIT_SPECULAR_THRESH        29
 #define LIT_RANGE_CUTOFF           30 /* ? */
-#define LIT_RANGE_ATTEN            31 /* ? */
+#define LIT_ATTEN_CONST_INV        31
 #define LIT_STATE_SIZE             32
 
 /* Fog
@@ -422,6 +426,8 @@ struct radeon_hw_state {
    struct radeon_state_atom fog; 
    struct radeon_state_atom glt; 
    struct radeon_state_atom txr[2]; /* for NPOT */
+
+   int max_state_size; /* Number of bytes necessary for a full state emit. */
 };
 
 struct radeon_state {
@@ -478,8 +484,8 @@ struct radeon_dri_mirror {
    __DRIscreenPrivate  *screen;        /* DRI screen */
    __DRIdrawablePrivate        *drawable;      /* DRI drawable bound to this ctx */
 
-   drmContext hwContext;
-   drmLock *hwLock;
+   drm_context_t hwContext;
+   drm_hw_lock_t *hwLock;
    int fd;
    int drmMinor;
 };
@@ -503,6 +509,11 @@ struct radeon_tcl_info {
    GLint last_offset;
    GLuint hw_primitive;
 
+   /* Temporary for cases where incoming vertex data is incompatible
+    * with maos code.
+    */
+   GLvector4f ObjClean;
+
    struct radeon_dma_region *aos_components[8];
    GLuint nr_aos_components;
 
@@ -690,8 +701,8 @@ struct radeon_context {
    unsigned              nr_heaps;
    driTexHeap          * texture_heaps[ RADEON_NR_TEX_HEAPS ];
    driTextureObject      swapped;
-   GLboolean             default32BitTextures;
-
+   int                   texture_depth;
+   float                 initialMaxAnisotropy;
 
    /* Rasterization and vertex state:
     */
@@ -699,12 +710,6 @@ struct radeon_context {
    GLuint Fallback;
    GLuint NewGLState;
 
-   
-   /* Temporaries for translating away float colors:
-    */
-   struct gl_client_array UbyteColor;
-   struct gl_client_array UbyteSecondaryColor;
-
    /* Vertex buffers
     */
    struct radeon_ioctl ioctl;
@@ -720,16 +725,16 @@ struct radeon_context {
    GLuint do_usleeps;
    GLuint do_irqs;
    GLuint irqsEmitted;
-   drmRadeonIrqWait iw;
+   drm_radeon_irq_wait_t iw;
 
    /* Drawable, cliprect and scissor information
     */
    GLuint numClipRects;                        /* Cliprects for the draw buffer */
-   XF86DRIClipRectPtr pClipRects;
+   drm_clip_rect_t *pClipRects;
    unsigned int lastStamp;
    GLboolean lost_context;
    radeonScreenPtr radeonScreen;       /* Screen private DRI data */
-   RADEONSAREAPrivPtr sarea;           /* Private SAREA data */
+   drm_radeon_sarea_t *sarea;          /* Private SAREA data */
 
    /* TCL stuff
     */
@@ -746,8 +751,8 @@ struct radeon_context {
    GLuint vbl_seq;
    GLuint vblank_flags;
 
-   uint64_t swap_ust;
-   uint64_t swap_missed_ust;
+   int64_t swap_ust;
+   int64_t swap_missed_ust;
 
    GLuint swap_count;
    GLuint swap_missed_count;