#include <inttypes.h>
#include "dri_util.h"
-#include "radeon_common.h"
+#include "drm.h"
+#include "radeon_drm.h"
#include "texmem.h"
#include "macros.h"
};
struct radeon_scissor_state {
- XF86DRIClipRectRec rect;
+ drm_clip_rect_t rect;
GLboolean enabled;
GLuint numClipRects; /* Cliprects active */
GLuint numAllocedClipRects; /* Cliprects available */
- XF86DRIClipRectPtr pClipRects;
+ drm_clip_rect_t *pClipRects;
};
struct radeon_stencilbuffer_state {
brought into the
texunit. */
- drmRadeonTexImage image[6][RADEON_MAX_TEXTURE_LEVELS];
+ drm_radeon_tex_image_t image[6][RADEON_MAX_TEXTURE_LEVELS];
/* Six, for the cube faces */
GLuint pp_txfilter; /* hardware register values */
#define LIT_DIRECTION_Y 18
#define LIT_DIRECTION_Z 19
#define LIT_DIRECTION_W 20
-#define LIT_ATTEN_CONST 21
+#define LIT_ATTEN_QUADRATIC 21
#define LIT_ATTEN_LINEAR 22
-#define LIT_ATTEN_QUADRATIC 23
+#define LIT_ATTEN_CONST 23
#define LIT_ATTEN_XXX 24
#define LIT_CMD_1 25
#define LIT_SPOT_DCD 26
#define LIT_SPOT_CUTOFF 28
#define LIT_SPECULAR_THRESH 29
#define LIT_RANGE_CUTOFF 30 /* ? */
-#define LIT_RANGE_ATTEN 31 /* ? */
+#define LIT_ATTEN_CONST_INV 31
#define LIT_STATE_SIZE 32
/* Fog
__DRIdrawablePrivate *drawable; /* DRI drawable bound to this ctx */
drmContext hwContext;
- drmLock *hwLock;
+ drm_hw_lock_t *hwLock;
int fd;
int drmMinor;
};
GLuint do_usleeps;
GLuint do_irqs;
GLuint irqsEmitted;
- drmRadeonIrqWait iw;
+ drm_radeon_irq_wait_t iw;
/* Drawable, cliprect and scissor information
*/
GLuint numClipRects; /* Cliprects for the draw buffer */
- XF86DRIClipRectPtr pClipRects;
+ drm_clip_rect_t *pClipRects;
unsigned int lastStamp;
GLboolean lost_context;
radeonScreenPtr radeonScreen; /* Screen private DRI data */
- RADEONSAREAPrivPtr sarea; /* Private SAREA data */
+ drm_radeon_sarea_t *sarea; /* Private SAREA data */
/* TCL stuff
*/
GLuint vbl_seq;
GLuint vblank_flags;
- uint64_t swap_ust;
- uint64_t swap_missed_ust;
+ int64_t swap_ust;
+ int64_t swap_missed_ust;
GLuint swap_count;
GLuint swap_missed_count;