radeon: stupid mesa extension fail
[mesa.git] / src / mesa / drivers / dri / radeon / radeon_cs_legacy.c
index 3a3a245d79812a78546438ac26df742e7ae93842..b47b095cf203991650a46241b62c4708a841416d 100644 (file)
  */
 #include <errno.h>
 
-
-#include "common_context.h"
-#include "radeon_cs.h"
-#include "radeon_cs_legacy.h"
-#include "radeon_bo_legacy.h"
-
+#include "radeon_bocs_wrapper.h"
 
 struct cs_manager_legacy {
     struct radeon_cs_manager    base;
@@ -44,6 +39,8 @@ struct cs_manager_legacy {
     /* hack for scratch stuff */
     uint32_t                    pending_age;
     uint32_t                    pending_count;
+
+
 };
 
 struct cs_reloc_legacy {
@@ -73,25 +70,6 @@ static struct radeon_cs *cs_create(struct radeon_cs_manager *csm,
     return cs;
 }
 
-int cs_write_dword(struct radeon_cs *cs, uint32_t dword)
-{
-    if (cs->cdw >= cs->ndw) {
-        uint32_t tmp, *ptr;
-        tmp = (cs->cdw + 1 + 0x3FF) & (~0x3FF);
-        ptr = (uint32_t*)realloc(cs->packets, 4 * tmp);
-        if (ptr == NULL) {
-            return -ENOMEM;
-        }
-        cs->packets = ptr;
-        cs->ndw = tmp;
-    }
-    cs->packets[cs->cdw++] = dword;
-    if (cs->section) {
-        cs->section_cdw++;
-    }
-    return 0;
-}
-
 static int cs_write_reloc(struct radeon_cs *cs,
                           struct radeon_bo *bo,
                           uint32_t read_domain,
@@ -135,7 +113,7 @@ static int cs_write_reloc(struct radeon_cs *cs,
             relocs[i].base.read_domain |= read_domain;
             relocs[i].base.write_domain |= write_domain;
             /* save indice */
-            relocs[i].cindices += 1;
+            relocs[i].cindices++;
             indices = (uint32_t*)realloc(relocs[i].indices,
                                          relocs[i].cindices * 4);
             if (indices == NULL) {
@@ -190,6 +168,21 @@ static int cs_begin(struct radeon_cs *cs,
     cs->section_file = file;
     cs->section_func = func;
     cs->section_line = line;
+
+
+    if (cs->cdw + ndw > cs->ndw) {
+        uint32_t tmp, *ptr;
+       int num = (ndw > 0x3FF) ? ndw : 0x3FF;
+
+        tmp = (cs->cdw + 1 + num) & (~num);
+        ptr = (uint32_t*)realloc(cs->packets, 4 * tmp);
+        if (ptr == NULL) {
+            return -ENOMEM;
+        }
+        cs->packets = ptr;
+        cs->ndw = tmp;
+    }
+
     return 0;
 }
 
@@ -223,22 +216,23 @@ static int cs_process_relocs(struct radeon_cs *cs)
 
     csm = (struct cs_manager_legacy*)cs->csm;
     relocs = (struct cs_reloc_legacy *)cs->relocs;
+ restart:
     for (i = 0; i < cs->crelocs; i++) {
         for (j = 0; j < relocs[i].cindices; j++) {
             uint32_t soffset, eoffset;
 
             r = radeon_bo_legacy_validate(relocs[i].base.bo,
                                            &soffset, &eoffset);
+           if (r == -EAGAIN)
+             goto restart;
             if (r) {
                 fprintf(stderr, "validated %p [0x%08X, 0x%08X]\n",
                         relocs[i].base.bo, soffset, eoffset);
                 return r;
             }
-           fprintf(stderr, "validated %p [0x%08X, 0x%08X]\n",
-                   relocs[i].base.bo, soffset, eoffset);
             cs->packets[relocs[i].indices[j]] += soffset;
             if (cs->packets[relocs[i].indices[j]] >= eoffset) {
-                radeon_bo_debug(relocs[i].base.bo, 12);
+             /*                radeon_bo_debug(relocs[i].base.bo, 12); */
                 fprintf(stderr, "validated %p [0x%08X, 0x%08X]\n",
                         relocs[i].base.bo, soffset, eoffset);
                 fprintf(stderr, "above end: %p 0x%08X 0x%08X\n",
@@ -285,7 +279,6 @@ static int cs_emit(struct radeon_cs *cs)
 
     csm->ctx->vtbl.emit_cs_header(cs, csm->ctx);
 
-
     /* append buffer age */
     if (IS_R300_CLASS(csm->ctx->radeonScreen)) {
       age.scratch.cmd_type = R300_CMD_SCRATCH;
@@ -297,8 +290,7 @@ static int cs_emit(struct radeon_cs *cs)
       age.scratch.n_bufs = 1;
       age.scratch.flags = 0;
       radeon_cs_write_dword(cs, age.u);
-      radeon_cs_write_dword(cs, ull & 0xffffffff);
-      radeon_cs_write_dword(cs, ull >> 32);
+      radeon_cs_write_qword(cs, ull);
       radeon_cs_write_dword(cs, 0);
     }
 
@@ -317,7 +309,7 @@ static int cs_emit(struct radeon_cs *cs)
         cmd.boxes = (drm_clip_rect_t *) csm->ctx->pClipRects;
     }
 
-    //    dump_cmdbuf(cs);
+    //dump_cmdbuf(cs);
 
     r = drmCommandWrite(cs->csm->fd, DRM_RADEON_CMDBUF, &cmd, sizeof(cmd));
     if (r) {
@@ -332,11 +324,26 @@ static int cs_emit(struct radeon_cs *cs)
        }
     }
     cs_set_age(cs);
+
+    cs->csm->read_used = 0;
+    cs->csm->vram_write_used = 0;
+    cs->csm->gart_write_used = 0;
     return 0;
 }
 
+static void inline cs_free_reloc(void *relocs_p, int crelocs)
+{
+    struct cs_reloc_legacy *relocs = relocs_p;
+    int i;
+    if (!relocs_p)
+      return;
+    for (i = 0; i < crelocs; i++)
+      free(relocs[i].indices);
+}
+
 static int cs_destroy(struct radeon_cs *cs)
 {
+    cs_free_reloc(cs->relocs, cs->crelocs);
     free(cs->relocs);
     free(cs->packets);
     free(cs);
@@ -345,6 +352,7 @@ static int cs_destroy(struct radeon_cs *cs)
 
 static int cs_erase(struct radeon_cs *cs)
 {
+    cs_free_reloc(cs->relocs, cs->crelocs);
     free(cs->relocs);
     cs->relocs_total_size = 0;
     cs->relocs = NULL;
@@ -356,17 +364,112 @@ static int cs_erase(struct radeon_cs *cs)
 
 static int cs_need_flush(struct radeon_cs *cs)
 {
-    /* FIXME: we should get the texture heap size */
-    return (cs->relocs_total_size > (7*1024*1024));
+    /* this function used to flush when the BO usage got to
+     * a certain size, now the higher levels handle this better */
+    return 0;
 }
 
 static void cs_print(struct radeon_cs *cs, FILE *file)
 {
 }
 
+static int cs_check_space(struct radeon_cs *cs, struct radeon_cs_space_check *bos, int num_bo)
+{
+    struct radeon_cs_manager *csm = cs->csm;
+    int this_op_read = 0, this_op_gart_write = 0, this_op_vram_write = 0;
+    uint32_t read_domains, write_domain;
+    int i;
+    struct radeon_bo *bo;
+
+    /* check the totals for this operation */
+
+    if (num_bo == 0)
+        return 0;
+
+    /* prepare */
+    for (i = 0; i < num_bo; i++) {
+      bo = bos[i].bo;
+
+      bos[i].new_accounted = 0;
+      read_domains = bos[i].read_domains;
+      write_domain = bos[i].write_domain;
+               
+      /* pinned bos don't count */
+      if (radeon_legacy_bo_is_static(bo))
+         continue;
+      /* already accounted this bo */
+      if (write_domain && (write_domain == bo->space_accounted))
+         continue;
+
+      if (read_domains && ((read_domains << 16) == bo->space_accounted))
+         continue;
+      
+      if (bo->space_accounted == 0) {
+         if (write_domain == RADEON_GEM_DOMAIN_VRAM)
+             this_op_vram_write += bo->size;
+         else if (write_domain == RADEON_GEM_DOMAIN_GTT)
+             this_op_gart_write += bo->size;
+         else
+             this_op_read += bo->size;
+         bos[i].new_accounted = (read_domains << 16) | write_domain;
+      } else {
+         uint16_t old_read, old_write;
+         
+         old_read = bo->space_accounted >> 16;
+         old_write = bo->space_accounted & 0xffff;
+
+         if (write_domain && (old_read & write_domain)) {
+             bos[i].new_accounted = write_domain;
+             /* moving from read to a write domain */
+             if (write_domain == RADEON_GEM_DOMAIN_VRAM) {
+                 this_op_read -= bo->size;
+                 this_op_vram_write += bo->size;
+             } else if (write_domain == RADEON_GEM_DOMAIN_VRAM) {
+                 this_op_read -= bo->size;
+                 this_op_gart_write += bo->size;
+             }
+         } else if (read_domains & old_write) {
+             bos[i].new_accounted = bo->space_accounted & 0xffff;
+         } else {
+             /* rewrite the domains */
+             if (write_domain != old_write)
+                 fprintf(stderr,"WRITE DOMAIN RELOC FAILURE 0x%x %d %d\n", bo->handle, write_domain, old_write);
+             if (read_domains != old_read)
+                 fprintf(stderr,"READ DOMAIN RELOC FAILURE 0x%x %d %d\n", bo->handle, read_domains, old_read);
+             return RADEON_CS_SPACE_FLUSH;
+         }
+      }
+       }
+       
+       if (this_op_read < 0)
+               this_op_read = 0;
+
+       /* check sizes - operation first */
+       if ((this_op_read + this_op_gart_write > csm->gart_limit) ||
+           (this_op_vram_write > csm->vram_limit)) {
+           return RADEON_CS_SPACE_OP_TO_BIG;
+       }
+
+       if (((csm->vram_write_used + this_op_vram_write) > csm->vram_limit) ||
+           ((csm->read_used + csm->gart_write_used + this_op_gart_write + this_op_read) > csm->gart_limit)) {
+               return RADEON_CS_SPACE_FLUSH;
+       }
+
+       csm->gart_write_used += this_op_gart_write;
+       csm->vram_write_used += this_op_vram_write;
+       csm->read_used += this_op_read;
+       /* commit */
+       for (i = 0; i < num_bo; i++) {
+               bo = bos[i].bo;
+               bo->space_accounted = bos[i].new_accounted;
+       }
+
+       return RADEON_CS_SPACE_OK;
+}
+
 static struct radeon_cs_funcs  radeon_cs_legacy_funcs = {
     cs_create,
-    cs_write_dword,
     cs_write_reloc,
     cs_begin,
     cs_end,
@@ -374,7 +477,8 @@ static struct radeon_cs_funcs  radeon_cs_legacy_funcs = {
     cs_destroy,
     cs_erase,
     cs_need_flush,
-    cs_print
+    cs_print,
+    cs_check_space
 };
 
 struct radeon_cs_manager *radeon_cs_manager_legacy_ctor(struct radeon_context *ctx)
@@ -397,3 +501,4 @@ void radeon_cs_manager_legacy_dtor(struct radeon_cs_manager *csm)
 {
     free(csm);
 }
+