i965/miptree: Replace is_lossless_compressed with mt->aux_usage checks
[mesa.git] / src / mesa / drivers / dri / radeon / radeon_fbo.c
index 5eece518c95734bb95ed60cf5a64139add6b78d1..37c9c3f094b79103856cf7980ca961ab2e700979 100644 (file)
                 printf(__VA_ARGS__);                      \
 } while(0)
 
-static struct gl_framebuffer *
-radeon_new_framebuffer(struct gl_context *ctx, GLuint name)
-{
-  return _mesa_new_framebuffer(ctx, name);
-}
-
 static void
 radeon_delete_renderbuffer(struct gl_context *ctx, struct gl_renderbuffer *rb)
 {
@@ -150,8 +144,7 @@ static GLuint get_depth_z16(const struct radeon_renderbuffer *rrb,
 #endif
 
 static void
-radeon_map_renderbuffer_s8z24(struct gl_context *ctx,
-                      struct gl_renderbuffer *rb,
+radeon_map_renderbuffer_s8z24(struct gl_renderbuffer *rb,
                       GLuint x, GLuint y, GLuint w, GLuint h,
                       GLbitfield mode,
                       GLubyte **out_map,
@@ -189,8 +182,7 @@ radeon_map_renderbuffer_s8z24(struct gl_context *ctx,
 }
 
 static void
-radeon_map_renderbuffer_z16(struct gl_context *ctx,
-                           struct gl_renderbuffer *rb,
+radeon_map_renderbuffer_z16(struct gl_renderbuffer *rb,
                            GLuint x, GLuint y, GLuint w, GLuint h,
                            GLbitfield mode,
                            GLubyte **out_map,
@@ -313,12 +305,12 @@ radeon_map_renderbuffer(struct gl_context *ctx,
 
    if ((rmesa->radeonScreen->chip_flags & RADEON_CHIPSET_DEPTH_ALWAYS_TILED) && !rrb->has_surface) {
        if (rb->Format == MESA_FORMAT_Z24_UNORM_S8_UINT || rb->Format == MESA_FORMAT_Z24_UNORM_X8_UINT) {
-          radeon_map_renderbuffer_s8z24(ctx, rb, x, y, w, h,
+          radeon_map_renderbuffer_s8z24(rb, x, y, w, h,
                                         mode, out_map, out_stride);
           return;
        }
        if (rb->Format == MESA_FORMAT_Z_UNORM16) {
-          radeon_map_renderbuffer_z16(ctx, rb, x, y, w, h,
+          radeon_map_renderbuffer_z16(rb, x, y, w, h,
                                       mode, out_map, out_stride);
           return;
        }
@@ -627,8 +619,11 @@ radeon_alloc_window_storage(struct gl_context * ctx, struct gl_renderbuffer *rb,
 
 /** Dummy function for gl_renderbuffer::AllocStorage() */
 static GLboolean
-radeon_nop_alloc_storage(struct gl_context * ctx, struct gl_renderbuffer *rb,
-                        GLenum internalFormat, GLuint width, GLuint height)
+radeon_nop_alloc_storage(struct gl_context * ctx,
+                        UNUSED struct gl_renderbuffer *rb,
+                        UNUSED GLenum internalFormat,
+                        UNUSED GLuint width,
+                        UNUSED GLuint height)
 {
    _mesa_problem(ctx, "radeon_op_alloc_storage should never be called.");
    return GL_FALSE;
@@ -745,7 +740,7 @@ radeon_update_wrapper(struct gl_context *ctx, struct radeon_renderbuffer *rrb,
        rrb->pitch = texImage->Width * rrb->cpp;
        rb->Format = texImage->TexFormat;
        rb->InternalFormat = texImage->InternalFormat;
-       rb->_BaseFormat = _mesa_base_fbo_format(ctx, rb->InternalFormat);
+       rb->_BaseFormat = _mesa_get_format_base_format(rb->Format);
        rb->Width = texImage->Width;
        rb->Height = texImage->Height;
        rb->Delete = radeon_delete_renderbuffer;
@@ -868,7 +863,6 @@ radeon_validate_framebuffer(struct gl_context *ctx, struct gl_framebuffer *fb)
 
 void radeon_fbo_init(struct radeon_context *radeon)
 {
-  radeon->glCtx.Driver.NewFramebuffer = radeon_new_framebuffer;
   radeon->glCtx.Driver.NewRenderbuffer = radeon_new_renderbuffer;
   radeon->glCtx.Driver.MapRenderbuffer = radeon_map_renderbuffer;
   radeon->glCtx.Driver.UnmapRenderbuffer = radeon_unmap_renderbuffer;