#include "main/glheader.h"
#include "main/imports.h"
#include "main/simple_list.h"
-#include "swrast/swrast.h"
#include "radeon_context.h"
#include "radeon_common.h"
#endif
}
-void radeonFlushElts( GLcontext *ctx )
+void radeonFlushElts( struct gl_context *ctx )
{
r100ContextPtr rmesa = R100_CONTEXT(ctx);
BATCH_LOCALS(&rmesa->radeon);
*/
#define RADEON_MAX_CLEARS 256
-static void radeonKernelClear(GLcontext *ctx, GLuint flags)
+static void radeonKernelClear(struct gl_context *ctx, GLuint flags)
{
r100ContextPtr rmesa = R100_CONTEXT(ctx);
__DRIdrawable *dPriv = radeon_get_drawable(&rmesa->radeon);
GLint ret, i;
GLint cx, cy, cw, ch;
+ radeonEmitState(&rmesa->radeon);
+
LOCK_HARDWARE( &rmesa->radeon );
/* compute region after locking: */
UNLOCK_HARDWARE( &rmesa->radeon );
}
-static void radeonClear( GLcontext *ctx, GLbitfield mask )
+static void radeonClear( struct gl_context *ctx, GLbitfield mask )
{
r100ContextPtr rmesa = R100_CONTEXT(ctx);
__DRIdrawable *dPriv = radeon_get_drawable(&rmesa->radeon);
GLuint flags = 0;
- GLuint color_mask = 0;
GLuint orig_mask = mask;
if (mask & (BUFFER_BIT_FRONT_LEFT | BUFFER_BIT_FRONT_RIGHT)) {
if ( mask & BUFFER_BIT_FRONT_LEFT ) {
flags |= RADEON_FRONT;
- color_mask = rmesa->hw.msk.cmd[MSK_RB3D_PLANEMASK];
mask &= ~BUFFER_BIT_FRONT_LEFT;
}
if ( mask & BUFFER_BIT_BACK_LEFT ) {
flags |= RADEON_BACK;
- color_mask = rmesa->hw.msk.cmd[MSK_RB3D_PLANEMASK];
mask &= ~BUFFER_BIT_BACK_LEFT;
}
}
}
-void radeonInitIoctlFuncs( GLcontext *ctx )
+void radeonInitIoctlFuncs( struct gl_context *ctx )
{
ctx->Driver.Clear = radeonClear;
ctx->Driver.Finish = radeonFinish;