radeon: use t->bo to figure out of settexbuffer override is in action

[mesa.git] / src / mesa / drivers / dri / radeon / radeon_maos_verts.c

diff --git a/src/mesa/drivers/dri/radeon/radeon_maos_verts.c b/src/mesa/drivers/dri/radeon/radeon_maos_verts.c
index 57aa90321cf59eb65669e38683caa6a964f0880a..d468a97200620a5bf8f5daebd4caeb257744f50f 100644 (file)
--- a/src/mesa/drivers/dri/radeon/radeon_maos_verts.c
+++ b/src/mesa/drivers/dri/radeon/radeon_maos_verts.c
@@ -1,4 +1,3 @@
-/* $XFree86: xc/lib/GL/mesa/src/drv/radeon/radeon_maos_verts.c,v 1.1 2002/10/30 12:51:55 alanh Exp $ */
 /**************************************************************************
 
 Copyright 2000, 2001 ATI Technologies Inc., Ontario, Canada, and
@@ -33,11 +32,11 @@ WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
  *   Keith Whitwell <keith@tungstengraphics.com>
  */
 
-#include "glheader.h"
-#include "imports.h"
-#include "mtypes.h"
+#include "main/glheader.h"
+#include "main/imports.h"
+#include "main/mtypes.h"
 
-#include "array_cache/acache.h"
+#include "vbo/vbo.h"
 #include "math/m_translate.h"
 #include "tnl/tnl.h"
 #include "tnl/t_pipeline.h"
@@ -63,8 +62,11 @@ static struct {
 
 #define DO_W    (IND & RADEON_CP_VC_FRMT_W0)
 #define DO_RGBA (IND & RADEON_CP_VC_FRMT_PKCOLOR)
-#define DO_SPEC (IND & RADEON_CP_VC_FRMT_PKSPEC)
-#define DO_FOG  (IND & RADEON_CP_VC_FRMT_PKSPEC)
+#define DO_SPEC_OR_FOG (IND & RADEON_CP_VC_FRMT_PKSPEC)
+#define DO_SPEC ((IND & RADEON_CP_VC_FRMT_PKSPEC) && \
+                (ctx->_TriangleCaps & DD_SEPARATE_SPECULAR))
+#define DO_FOG  ((IND & RADEON_CP_VC_FRMT_PKSPEC) && ctx->Fog.Enabled && \
+                (ctx->Fog.FogCoordinateSource == GL_FOG_COORD))
 #define DO_TEX0 (IND & RADEON_CP_VC_FRMT_ST0)
 #define DO_TEX1 (IND & RADEON_CP_VC_FRMT_ST1)
 #define DO_TEX2 (IND & RADEON_CP_VC_FRMT_ST2)
@@ -308,7 +310,7 @@ static void init_tcl_verts( void )
 
 void radeonEmitArrays( GLcontext *ctx, GLuint inputs )
 {
-   radeonContextPtr rmesa = RADEON_CONTEXT(ctx);
+   r100ContextPtr rmesa = R100_CONTEXT(ctx);
    struct vertex_buffer *VB = &TNL_CONTEXT(ctx)->vb;
    GLuint req = 0;
    GLuint unit;
@@ -337,7 +339,7 @@ void radeonEmitArrays( GLcontext *ctx, GLuint inputs )
       req |= RADEON_CP_VC_FRMT_PKCOLOR;
    }
 
-   if (inputs & VERT_BIT_COLOR1) {
+   if (inputs & (VERT_BIT_COLOR1|VERT_BIT_FOG)) {
       req |= RADEON_CP_VC_FRMT_PKSPEC;
    }
 
@@ -352,7 +354,8 @@ void radeonEmitArrays( GLcontext *ctx, GLuint inputs )
         }
         if ( (ctx->Texture.Unit[unit].TexGenEnabled & (R_BIT | Q_BIT)) )
            vtx |= RADEON_Q_BIT(unit);
-        else if (VB->TexCoordPtr[unit]->size >= 3) {
+        else if ((VB->TexCoordPtr[unit]->size >= 3) &&
+                 ((ctx->Texture.Unit[unit]._ReallyEnabled & (TEXTURE_CUBE_BIT)) == 0)) {
            GLuint swaptexmatcol = (VB->TexCoordPtr[unit]->size - 3);
            if (((rmesa->NeedTexMatrix >> unit) & 1) &&
                 (swaptexmatcol != ((rmesa->TexMatColSwap >> unit) & 1)))
@@ -371,14 +374,15 @@ void radeonEmitArrays( GLcontext *ctx, GLuint inputs )
         break;
 
    if (rmesa->tcl.vertex_format == setup_tab[i].vertex_format &&
-       rmesa->tcl.indexed_verts.buf)
+       rmesa->tcl.aos[0].bo)
       return;
 
-   if (rmesa->tcl.indexed_verts.buf)
+   if (rmesa->tcl.aos[0].bo)
       radeonReleaseArrays( ctx, ~0 );
 
-   radeonAllocDmaRegion( rmesa,
-                        &rmesa->tcl.indexed_verts, 
+   radeonAllocDmaRegion( &rmesa->radeon,
+                        &rmesa->tcl.aos[0].bo,
+                        &rmesa->tcl.aos[0].offset,
                         VB->Count * setup_tab[i].vertex_size * 4, 
                         4);
 
@@ -418,15 +422,11 @@ void radeonEmitArrays( GLcontext *ctx, GLuint inputs )
 
 
    setup_tab[i].emit( ctx, 0, VB->Count, 
-                     rmesa->tcl.indexed_verts.address + 
-                     rmesa->tcl.indexed_verts.start );
+                     rmesa->tcl.aos[0].bo->ptr + rmesa->tcl.aos[0].offset);
 
+   //   rmesa->tcl.aos[0].size = setup_tab[i].vertex_size;
+   rmesa->tcl.aos[0].stride = setup_tab[i].vertex_size;
    rmesa->tcl.vertex_format = setup_tab[i].vertex_format;
-   rmesa->tcl.indexed_verts.aos_start = GET_START( &rmesa->tcl.indexed_verts );
-   rmesa->tcl.indexed_verts.aos_size = setup_tab[i].vertex_size;
-   rmesa->tcl.indexed_verts.aos_stride = setup_tab[i].vertex_size;
-
-   rmesa->tcl.aos_components[0] = &rmesa->tcl.indexed_verts;
    rmesa->tcl.nr_aos_components = 1;
 }
 
@@ -434,13 +434,13 @@ void radeonEmitArrays( GLcontext *ctx, GLuint inputs )
 
 void radeonReleaseArrays( GLcontext *ctx, GLuint newinputs )
 {
-   radeonContextPtr rmesa = RADEON_CONTEXT( ctx );
-
-#if 0
-   if (RADEON_DEBUG & DEBUG_VERTS) 
-      _tnl_print_vert_flags( __FUNCTION__, newinputs );
-#endif
+   r100ContextPtr rmesa = R100_CONTEXT( ctx );
+   int i;
 
-   if (newinputs) 
-     radeonReleaseDmaRegion( rmesa, &rmesa->tcl.indexed_verts, __FUNCTION__ );
+   for (i = 0; i < rmesa->tcl.nr_aos_components; i++) {
+      if (rmesa->tcl.aos[i].bo) {
+         radeon_bo_unref(rmesa->tcl.aos[i].bo);
+         rmesa->tcl.aos[i].bo = NULL;
+      }
+   }
 }