radeon: emit scissor when using cs path
[mesa.git] / src / mesa / drivers / dri / radeon / radeon_mipmap_tree.c
index 3203ee1cba7ae434c3de7ed747818e0af4620824..34d6261706807e919214508321343fcaf432c952 100644 (file)
@@ -94,8 +94,6 @@ static void compute_tex_image_offset(radeon_mipmap_tree *mt,
        /* Find image size in bytes */
        if (mt->compressed) {
                /* TODO: Is this correct? Need test cases for compressed textures! */
-               GLuint align;
-
                lvl->rowstride = (lvl->width * mt->bpp + 63) & ~63;
                lvl->size = radeon_compressed_texture_size(mt->radeon->glCtx,
                                                           lvl->width, lvl->height, lvl->depth, mt->compressed);
@@ -358,3 +356,31 @@ void radeon_try_alloc_miptree(radeonContextPtr rmesa, radeonTexObj *t,
                texImage->Width, texImage->Height, texImage->Depth,
                texImage->TexFormat->TexelBytes, t->tile_bits, compressed);
 }
+
+/* Although we use the image_offset[] array to store relative offsets
+ * to cube faces, Mesa doesn't know anything about this and expects
+ * each cube face to be treated as a separate image.
+ *
+ * These functions present that view to mesa:
+ */
+void
+radeon_miptree_depth_offsets(radeon_mipmap_tree *mt, GLuint level, GLuint *offsets)
+{
+     if (mt->target != GL_TEXTURE_3D || mt->faces == 1)
+        offsets[0] = 0;
+     else {
+       int i;
+       for (i = 0; i < 6; i++)
+               offsets[i] = mt->levels[level].faces[i].offset;
+     }
+}
+
+GLuint
+radeon_miptree_image_offset(radeon_mipmap_tree *mt,
+                           GLuint face, GLuint level)
+{
+   if (mt->target == GL_TEXTURE_CUBE_MAP_ARB)
+      return (mt->levels[level].faces[face].offset);
+   else
+      return mt->levels[level].faces[0].offset;
+}