i915: Remove most of the code under gen >= 4 checks.

[mesa.git] / src / mesa / drivers / dri / radeon / radeon_mipmap_tree.h

diff --git a/src/mesa/drivers/dri/radeon/radeon_mipmap_tree.h b/src/mesa/drivers/dri/radeon/radeon_mipmap_tree.h
index 28b848509547107d8f0975554f142da5ebe731c0..74007ffdebc77b05d64d1c6cbc5306dc15499dd0 100644 (file)
--- a/src/mesa/drivers/dri/radeon/radeon_mipmap_tree.h
+++ b/src/mesa/drivers/dri/radeon/radeon_mipmap_tree.h
@@ -44,11 +44,12 @@ struct _radeon_mipmap_level {
        GLuint depth;
        GLuint size; /** Size of each image, in bytes */
        GLuint rowstride; /** in bytes */
+       GLuint valid;
        radeon_mipmap_image faces[6];
 };
 
 /* store the max possible in the miptree */
-#define RADEON_MIPTREE_MAX_TEXTURE_LEVELS 13
+#define RADEON_MIPTREE_MAX_TEXTURE_LEVELS 15
 
 /**
  * A mipmap tree contains texture images in the layout that the hardware
@@ -70,9 +71,9 @@ struct _radeon_mipmap_tree {
        GLuint baseLevel; /** gl_texture_object->baseLevel it was created for */
        GLuint numLevels; /** Number of mip levels stored in this mipmap tree */
 
-       GLuint width0; /** Width of firstLevel image */
-       GLuint height0; /** Height of firstLevel image */
-       GLuint depth0; /** Depth of firstLevel image */
+       GLuint width0; /** Width of baseLevel image */
+       GLuint height0; /** Height of baseLevel image */
+       GLuint depth0; /** Depth of baseLevel image */
 
        GLuint tilebits; /** RADEON_TXO_xxx_TILE */
 
@@ -83,14 +84,23 @@ void radeon_miptree_reference(radeon_mipmap_tree *mt, radeon_mipmap_tree **ptr);
 void radeon_miptree_unreference(radeon_mipmap_tree **ptr);
 
 GLboolean radeon_miptree_matches_image(radeon_mipmap_tree *mt,
-               struct gl_texture_image *texImage, GLuint face, GLuint level);
+                                      struct gl_texture_image *texImage);
+                                      
 void radeon_try_alloc_miptree(radeonContextPtr rmesa, radeonTexObj *t);
 GLuint radeon_miptree_image_offset(radeon_mipmap_tree *mt,
                                   GLuint face, GLuint level);
-void radeon_miptree_depth_offsets(radeon_mipmap_tree *mt, GLuint level, GLuint *offsets);
+uint32_t get_base_teximage_offset(radeonTexObj *texObj);
 
-unsigned radeon_miptree_level_to_gl_level(struct gl_texture_object *tObj, unsigned level);
-unsigned radeon_gl_level_to_miptree_level(struct gl_texture_object *tObj, unsigned level);
+unsigned get_texture_image_row_stride(radeonContextPtr rmesa, gl_format format, unsigned width, unsigned tiling, unsigned target);
 
-uint32_t get_base_teximage_offset(radeonTexObj *texObj);
+unsigned get_texture_image_size(
+               gl_format format,
+               unsigned rowStride,
+               unsigned height,
+               unsigned depth,
+               unsigned tiling);
+
+radeon_mipmap_tree *radeon_miptree_create(radeonContextPtr rmesa,
+                                         GLenum target, gl_format mesaFormat, GLuint baseLevel, GLuint numLevels,
+                                         GLuint width0, GLuint height0, GLuint depth0, GLuint tilebits);
 #endif /* __RADEON_MIPMAP_TREE_H_ */