#include "main/imports.h"
#include "main/simple_list.h"
-static void radeonQueryGetResult(GLcontext *ctx, struct gl_query_object *q)
+#include <inttypes.h>
+
+static void radeonQueryGetResult(struct gl_context *ctx, struct gl_query_object *q)
{
- radeonContextPtr radeon = RADEON_CONTEXT(ctx);
struct radeon_query_object *query = (struct radeon_query_object *)q;
+ uint32_t *result;
int i;
radeon_print(RADEON_STATE, RADEON_VERBOSE,
__FUNCTION__, query->Base.Id, (int) query->Base.Result);
radeon_bo_map(query->bo, GL_FALSE);
+ result = query->bo->ptr;
query->Base.Result = 0;
- if (IS_R600_CLASS(radeon->radeonScreen)) {
- /* ZPASS EVENT writes alternating qwords
- * At query start we set the start offset to 0 and
- * hw writes zpass start counts to qwords 0, 2, 4, 6.
- * At query end we set the start offset to 8 and
- * hw writes zpass end counts to qwords 1, 3, 5, 7.
- * then we substract. MSB is the valid bit.
- */
- uint64_t *result = query->bo->ptr;
- for (i = 0; i < 8; i += 2) {
- uint64_t start = result[i];
- uint64_t end = result[i + 1];
- if ((start & 0x8000000000000000) && (end & 0x8000000000000000)) {
- uint64_t query_count = end - start;
- query->Base.Result += query_count;
-
- }
- radeon_print(RADEON_STATE, RADEON_TRACE,
- "%d start: %lx, end: %lx %ld\n", i, start, end, end - start);
- }
- } else {
- uint32_t *result = query->bo->ptr;
- for (i = 0; i < query->curr_offset/sizeof(uint32_t); ++i) {
- query->Base.Result += result[i];
- radeon_print(RADEON_STATE, RADEON_TRACE, "result[%d] = %d\n", i, result[i]);
- }
+ for (i = 0; i < query->curr_offset/sizeof(uint32_t); ++i) {
+ query->Base.Result += LE32_TO_CPU(result[i]);
+ radeon_print(RADEON_STATE, RADEON_TRACE, "result[%d] = %d\n", i, LE32_TO_CPU(result[i]));
}
radeon_bo_unmap(query->bo);
}
-static struct gl_query_object * radeonNewQueryObject(GLcontext *ctx, GLuint id)
+static struct gl_query_object * radeonNewQueryObject(struct gl_context *ctx, GLuint id)
{
struct radeon_query_object *query;
- query = _mesa_calloc(sizeof(struct radeon_query_object));
+ query = calloc(1, sizeof(struct radeon_query_object));
query->Base.Id = id;
query->Base.Result = 0;
return &query->Base;
}
-static void radeonDeleteQuery(GLcontext *ctx, struct gl_query_object *q)
+static void radeonDeleteQuery(struct gl_context *ctx, struct gl_query_object *q)
{
struct radeon_query_object *query = (struct radeon_query_object *)q;
radeon_bo_unref(query->bo);
}
- _mesa_free(query);
+ free(query);
}
-static void radeonWaitQuery(GLcontext *ctx, struct gl_query_object *q)
+static void radeonWaitQuery(struct gl_context *ctx, struct gl_query_object *q)
{
radeonContextPtr radeon = RADEON_CONTEXT(ctx);
struct radeon_query_object *query = (struct radeon_query_object *)q;
}
-static void radeonBeginQuery(GLcontext *ctx, struct gl_query_object *q)
+static void radeonBeginQuery(struct gl_context *ctx, struct gl_query_object *q)
{
radeonContextPtr radeon = RADEON_CONTEXT(ctx);
struct radeon_query_object *query = (struct radeon_query_object *)q;
assert(radeon->query.current == NULL);
if (radeon->dma.flush)
- radeon->dma.flush(radeon->glCtx);
+ radeon->dma.flush(&radeon->glCtx);
if (!query->bo) {
query->bo = radeon_bo_open(radeon->radeonScreen->bom, 0, RADEON_QUERY_PAGE_SIZE, RADEON_QUERY_PAGE_SIZE, RADEON_GEM_DOMAIN_GTT, 0);
radeon->hw.is_dirty = GL_TRUE;
}
-void radeonEmitQueryEnd(GLcontext *ctx)
+void radeonEmitQueryEnd(struct gl_context *ctx)
{
radeonContextPtr radeon = RADEON_CONTEXT(ctx);
struct radeon_query_object *query = radeon->query.current;
radeon->vtbl.emit_query_finish(radeon);
}
-static void radeonEndQuery(GLcontext *ctx, struct gl_query_object *q)
+static void radeonEndQuery(struct gl_context *ctx, struct gl_query_object *q)
{
radeonContextPtr radeon = RADEON_CONTEXT(ctx);
radeon_print(RADEON_STATE, RADEON_NORMAL, "%s: query id %d\n", __FUNCTION__, q->Id);
if (radeon->dma.flush)
- radeon->dma.flush(radeon->glCtx);
+ radeon->dma.flush(&radeon->glCtx);
radeonEmitQueryEnd(ctx);
radeon->query.current = NULL;
}
-static void radeonCheckQuery(GLcontext *ctx, struct gl_query_object *q)
+static void radeonCheckQuery(struct gl_context *ctx, struct gl_query_object *q)
{
radeon_print(RADEON_STATE, RADEON_TRACE, "%s: query id %d\n", __FUNCTION__, q->Id);
-
+\
#ifdef DRM_RADEON_GEM_BUSY
radeonContextPtr radeon = RADEON_CONTEXT(ctx);
- if (radeon->radeonScreen->kernel_mm) {
- struct radeon_query_object *query = (struct radeon_query_object *)q;
- uint32_t domain;
-
- /* Need to perform a flush, as per ARB_occlusion_query spec */
- if (radeon_bo_is_referenced_by_cs(query->bo, radeon->cmdbuf.cs)) {
- ctx->Driver.Flush(ctx);
- }
-
- if (radeon_bo_is_busy(query->bo, &domain) == 0) {
- radeonQueryGetResult(ctx, q);
- query->Base.Ready = GL_TRUE;
- }
- } else {
- radeonWaitQuery(ctx, q);
+ struct radeon_query_object *query = (struct radeon_query_object *)q;
+ uint32_t domain;
+
+ /* Need to perform a flush, as per ARB_occlusion_query spec */
+ if (radeon_bo_is_referenced_by_cs(query->bo, radeon->cmdbuf.cs)) {
+ ctx->Driver.Flush(ctx);
+ }
+
+ if (radeon_bo_is_busy(query->bo, &domain) == 0) {
+ radeonQueryGetResult(ctx, q);
+ query->Base.Ready = GL_TRUE;
}
#else
radeonWaitQuery(ctx, q);
functions->WaitQuery = radeonWaitQuery;
}
-int radeon_check_query_active(GLcontext *ctx, struct radeon_state_atom *atom)
+int radeon_check_query_active(struct gl_context *ctx, struct radeon_state_atom *atom)
{
radeonContextPtr radeon = RADEON_CONTEXT(ctx);
struct radeon_query_object *query = radeon->query.current;
return atom->cmd_size;
}
-void radeon_emit_queryobj(GLcontext *ctx, struct radeon_state_atom *atom)
+void radeon_emit_queryobj(struct gl_context *ctx, struct radeon_state_atom *atom)
{
radeonContextPtr radeon = RADEON_CONTEXT(ctx);
BATCH_LOCALS(radeon);
dwords = (*atom->check) (ctx, atom);
- BEGIN_BATCH_NO_AUTOSTATE(dwords);
+ BEGIN_BATCH(dwords);
OUT_BATCH_TABLE(atom->cmd, dwords);
END_BATCH();
projects / mesa.git / blobdiff