Merge remote branch 'main/radeon-rewrite'

[mesa.git] / src / mesa / drivers / dri / radeon / radeon_sanity.c

diff --git a/src/mesa/drivers/dri/radeon/radeon_sanity.c b/src/mesa/drivers/dri/radeon/radeon_sanity.c
index 84112464e16050ec441f38ab3cd8dedf70d2c711..bbed838b592dcff737e2182f495cf171ff144a31 100644 (file)
--- a/src/mesa/drivers/dri/radeon/radeon_sanity.c
+++ b/src/mesa/drivers/dri/radeon/radeon_sanity.c
@@ -1,4 +1,3 @@
-/* $XFree86: xc/lib/GL/mesa/src/drv/radeon/radeon_sanity.c,v 1.1 2002/10/30 12:51:55 alanh Exp $ */
 /**************************************************************************
 
 Copyright 2002 ATI Technologies Inc., Ontario, Canada, and
@@ -34,7 +33,7 @@ USE OR OTHER DEALINGS IN THE SOFTWARE.
  */
 #include <errno.h> 
 
-#include "glheader.h"
+#include "main/glheader.h"
 
 #include "radeon_context.h"
 #include "radeon_ioctl.h"
@@ -147,6 +146,16 @@ static struct {
    { RADEON_PP_CUBIC_FACES_2, 1, "RADEON_PP_CUBIC_FACES_2" },
    { RADEON_PP_CUBIC_OFFSET_T2_0, 5, "RADEON_PP_CUBIC_OFFSET_T2_0" },
    { 0, 2, "R200_PP_TRI_PERF" },
+   { 0, 32, "R200_PP_AFS_0"},   /* 85 */
+   { 0, 32, "R200_PP_AFS_1"},
+   { 0, 8, "R200_ATF_TFACTOR"},
+   { 0, 8, "R200_PP_TXCTLALL_0"},
+   { 0, 8, "R200_PP_TXCTLALL_1"},
+   { 0, 8, "R200_PP_TXCTLALL_2"},
+   { 0, 8, "R200_PP_TXCTLALL_3"},
+   { 0, 8, "R200_PP_TXCTLALL_4"},
+   { 0, 8, "R200_PP_TXCTLALL_5"},
+   { 0, 2, "R200_VAP_PVS_CNTL"},
 };
 
 struct reg_names {
@@ -336,7 +345,7 @@ static void init_regs( void )
    struct reg_names *tmp;
    int i;
 
-   for (i = 0 ; i < Elements(regs) ; i++) {
+   for (i = 0 ; i < Elements(regs)-1 ; i++) {
       regs[i].idx = reg_names[i].idx;
       regs[i].closest = &reg_names[i];
       regs[i].flags = 0;
@@ -478,9 +487,11 @@ static int print_float_reg_assignment( struct reg *reg, float data )
 
 static int print_reg_assignment( struct reg *reg, int data )
 {
+   float_ui32_type datau;
+   datau.ui32 = data;
    reg->flags |= TOUCHED;
    if (reg->flags & ISFLOAT)
-      return print_float_reg_assignment( reg, *(float *)&data );
+      return print_float_reg_assignment( reg, datau.f );
    else
       return print_int_reg_assignment( reg, data );
 }
@@ -962,7 +973,7 @@ static int radeon_emit_packet3_cliprect( drm_radeon_cmd_buffer_t *cmdbuf )
 }
 
 
-int radeonSanityCmdBuffer( radeonContextPtr rmesa,
+int radeonSanityCmdBuffer( r100ContextPtr rmesa,
                           int nbox,
                           drm_clip_rect_t *boxes )
 {