i915: Remove most of the code under gen >= 4 checks.
[mesa.git] / src / mesa / drivers / dri / radeon / radeon_screen.c
index 408d95b7e4a5c4688945c8e0b2c8d17ba6c97df7..04cb7afabbac3511f8005291da7c077710f5b618 100644 (file)
@@ -42,8 +42,8 @@ WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
 #include "main/framebuffer.h"
 #include "main/renderbuffer.h"
 #include "main/fbobject.h"
+#include "swrast/s_renderbuffer.h"
 
-#define STANDALONE_MMIO
 #include "radeon_chipset.h"
 #include "radeon_macros.h"
 #include "radeon_screen.h"
@@ -79,21 +79,21 @@ DRI_CONF_BEGIN
         DRI_CONF_FTHROTTLE_MODE(DRI_CONF_FTHROTTLE_IRQS)
         DRI_CONF_VBLANK_MODE(DRI_CONF_VBLANK_DEF_INTERVAL_0)
         DRI_CONF_MAX_TEXTURE_UNITS(3,2,3)
-        DRI_CONF_HYPERZ(false)
+        DRI_CONF_HYPERZ("false")
         DRI_CONF_COMMAND_BUFFER_SIZE(8, 8, 32)
     DRI_CONF_SECTION_END
     DRI_CONF_SECTION_QUALITY
         DRI_CONF_TEXTURE_DEPTH(DRI_CONF_TEXTURE_DEPTH_FB)
         DRI_CONF_DEF_MAX_ANISOTROPY(1.0,"1.0,2.0,4.0,8.0,16.0")
-        DRI_CONF_NO_NEG_LOD_BIAS(false)
-        DRI_CONF_FORCE_S3TC_ENABLE(false)
+        DRI_CONF_NO_NEG_LOD_BIAS("false")
+        DRI_CONF_FORCE_S3TC_ENABLE("false")
         DRI_CONF_COLOR_REDUCTION(DRI_CONF_COLOR_REDUCTION_DITHER)
         DRI_CONF_ROUND_MODE(DRI_CONF_ROUND_TRUNC)
         DRI_CONF_DITHER_MODE(DRI_CONF_DITHER_XERRORDIFF)
         DRI_CONF_ALLOW_LARGE_TEXTURES(2)
     DRI_CONF_SECTION_END
     DRI_CONF_SECTION_DEBUG
-        DRI_CONF_NO_RAST(false)
+        DRI_CONF_NO_RAST("false")
     DRI_CONF_SECTION_END
 DRI_CONF_END;
 static const GLuint __driNConfigOptions = 15;
@@ -107,14 +107,14 @@ DRI_CONF_BEGIN
         DRI_CONF_FTHROTTLE_MODE(DRI_CONF_FTHROTTLE_IRQS)
         DRI_CONF_VBLANK_MODE(DRI_CONF_VBLANK_DEF_INTERVAL_0)
         DRI_CONF_MAX_TEXTURE_UNITS(6,2,6)
-        DRI_CONF_HYPERZ(false)
+        DRI_CONF_HYPERZ("false")
         DRI_CONF_COMMAND_BUFFER_SIZE(8, 8, 32)
     DRI_CONF_SECTION_END
     DRI_CONF_SECTION_QUALITY
         DRI_CONF_TEXTURE_DEPTH(DRI_CONF_TEXTURE_DEPTH_FB)
         DRI_CONF_DEF_MAX_ANISOTROPY(1.0,"1.0,2.0,4.0,8.0,16.0")
-        DRI_CONF_NO_NEG_LOD_BIAS(false)
-        DRI_CONF_FORCE_S3TC_ENABLE(false)
+        DRI_CONF_NO_NEG_LOD_BIAS("false")
+        DRI_CONF_FORCE_S3TC_ENABLE("false")
         DRI_CONF_COLOR_REDUCTION(DRI_CONF_COLOR_REDUCTION_DITHER)
         DRI_CONF_ROUND_MODE(DRI_CONF_ROUND_TRUNC)
         DRI_CONF_DITHER_MODE(DRI_CONF_DITHER_XERRORDIFF)
@@ -122,13 +122,10 @@ DRI_CONF_BEGIN
         DRI_CONF_TEXTURE_BLEND_QUALITY(1.0,"0.0:1.0")
     DRI_CONF_SECTION_END
     DRI_CONF_SECTION_DEBUG
-        DRI_CONF_NO_RAST(false)
-    DRI_CONF_SECTION_END
-    DRI_CONF_SECTION_SOFTWARE
-        DRI_CONF_NV_VERTEX_PROGRAM(false)
+        DRI_CONF_NO_RAST("false")
     DRI_CONF_SECTION_END
 DRI_CONF_END;
-static const GLuint __driNConfigOptions = 17;
+static const GLuint __driNConfigOptions = 16;
 
 #endif
 
@@ -191,11 +188,11 @@ radeonDRI2Flush(__DRIdrawable *drawable)
     radeonContextPtr rmesa;
 
     rmesa = (radeonContextPtr) drawable->driContextPriv->driverPrivate;
-    radeonFlush(rmesa->glCtx);
+    radeonFlush(&rmesa->glCtx);
 }
 
 static const struct __DRI2flushExtensionRec radeonFlushExtension = {
-    { __DRI2_FLUSH, __DRI2_FLUSH_VERSION },
+    { __DRI2_FLUSH, 3 },
     radeonDRI2Flush,
     dri2InvalidateDrawable,
 };
@@ -211,7 +208,7 @@ radeon_create_image_from_name(__DRIscreen *screen,
    if (name == 0)
       return NULL;
 
-   image = CALLOC(sizeof *image);
+   image = calloc(1, sizeof *image);
    if (image == NULL)
       return NULL;
 
@@ -250,7 +247,7 @@ radeon_create_image_from_name(__DRIscreen *screen,
                               0);
 
    if (image->bo == NULL) {
-      FREE(image);
+      free(image);
       return NULL;
    }
 
@@ -266,22 +263,22 @@ radeon_create_image_from_renderbuffer(__DRIcontext *context,
    struct gl_renderbuffer *rb;
    struct radeon_renderbuffer *rrb;
 
-   rb = _mesa_lookup_renderbuffer(radeon->glCtx, renderbuffer);
+   rb = _mesa_lookup_renderbuffer(&radeon->glCtx, renderbuffer);
    if (!rb) {
-      _mesa_error(radeon->glCtx,
+      _mesa_error(&radeon->glCtx,
                   GL_INVALID_OPERATION, "glRenderbufferExternalMESA");
       return NULL;
    }
 
    rrb = radeon_renderbuffer(rb);
-   image = CALLOC(sizeof *image);
+   image = calloc(1, sizeof *image);
    if (image == NULL)
       return NULL;
 
    image->internal_format = rb->InternalFormat;
    image->format = rb->Format;
    image->cpp = rrb->cpp;
-   image->data_type = rb->DataType;
+   image->data_type = GL_UNSIGNED_BYTE;
    image->data = loaderPrivate;
    radeon_bo_ref(rrb->bo);
    image->bo = rrb->bo;
@@ -297,7 +294,7 @@ static void
 radeon_destroy_image(__DRIimage *image)
 {
    radeon_bo_unref(image->bo);
-   FREE(image);
+   free(image);
 }
 
 static __DRIimage *
@@ -309,10 +306,12 @@ radeon_create_image(__DRIscreen *screen,
    __DRIimage *image;
    radeonScreenPtr radeonScreen = screen->driverPrivate;
 
-   image = CALLOC(sizeof *image);
+   image = calloc(1, sizeof *image);
    if (image == NULL)
       return NULL;
 
+   image->dri_format = format;
+
    switch (format) {
    case __DRI_IMAGE_FORMAT_RGB565:
       image->format = MESA_FORMAT_RGB565;
@@ -348,7 +347,7 @@ radeon_create_image(__DRIscreen *screen,
                               0);
 
    if (image->bo == NULL) {
-      FREE(image);
+      free(image);
       return NULL;
    }
 
@@ -374,7 +373,7 @@ radeon_query_image(__DRIimage *image, int attrib, int *value)
 }
 
 static struct __DRIimageExtensionRec radeonImageExtension = {
-    { __DRI_IMAGE, __DRI_IMAGE_VERSION },
+    { __DRI_IMAGE, 1 },
    radeon_create_image_from_name,
    radeon_create_image_from_renderbuffer,
    radeon_destroy_image,
@@ -417,7 +416,7 @@ static int radeon_set_screen_flags(radeonScreenPtr screen, int device_id)
    case PCI_CHIP_RADEON_QG:
       /* all original radeons (7200) presumably have a stencil op bug */
       screen->chip_family = CHIP_FAMILY_R100;
-      screen->chip_flags = RADEON_CHIPSET_TCL | RADEON_CHIPSET_BROKEN_STENCIL;
+      screen->chip_flags = RADEON_CHIPSET_TCL | RADEON_CHIPSET_BROKEN_STENCIL | RADEON_CHIPSET_DEPTH_ALWAYS_TILED;
       break;
 
    case PCI_CHIP_RV200_QW:
@@ -485,7 +484,7 @@ radeonCreateScreen2(__DRIscreen *sPriv)
    uint32_t device_id = 0;
 
    /* Allocate the private area */
-   screen = (radeonScreenPtr) CALLOC( sizeof(*screen) );
+   screen = calloc(1, sizeof(*screen));
    if ( !screen ) {
       fprintf(stderr, "%s: Could not allocate memory for screen structure", __FUNCTION__);
       fprintf(stderr, "leaving here\n");
@@ -504,16 +503,18 @@ radeonCreateScreen2(__DRIscreen *sPriv)
 
    ret = radeonGetParam(sPriv, RADEON_PARAM_DEVICE_ID, &device_id);
    if (ret) {
-     FREE( screen );
+     free( screen );
      fprintf(stderr, "drm_radeon_getparam_t (RADEON_PARAM_DEVICE_ID): %d\n", ret);
      return NULL;
    }
 
    ret = radeon_set_screen_flags(screen, device_id);
-   if (ret == -1)
+   if (ret == -1) {
+     free(screen);
      return NULL;
+   }
 
-   if (getenv("R300_NO_TCL"))
+   if (getenv("RADEON_NO_TCL"))
           screen->chip_flags &= ~RADEON_CHIPSET_TCL;
 
    i = 0;
@@ -558,7 +559,7 @@ radeonDestroyScreen( __DRIscreen *sPriv )
     /* free all option information */
     driDestroyOptionInfo (&screen->optionCache);
 
-    FREE( screen );
+    free( screen );
     sPriv->driverPrivate = NULL;
 }
 
@@ -619,13 +620,13 @@ radeonCreateBuffer( __DRIscreen *driScrnPriv,
 
     /* front color renderbuffer */
     rfb->color_rb[0] = radeon_create_renderbuffer(rgbFormat, driDrawPriv);
-    _mesa_add_renderbuffer(&rfb->base, BUFFER_FRONT_LEFT, &rfb->color_rb[0]->base);
+    _mesa_add_renderbuffer(&rfb->base, BUFFER_FRONT_LEFT, &rfb->color_rb[0]->base.Base);
     rfb->color_rb[0]->has_surface = 1;
 
     /* back color renderbuffer */
     if (mesaVis->doubleBufferMode) {
       rfb->color_rb[1] = radeon_create_renderbuffer(rgbFormat, driDrawPriv);
-       _mesa_add_renderbuffer(&rfb->base, BUFFER_BACK_LEFT, &rfb->color_rb[1]->base);
+       _mesa_add_renderbuffer(&rfb->base, BUFFER_BACK_LEFT, &rfb->color_rb[1]->base.Base);
        rfb->color_rb[1]->has_surface = 1;
     }
 
@@ -633,25 +634,25 @@ radeonCreateBuffer( __DRIscreen *driScrnPriv,
       if (mesaVis->stencilBits == 8) {
        struct radeon_renderbuffer *depthStencilRb =
            radeon_create_renderbuffer(MESA_FORMAT_S8_Z24, driDrawPriv);
-       _mesa_add_renderbuffer(&rfb->base, BUFFER_DEPTH, &depthStencilRb->base);
-       _mesa_add_renderbuffer(&rfb->base, BUFFER_STENCIL, &depthStencilRb->base);
+       _mesa_add_renderbuffer(&rfb->base, BUFFER_DEPTH, &depthStencilRb->base.Base);
+       _mesa_add_renderbuffer(&rfb->base, BUFFER_STENCIL, &depthStencilRb->base.Base);
        depthStencilRb->has_surface = screen->depthHasSurface;
       } else {
        /* depth renderbuffer */
        struct radeon_renderbuffer *depth =
            radeon_create_renderbuffer(MESA_FORMAT_X8_Z24, driDrawPriv);
-       _mesa_add_renderbuffer(&rfb->base, BUFFER_DEPTH, &depth->base);
+       _mesa_add_renderbuffer(&rfb->base, BUFFER_DEPTH, &depth->base.Base);
        depth->has_surface = screen->depthHasSurface;
       }
     } else if (mesaVis->depthBits == 16) {
         /* just 16-bit depth buffer, no hw stencil */
        struct radeon_renderbuffer *depth =
            radeon_create_renderbuffer(MESA_FORMAT_Z16, driDrawPriv);
-       _mesa_add_renderbuffer(&rfb->base, BUFFER_DEPTH, &depth->base);
+       _mesa_add_renderbuffer(&rfb->base, BUFFER_DEPTH, &depth->base.Base);
        depth->has_surface = screen->depthHasSurface;
     }
 
-    _mesa_add_soft_renderbuffers(&rfb->base,
+    _swrast_add_soft_renderbuffers(&rfb->base,
            GL_FALSE, /* color */
            swDepth,
            swStencil,
@@ -699,8 +700,6 @@ radeonDestroyBuffer(__DRIdrawable *driDrawPriv)
     _mesa_reference_framebuffer((struct gl_framebuffer **)(&(driDrawPriv->driverPrivate)), NULL);
 }
 
-#define ARRAY_SIZE(a) (sizeof (a) / sizeof ((a)[0]))
-
 /**
  * This is the driver specific part of the createNewScreen entry point.
  * Called when using DRI2.
@@ -710,8 +709,11 @@ radeonDestroyBuffer(__DRIdrawable *driDrawPriv)
 static const
 __DRIconfig **radeonInitScreen2(__DRIscreen *psp)
 {
-   GLenum fb_format[3];
-   GLenum fb_type[3];
+   static const gl_format formats[3] = {
+      MESA_FORMAT_RGB565,
+      MESA_FORMAT_XRGB8888,
+      MESA_FORMAT_ARGB8888
+   };
    /* GLX_SWAP_COPY_OML is only supported because the Intel driver doesn't
     * support pageflipping at all.
     */
@@ -736,19 +738,10 @@ __DRIconfig **radeonInitScreen2(__DRIscreen *psp)
 
    msaa_samples_array[0] = 0;
 
-   fb_format[0] = GL_RGB;
-   fb_type[0] = GL_UNSIGNED_SHORT_5_6_5;
-
-   fb_format[1] = GL_BGR;
-   fb_type[1] = GL_UNSIGNED_INT_8_8_8_8_REV;
-
-   fb_format[2] = GL_BGRA;
-   fb_type[2] = GL_UNSIGNED_INT_8_8_8_8_REV;
-
-   for (color = 0; color < ARRAY_SIZE(fb_format); color++) {
+   for (color = 0; color < ARRAY_SIZE(formats); color++) {
       __DRIconfig **new_configs;
 
-      new_configs = driCreateConfigs(fb_format[color], fb_type[color],
+      new_configs = driCreateConfigs(formats[color],
                                     depth_bits,
                                     stencil_bits,
                                     ARRAY_SIZE(depth_bits),
@@ -757,10 +750,7 @@ __DRIconfig **radeonInitScreen2(__DRIscreen *psp)
                                     msaa_samples_array,
                                     ARRAY_SIZE(msaa_samples_array),
                                     GL_TRUE);
-      if (configs == NULL)
-        configs = new_configs;
-      else
-        configs = driConcatConfigs(configs, new_configs);
+      configs = driConcatConfigs(configs, new_configs);
    }
 
    if (configs == NULL) {