#include "radeon_chipset.h"
#include "radeon_macros.h"
#include "radeon_screen.h"
-#include "radeon_buffer.h"
+#include "radeon_common.h"
+#include "radeon_span.h"
#if !RADEON_COMMON
#include "radeon_context.h"
-#include "radeon_span.h"
#include "radeon_tex.h"
#elif RADEON_COMMON && defined(RADEON_COMMON_FOR_R200)
#include "r200_context.h"
#include "r200_ioctl.h"
-#include "r200_span.h"
#include "r200_tex.h"
#elif RADEON_COMMON && defined(RADEON_COMMON_FOR_R300)
#include "r300_context.h"
#include "r300_fragprog.h"
#include "r300_tex.h"
-#include "radeon_span.h"
#endif
#include "utils.h"
#include "vblank.h"
#include "drirenderbuffer.h"
+#include "radeon_bocs_wrapper.h"
+
#include "GL/internal/dri_interface.h"
/* Radeon configuration
*/
#include "xmlpool.h"
-#include "radeon_bo_legacy.h"
-#include "radeon_bo_gem.h"
+
+#define DRI_CONF_COMMAND_BUFFER_SIZE(def,min,max) \
+DRI_CONF_OPT_BEGIN_V(command_buffer_size,int,def, # min ":" # max ) \
+ DRI_CONF_DESC(en,"Size of command buffer (in KB)") \
+ DRI_CONF_DESC(de,"Grösse des Befehlspuffers (in KB)") \
+DRI_CONF_OPT_END
#if !RADEON_COMMON /* R100 */
PUBLIC const char __driConfigOptions[] =
DRI_CONF_VBLANK_MODE(DRI_CONF_VBLANK_DEF_INTERVAL_0)
DRI_CONF_MAX_TEXTURE_UNITS(3,2,3)
DRI_CONF_HYPERZ(false)
+ DRI_CONF_COMMAND_BUFFER_SIZE(8, 8, 32)
DRI_CONF_SECTION_END
DRI_CONF_SECTION_QUALITY
DRI_CONF_TEXTURE_DEPTH(DRI_CONF_TEXTURE_DEPTH_FB)
DRI_CONF_NO_RAST(false)
DRI_CONF_SECTION_END
DRI_CONF_END;
-static const GLuint __driNConfigOptions = 14;
+static const GLuint __driNConfigOptions = 15;
#elif RADEON_COMMON && defined(RADEON_COMMON_FOR_R200)
DRI_CONF_VBLANK_MODE(DRI_CONF_VBLANK_DEF_INTERVAL_0)
DRI_CONF_MAX_TEXTURE_UNITS(6,2,6)
DRI_CONF_HYPERZ(false)
+ DRI_CONF_COMMAND_BUFFER_SIZE(8, 8, 32)
DRI_CONF_SECTION_END
DRI_CONF_SECTION_QUALITY
DRI_CONF_TEXTURE_DEPTH(DRI_CONF_TEXTURE_DEPTH_FB)
DRI_CONF_NV_VERTEX_PROGRAM(false)
DRI_CONF_SECTION_END
DRI_CONF_END;
-static const GLuint __driNConfigOptions = 16;
+static const GLuint __driNConfigOptions = 17;
extern const struct dri_extension blend_extensions[];
extern const struct dri_extension ARB_vp_extension[];
DRI_CONF_DESC(de,"Anzahl der Texturkoordinateneinheiten") \
DRI_CONF_OPT_END
-#define DRI_CONF_COMMAND_BUFFER_SIZE(def,min,max) \
-DRI_CONF_OPT_BEGIN_V(command_buffer_size,int,def, # min ":" # max ) \
- DRI_CONF_DESC(en,"Size of command buffer (in KB)") \
- DRI_CONF_DESC(de,"Grösse des Befehlspuffers (in KB)") \
-DRI_CONF_OPT_END
+
#define DRI_CONF_DISABLE_S3TC(def) \
DRI_CONF_OPT_BEGIN(disable_s3tc,bool,def) \
DRI_CONF_END;
static const GLuint __driNConfigOptions = 17;
+extern const struct dri_extension gl_20_extension[];
+
#ifndef RADEON_DEBUG
-int RADEON_DEBUG = 0;
static const struct dri_debug_control debug_control[] = {
{"fall", DEBUG_FALLBACKS},
uint8_t depth_bits_array[2];
uint8_t stencil_bits_array[2];
-
+ uint8_t msaa_samples_array[1];
depth_bits_array[0] = depth_bits;
depth_bits_array[1] = depth_bits;
stencil_bits_array[0] = 0;
stencil_bits_array[1] = (stencil_bits == 0) ? 8 : stencil_bits;
+ msaa_samples_array[0] = 0;
+
depth_buffer_factor = ((depth_bits != 0) || (stencil_bits != 0)) ? 2 : 1;
back_buffer_factor = (have_back_buffer) ? 2 : 1;
configs = driCreateConfigs(fb_format, fb_type,
depth_bits_array, stencil_bits_array,
depth_buffer_factor,
- back_buffer_modes, back_buffer_factor);
+ back_buffer_modes, back_buffer_factor,
+ msaa_samples_array, 1);
if (configs == NULL) {
fprintf( stderr, "[%s:%u] Error creating FBConfig!\n",
__func__, __LINE__ );
{ __DRI_TEX_OFFSET, __DRI_TEX_OFFSET_VERSION },
radeonSetTexOffset,
};
+
+static const __DRItexBufferExtension radeonTexBufferExtension = {
+ { __DRI_TEX_BUFFER, __DRI_TEX_BUFFER_VERSION },
+ radeonSetTexBuffer,
+};
#endif
#if RADEON_COMMON && defined(RADEON_COMMON_FOR_R200)
{ __DRI_TEX_OFFSET, __DRI_TEX_OFFSET_VERSION },
r200SetTexOffset,
};
+
+static const __DRItexBufferExtension r200TexBufferExtension = {
+ { __DRI_TEX_BUFFER, __DRI_TEX_BUFFER_VERSION },
+ r200SetTexBuffer,
+};
#endif
#if RADEON_COMMON && defined(RADEON_COMMON_FOR_R300)
r300SetTexOffset,
};
-void r300SetTexBuffer(__DRIcontext *pDRICtx,
- GLint target,
- __DRIdrawable *dPriv);
static const __DRItexBufferExtension r300TexBufferExtension = {
{ __DRI_TEX_BUFFER, __DRI_TEX_BUFFER_VERSION },
r300SetTexBuffer,
};
#endif
-/* Create the device specific screen private data struct.
- */
-static radeonScreenPtr
-radeonCreateScreen( __DRIscreenPrivate *sPriv )
+static int radeon_set_screen_flags(radeonScreenPtr screen, int device_id)
{
- radeonScreenPtr screen;
- RADEONDRIPtr dri_priv = (RADEONDRIPtr)sPriv->pDevPriv;
- unsigned char *RADEONMMIO = NULL;
- int i;
- int ret;
- uint32_t temp;
-
- if (sPriv->devPrivSize != sizeof(RADEONDRIRec)) {
- fprintf(stderr,"\nERROR! sizeof(RADEONDRIRec) does not match passed size from device driver\n");
- return GL_FALSE;
- }
-
- /* Allocate the private area */
- screen = (radeonScreenPtr) CALLOC( sizeof(*screen) );
- if ( !screen ) {
- __driUtilMessage("%s: Could not allocate memory for screen structure",
- __FUNCTION__);
- return NULL;
- }
-
-#if DO_DEBUG && RADEON_COMMON && defined(RADEON_COMMON_FOR_R300)
- RADEON_DEBUG = driParseDebugString(getenv("RADEON_DEBUG"), debug_control);
-#endif
-
- /* parse information in __driConfigOptions */
- driParseOptionInfo (&screen->optionCache,
- __driConfigOptions, __driNConfigOptions);
-
- /* This is first since which regions we map depends on whether or
- * not we are using a PCI card.
- */
- screen->card_type = (dri_priv->IsPCI ? RADEON_CARD_PCI : RADEON_CARD_AGP);
- {
- int ret;
-
-#ifdef RADEON_PARAM_KERNEL_MM
- ret = radeonGetParam( sPriv->fd, RADEON_PARAM_KERNEL_MM,
- &screen->kernel_mm);
-
- if (ret && ret != -EINVAL) {
- FREE( screen );
- fprintf(stderr, "drm_radeon_getparam_t (RADEON_OFFSET): %d\n", ret);
- return NULL;
- }
-
- if (ret == -EINVAL)
- screen->kernel_mm = 0;
-#endif
-
- ret = radeonGetParam( sPriv->fd, RADEON_PARAM_GART_BUFFER_OFFSET,
- &screen->gart_buffer_offset);
-
- if (ret) {
- FREE( screen );
- fprintf(stderr, "drm_radeon_getparam_t (RADEON_PARAM_GART_BUFFER_OFFSET): %d\n", ret);
- return NULL;
- }
-
- ret = radeonGetParam( sPriv->fd, RADEON_PARAM_GART_BASE,
- &screen->gart_base);
- if (ret) {
- FREE( screen );
- fprintf(stderr, "drm_radeon_getparam_t (RADEON_PARAM_GART_BASE): %d\n", ret);
- return NULL;
- }
-
- ret = radeonGetParam( sPriv->fd, RADEON_PARAM_IRQ_NR,
- &screen->irq);
- if (ret) {
- FREE( screen );
- fprintf(stderr, "drm_radeon_getparam_t (RADEON_PARAM_IRQ_NR): %d\n", ret);
- return NULL;
- }
- screen->drmSupportsCubeMapsR200 = (sPriv->drm_version.minor >= 7);
- screen->drmSupportsBlendColor = (sPriv->drm_version.minor >= 11);
- screen->drmSupportsTriPerf = (sPriv->drm_version.minor >= 16);
- screen->drmSupportsFragShader = (sPriv->drm_version.minor >= 18);
- screen->drmSupportsPointSprites = (sPriv->drm_version.minor >= 13);
- screen->drmSupportsCubeMapsR100 = (sPriv->drm_version.minor >= 15);
- screen->drmSupportsVertexProgram = (sPriv->drm_version.minor >= 25);
- }
-
- if (!screen->kernel_mm) {
- screen->mmio.handle = dri_priv->registerHandle;
- screen->mmio.size = dri_priv->registerSize;
- if ( drmMap( sPriv->fd,
- screen->mmio.handle,
- screen->mmio.size,
- &screen->mmio.map ) ) {
- FREE( screen );
- __driUtilMessage("%s: drmMap failed\n", __FUNCTION__ );
- return NULL;
- }
-
- RADEONMMIO = screen->mmio.map;
-
- screen->status.handle = dri_priv->statusHandle;
- screen->status.size = dri_priv->statusSize;
- if ( drmMap( sPriv->fd,
- screen->status.handle,
- screen->status.size,
- &screen->status.map ) ) {
- drmUnmap( screen->mmio.map, screen->mmio.size );
- FREE( screen );
- __driUtilMessage("%s: drmMap (2) failed\n", __FUNCTION__ );
- return NULL;
- }
- screen->scratch = (__volatile__ uint32_t *)
- ((GLubyte *)screen->status.map + RADEON_SCRATCH_REG_OFFSET);
-
- screen->buffers = drmMapBufs( sPriv->fd );
- if ( !screen->buffers ) {
- drmUnmap( screen->status.map, screen->status.size );
- drmUnmap( screen->mmio.map, screen->mmio.size );
- FREE( screen );
- __driUtilMessage("%s: drmMapBufs failed\n", __FUNCTION__ );
- return NULL;
- }
-
- if ( dri_priv->gartTexHandle && dri_priv->gartTexMapSize ) {
- screen->gartTextures.handle = dri_priv->gartTexHandle;
- screen->gartTextures.size = dri_priv->gartTexMapSize;
- if ( drmMap( sPriv->fd,
- screen->gartTextures.handle,
- screen->gartTextures.size,
- (drmAddressPtr)&screen->gartTextures.map ) ) {
- drmUnmapBufs( screen->buffers );
- drmUnmap( screen->status.map, screen->status.size );
- drmUnmap( screen->mmio.map, screen->mmio.size );
- FREE( screen );
- __driUtilMessage("%s: drmMap failed for GART texture area\n", __FUNCTION__);
- return NULL;
- }
-
- screen->gart_texture_offset = dri_priv->gartTexOffset + screen->gart_base;
- }
- }
-
screen->chip_flags = 0;
- /* XXX: add more chipsets */
- switch ( dri_priv->deviceID ) {
+ switch ( device_id ) {
case PCI_CHIP_RADEON_LY:
case PCI_CHIP_RADEON_LZ:
case PCI_CHIP_RADEON_QY:
screen->chip_family = CHIP_FAMILY_RS400;
break;
+ case PCI_CHIP_RS600_793F:
+ case PCI_CHIP_RS600_7941:
+ case PCI_CHIP_RS600_7942:
+ screen->chip_family = CHIP_FAMILY_RS600;
+ break;
+
case PCI_CHIP_RS690_791E:
case PCI_CHIP_RS690_791F:
screen->chip_family = CHIP_FAMILY_RS690;
default:
fprintf(stderr, "unknown chip id 0x%x, can't guess.\n",
- dri_priv->deviceID);
+ device_id);
+ return -1;
+ }
+
+ return 0;
+}
+
+
+/* Create the device specific screen private data struct.
+ */
+static radeonScreenPtr
+radeonCreateScreen( __DRIscreenPrivate *sPriv )
+{
+ radeonScreenPtr screen;
+ RADEONDRIPtr dri_priv = (RADEONDRIPtr)sPriv->pDevPriv;
+ unsigned char *RADEONMMIO = NULL;
+ int i;
+ int ret;
+ uint32_t temp = 0;
+
+ if (sPriv->devPrivSize != sizeof(RADEONDRIRec)) {
+ fprintf(stderr,"\nERROR! sizeof(RADEONDRIRec) does not match passed size from device driver\n");
+ return GL_FALSE;
+ }
+
+ /* Allocate the private area */
+ screen = (radeonScreenPtr) CALLOC( sizeof(*screen) );
+ if ( !screen ) {
+ __driUtilMessage("%s: Could not allocate memory for screen structure",
+ __FUNCTION__);
return NULL;
}
+
+#if DO_DEBUG && RADEON_COMMON && defined(RADEON_COMMON_FOR_R300)
+ RADEON_DEBUG = driParseDebugString(getenv("RADEON_DEBUG"), debug_control);
+#endif
+
+ /* parse information in __driConfigOptions */
+ driParseOptionInfo (&screen->optionCache,
+ __driConfigOptions, __driNConfigOptions);
+
+ /* This is first since which regions we map depends on whether or
+ * not we are using a PCI card.
+ */
+ screen->card_type = (dri_priv->IsPCI ? RADEON_CARD_PCI : RADEON_CARD_AGP);
+ {
+ int ret;
+
+#ifdef RADEON_PARAM_KERNEL_MM
+ ret = radeonGetParam( sPriv->fd, RADEON_PARAM_KERNEL_MM,
+ &screen->kernel_mm);
+
+ if (ret && ret != -EINVAL) {
+ FREE( screen );
+ fprintf(stderr, "drm_radeon_getparam_t (RADEON_OFFSET): %d\n", ret);
+ return NULL;
+ }
+
+ if (ret == -EINVAL)
+ screen->kernel_mm = 0;
+#endif
+
+ ret = radeonGetParam( sPriv->fd, RADEON_PARAM_GART_BUFFER_OFFSET,
+ &screen->gart_buffer_offset);
+
+ if (ret) {
+ FREE( screen );
+ fprintf(stderr, "drm_radeon_getparam_t (RADEON_PARAM_GART_BUFFER_OFFSET): %d\n", ret);
+ return NULL;
+ }
+
+ ret = radeonGetParam( sPriv->fd, RADEON_PARAM_GART_BASE,
+ &screen->gart_base);
+ if (ret) {
+ FREE( screen );
+ fprintf(stderr, "drm_radeon_getparam_t (RADEON_PARAM_GART_BASE): %d\n", ret);
+ return NULL;
+ }
+
+ ret = radeonGetParam( sPriv->fd, RADEON_PARAM_IRQ_NR,
+ &screen->irq);
+ if (ret) {
+ FREE( screen );
+ fprintf(stderr, "drm_radeon_getparam_t (RADEON_PARAM_IRQ_NR): %d\n", ret);
+ return NULL;
+ }
+ screen->drmSupportsCubeMapsR200 = (sPriv->drm_version.minor >= 7);
+ screen->drmSupportsBlendColor = (sPriv->drm_version.minor >= 11);
+ screen->drmSupportsTriPerf = (sPriv->drm_version.minor >= 16);
+ screen->drmSupportsFragShader = (sPriv->drm_version.minor >= 18);
+ screen->drmSupportsPointSprites = (sPriv->drm_version.minor >= 13);
+ screen->drmSupportsCubeMapsR100 = (sPriv->drm_version.minor >= 15);
+ screen->drmSupportsVertexProgram = (sPriv->drm_version.minor >= 25);
+ }
+
+ if (!screen->kernel_mm) {
+ screen->mmio.handle = dri_priv->registerHandle;
+ screen->mmio.size = dri_priv->registerSize;
+ if ( drmMap( sPriv->fd,
+ screen->mmio.handle,
+ screen->mmio.size,
+ &screen->mmio.map ) ) {
+ FREE( screen );
+ __driUtilMessage("%s: drmMap failed\n", __FUNCTION__ );
+ return NULL;
+ }
+
+ RADEONMMIO = screen->mmio.map;
+
+ screen->status.handle = dri_priv->statusHandle;
+ screen->status.size = dri_priv->statusSize;
+ if ( drmMap( sPriv->fd,
+ screen->status.handle,
+ screen->status.size,
+ &screen->status.map ) ) {
+ drmUnmap( screen->mmio.map, screen->mmio.size );
+ FREE( screen );
+ __driUtilMessage("%s: drmMap (2) failed\n", __FUNCTION__ );
+ return NULL;
+ }
+ screen->scratch = (__volatile__ uint32_t *)
+ ((GLubyte *)screen->status.map + RADEON_SCRATCH_REG_OFFSET);
+
+ screen->buffers = drmMapBufs( sPriv->fd );
+ if ( !screen->buffers ) {
+ drmUnmap( screen->status.map, screen->status.size );
+ drmUnmap( screen->mmio.map, screen->mmio.size );
+ FREE( screen );
+ __driUtilMessage("%s: drmMapBufs failed\n", __FUNCTION__ );
+ return NULL;
+ }
+
+ if ( dri_priv->gartTexHandle && dri_priv->gartTexMapSize ) {
+ screen->gartTextures.handle = dri_priv->gartTexHandle;
+ screen->gartTextures.size = dri_priv->gartTexMapSize;
+ if ( drmMap( sPriv->fd,
+ screen->gartTextures.handle,
+ screen->gartTextures.size,
+ (drmAddressPtr)&screen->gartTextures.map ) ) {
+ drmUnmapBufs( screen->buffers );
+ drmUnmap( screen->status.map, screen->status.size );
+ drmUnmap( screen->mmio.map, screen->mmio.size );
+ FREE( screen );
+ __driUtilMessage("%s: drmMap failed for GART texture area\n", __FUNCTION__);
+ return NULL;
+ }
+
+ screen->gart_texture_offset = dri_priv->gartTexOffset + screen->gart_base;
+ }
+ }
+
+
+ ret = radeon_set_screen_flags(screen, dri_priv->deviceID);
+ if (ret == -1)
+ return NULL;
+
if ((screen->chip_family == CHIP_FAMILY_R350 || screen->chip_family == CHIP_FAMILY_R300) &&
sPriv->ddx_version.minor < 2) {
fprintf(stderr, "xf86-video-ati-6.6.2 or newer needed for Radeon 9500/9700/9800 cards.\n");
ret = radeonGetParam( sPriv->fd, RADEON_PARAM_FB_LOCATION,
&temp);
if (ret) {
- if (screen->chip_family < CHIP_FAMILY_RS690 && !screen->kernel_mm)
+ if (screen->chip_family < CHIP_FAMILY_RS600 && !screen->kernel_mm)
screen->fbLocation = ( INREG( RADEON_MC_FB_LOCATION ) & 0xffff) << 16;
else {
FREE( screen );
screen->fbLocation = (temp & 0xffff) << 16;
}
- if (screen->chip_family >= CHIP_FAMILY_RV515) {
+ if (screen->chip_family >= CHIP_FAMILY_R300) {
ret = radeonGetParam( sPriv->fd, RADEON_PARAM_NUM_GB_PIPES,
&temp);
if (ret) {
screen->extensions[i++] = &driMediaStreamCounterExtension.base;
}
+ if (!screen->kernel_mm) {
#if !RADEON_COMMON
- screen->extensions[i++] = &radeonTexOffsetExtension.base;
+ screen->extensions[i++] = &radeonTexOffsetExtension.base;
#endif
#if RADEON_COMMON && defined(RADEON_COMMON_FOR_R200)
- if (IS_R200_CLASS(screen))
- screen->extensions[i++] = &r200AllocateExtension.base;
+ if (IS_R200_CLASS(screen))
+ screen->extensions[i++] = &r200AllocateExtension.base;
- screen->extensions[i++] = &r200texOffsetExtension.base;
+ screen->extensions[i++] = &r200texOffsetExtension.base;
#endif
#if RADEON_COMMON && defined(RADEON_COMMON_FOR_R300)
- screen->extensions[i++] = &r300texOffsetExtension.base;
+ screen->extensions[i++] = &r300texOffsetExtension.base;
#endif
+ }
screen->extensions[i++] = NULL;
sPriv->extensions = screen->extensions;
free(screen);
return NULL;
}
+
return screen;
}
{
radeonScreenPtr screen;
int i;
+ int ret;
+ uint32_t device_id;
/* Allocate the private area */
screen = (radeonScreenPtr) CALLOC( sizeof(*screen) );
screen->kernel_mm = 1;
screen->chip_flags = 0;
- /* FIXME: do either an ioctl (bad) or a sysfs file for driver to
- * information about which chipset is their */
- screen->chip_family = CHIP_FAMILY_RV350;
- screen->chip_flags = RADEON_CHIPSET_TCL | RADEON_CLASS_R300;
+
+ ret = radeonGetParam( sPriv->fd, RADEON_PARAM_IRQ_NR,
+ &screen->irq);
+
+ ret = radeonGetParam( sPriv->fd, RADEON_PARAM_DEVICE_ID,
+ &device_id);
+ if (ret) {
+ FREE( screen );
+ fprintf(stderr, "drm_radeon_getparam_t (RADEON_PARAM_DEVICE_ID): %d\n", ret);
+ return NULL;
+ }
+
+ ret = radeon_set_screen_flags(screen, device_id);
+ if (ret == -1)
+ return NULL;
+
+ if (screen->chip_family <= CHIP_FAMILY_RS200)
+ screen->chip_flags |= RADEON_CLASS_R100;
+ else if (screen->chip_family <= CHIP_FAMILY_RV280)
+ screen->chip_flags |= RADEON_CLASS_R200;
+ else
+ screen->chip_flags |= RADEON_CLASS_R300;
+
+ if (getenv("R300_NO_TCL"))
+ screen->chip_flags &= ~RADEON_CHIPSET_TCL;
i = 0;
screen->extensions[i++] = &driCopySubBufferExtension.base;
}
#if !RADEON_COMMON
- screen->extensions[i++] = &radeonTexOffsetExtension.base;
+ screen->extensions[i++] = &radeonTexBufferExtension.base;
#endif
#if RADEON_COMMON && defined(RADEON_COMMON_FOR_R200)
if (IS_R200_CLASS(screen))
screen->extensions[i++] = &r200AllocateExtension.base;
- screen->extensions[i++] = &r200texOffsetExtension.base;
+ screen->extensions[i++] = &r200TexBufferExtension.base;
#endif
#if RADEON_COMMON && defined(RADEON_COMMON_FOR_R300)
- screen->extensions[i++] = &r300texOffsetExtension.base;
screen->extensions[i++] = &r300TexBufferExtension.base;
#endif
return;
if (screen->kernel_mm) {
+#ifdef RADEON_BO_TRACK
radeon_tracker_print(&screen->bom->tracker, stderr);
+#endif
radeon_bo_manager_gem_dtor(screen->bom);
} else {
radeon_bo_manager_legacy_dtor(screen->bom);
return GL_TRUE;
}
-#if RADEON_COMMON && defined(RADEON_COMMON_FOR_R300)
-static GLboolean
-radeon_alloc_window_storage(GLcontext *ctx, struct gl_renderbuffer *rb,
- GLenum intFormat, GLuint w, GLuint h)
-{
- rb->Width = w;
- rb->Height = h;
- rb->_ActualFormat = intFormat;
-
- return GL_TRUE;
-}
-
-
-static struct radeon_renderbuffer *
-radeon_create_renderbuffer(GLenum format, __DRIdrawablePrivate *driDrawPriv)
-{
- struct radeon_renderbuffer *ret;
-
- ret = CALLOC_STRUCT(radeon_renderbuffer);
- if (!ret)
- return NULL;
-
- _mesa_init_renderbuffer(&ret->base, 0);
-
- /* XXX format junk */
- switch (format) {
- case GL_RGB5:
- ret->base._ActualFormat = GL_RGB5;
- ret->base._BaseFormat = GL_RGBA;
- ret->base.RedBits = 5;
- ret->base.GreenBits = 6;
- ret->base.BlueBits = 5;
- ret->base.DataType = GL_UNSIGNED_BYTE;
- break;
- case GL_RGBA8:
- ret->base._ActualFormat = GL_RGBA8;
- ret->base._BaseFormat = GL_RGBA;
- ret->base.RedBits = 8;
- ret->base.GreenBits = 8;
- ret->base.BlueBits = 8;
- ret->base.AlphaBits = 8;
- ret->base.DataType = GL_UNSIGNED_BYTE;
- break;
- case GL_STENCIL_INDEX8_EXT:
- ret->base._ActualFormat = GL_STENCIL_INDEX8_EXT;
- ret->base._BaseFormat = GL_STENCIL_INDEX;
- ret->base.StencilBits = 8;
- ret->base.DataType = GL_UNSIGNED_BYTE;
- break;
- case GL_DEPTH_COMPONENT16:
- ret->base._ActualFormat = GL_DEPTH_COMPONENT16;
- ret->base._BaseFormat = GL_DEPTH_COMPONENT;
- ret->base.DepthBits = 16;
- ret->base.DataType = GL_UNSIGNED_SHORT;
- break;
- case GL_DEPTH_COMPONENT24:
- ret->base._ActualFormat = GL_DEPTH24_STENCIL8_EXT;
- ret->base._BaseFormat = GL_DEPTH_COMPONENT;
- ret->base.DepthBits = 24;
- ret->base.DataType = GL_UNSIGNED_INT;
- break;
- case GL_DEPTH24_STENCIL8_EXT:
- ret->base._ActualFormat = GL_DEPTH24_STENCIL8_EXT;
- ret->base._BaseFormat = GL_DEPTH_STENCIL_EXT;
- ret->base.DepthBits = 24;
- ret->base.StencilBits = 8;
- ret->base.DataType = GL_UNSIGNED_INT_24_8_EXT;
- break;
- default:
- fprintf(stderr, "%s: Unknown format 0x%04x\n", __FUNCTION__, format);
- _mesa_delete_renderbuffer(&ret->base);
- return NULL;
- }
-
- ret->dPriv = driDrawPriv;
- ret->base.InternalFormat = format;
-
- ret->base.AllocStorage = radeon_alloc_window_storage;
- radeonSetSpanFunctions(ret);
-
- ret->bo = NULL;
- return ret;
-}
/**
* Create the Mesa framebuffer and renderbuffers for a given window/drawable.
const __GLcontextModes *mesaVis,
GLboolean isPixmap )
{
- radeonScreenPtr screen = (radeonScreenPtr) driScrnPriv->private;
+ radeonScreenPtr screen = (radeonScreenPtr) driScrnPriv->private;
const GLboolean swDepth = GL_FALSE;
const GLboolean swAlpha = GL_FALSE;
const GLboolean swStencil = mesaVis->stencilBits > 0 &&
mesaVis->depthBits != 24;
GLenum rgbFormat = (mesaVis->redBits == 5 ? GL_RGB5 : GL_RGBA8);
- GLenum depthFormat = GL_NONE;
- struct gl_framebuffer *fb = _mesa_create_framebuffer(mesaVis);
+ struct radeon_framebuffer *rfb;
+
+ if (isPixmap)
+ return GL_FALSE; /* not implemented */
+
+ rfb = CALLOC_STRUCT(radeon_framebuffer);
+ if (!rfb)
+ return GL_FALSE;
- if (mesaVis->depthBits == 16)
- depthFormat = GL_DEPTH_COMPONENT16;
- else if (mesaVis->depthBits == 24)
- depthFormat = GL_DEPTH_COMPONENT24;
+ _mesa_initialize_framebuffer(&rfb->base, mesaVis);
/* front color renderbuffer */
- {
- struct radeon_renderbuffer *front =
- radeon_create_renderbuffer(rgbFormat, driDrawPriv);
- _mesa_add_renderbuffer(fb, BUFFER_FRONT_LEFT, &front->base);
- front->has_surface = 1;
- }
+ rfb->color_rb[0] = radeon_create_renderbuffer(rgbFormat, driDrawPriv);
+ _mesa_add_renderbuffer(&rfb->base, BUFFER_FRONT_LEFT, &rfb->color_rb[0]->base);
+ rfb->color_rb[0]->has_surface = 1;
/* back color renderbuffer */
if (mesaVis->doubleBufferMode) {
- struct radeon_renderbuffer *back =
- radeon_create_renderbuffer(rgbFormat, driDrawPriv);
- _mesa_add_renderbuffer(fb, BUFFER_BACK_LEFT, &back->base);
- back->has_surface = 1;
+ rfb->color_rb[1] = radeon_create_renderbuffer(rgbFormat, driDrawPriv);
+ _mesa_add_renderbuffer(&rfb->base, BUFFER_BACK_LEFT, &rfb->color_rb[1]->base);
+ rfb->color_rb[1]->has_surface = 1;
}
- /* depth renderbuffer */
- if (depthFormat != GL_NONE) {
- struct radeon_renderbuffer *depth =
- radeon_create_renderbuffer(depthFormat, driDrawPriv);
- _mesa_add_renderbuffer(fb, BUFFER_DEPTH, &depth->base);
+ if (mesaVis->depthBits == 24) {
+ if (mesaVis->stencilBits == 8) {
+ struct radeon_renderbuffer *depthStencilRb = radeon_create_renderbuffer(GL_DEPTH24_STENCIL8_EXT, driDrawPriv);
+ _mesa_add_renderbuffer(&rfb->base, BUFFER_DEPTH, &depthStencilRb->base);
+ _mesa_add_renderbuffer(&rfb->base, BUFFER_STENCIL, &depthStencilRb->base);
+ depthStencilRb->has_surface = screen->depthHasSurface;
+ } else {
+ /* depth renderbuffer */
+ struct radeon_renderbuffer *depth = radeon_create_renderbuffer(GL_DEPTH_COMPONENT24, driDrawPriv);
+ _mesa_add_renderbuffer(&rfb->base, BUFFER_DEPTH, &depth->base);
+ depth->has_surface = screen->depthHasSurface;
+ }
+ } else if (mesaVis->depthBits == 16) {
+ /* just 16-bit depth buffer, no hw stencil */
+ struct radeon_renderbuffer *depth = radeon_create_renderbuffer(GL_DEPTH_COMPONENT16, driDrawPriv);
+ _mesa_add_renderbuffer(&rfb->base, BUFFER_DEPTH, &depth->base);
depth->has_surface = screen->depthHasSurface;
}
- /* stencil renderbuffer */
- if (mesaVis->stencilBits > 0 && !swStencil) {
- struct radeon_renderbuffer *stencil =
- radeon_create_renderbuffer(GL_STENCIL_INDEX8_EXT, driDrawPriv);
- _mesa_add_renderbuffer(fb, BUFFER_STENCIL, &stencil->base);
- stencil->has_surface = screen->depthHasSurface;
- }
-
- _mesa_add_soft_renderbuffers(fb,
+ _mesa_add_soft_renderbuffers(&rfb->base,
GL_FALSE, /* color */
swDepth,
swStencil,
swAccum,
swAlpha,
GL_FALSE /* aux */);
- driDrawPriv->driverPrivate = (void *) fb;
+ driDrawPriv->driverPrivate = (void *) rfb;
return (driDrawPriv->driverPrivate != NULL);
}
-#else
-
-/**
- * Create the Mesa framebuffer and renderbuffers for a given window/drawable.
- *
- * \todo This function (and its interface) will need to be updated to support
- * pbuffers.
- */
-static GLboolean
-radeonCreateBuffer( __DRIscreenPrivate *driScrnPriv,
- __DRIdrawablePrivate *driDrawPriv,
- const __GLcontextModes *mesaVis,
- GLboolean isPixmap )
-{
- radeonScreenPtr screen = (radeonScreenPtr) driScrnPriv->private;
-
- if (isPixmap) {
- return GL_FALSE; /* not implemented */
- }
- else {
- const GLboolean swDepth = GL_FALSE;
- const GLboolean swAlpha = GL_FALSE;
- const GLboolean swAccum = mesaVis->accumRedBits > 0;
- const GLboolean swStencil = mesaVis->stencilBits > 0 &&
- mesaVis->depthBits != 24;
- struct gl_framebuffer *fb = _mesa_create_framebuffer(mesaVis);
-
- /* front color renderbuffer */
- {
- driRenderbuffer *frontRb
- = driNewRenderbuffer(GL_RGBA,
- driScrnPriv->pFB + screen->frontOffset,
- screen->cpp,
- screen->frontOffset, screen->frontPitch,
- driDrawPriv);
- radeonSetSpanFunctions(frontRb, mesaVis);
- _mesa_add_renderbuffer(fb, BUFFER_FRONT_LEFT, &frontRb->Base);
- }
-
- /* back color renderbuffer */
- if (mesaVis->doubleBufferMode) {
- driRenderbuffer *backRb
- = driNewRenderbuffer(GL_RGBA,
- driScrnPriv->pFB + screen->backOffset,
- screen->cpp,
- screen->backOffset, screen->backPitch,
- driDrawPriv);
- radeonSetSpanFunctions(backRb, mesaVis);
- _mesa_add_renderbuffer(fb, BUFFER_BACK_LEFT, &backRb->Base);
- }
-
- /* depth renderbuffer */
- if (mesaVis->depthBits == 16) {
- driRenderbuffer *depthRb
- = driNewRenderbuffer(GL_DEPTH_COMPONENT16,
- driScrnPriv->pFB + screen->depthOffset,
- screen->cpp,
- screen->depthOffset, screen->depthPitch,
- driDrawPriv);
- radeonSetSpanFunctions(depthRb, mesaVis);
- _mesa_add_renderbuffer(fb, BUFFER_DEPTH, &depthRb->Base);
- depthRb->has_surface = screen->depthHasSurface;
- }
- else if (mesaVis->depthBits == 24) {
- driRenderbuffer *depthRb
- = driNewRenderbuffer(GL_DEPTH_COMPONENT24,
- driScrnPriv->pFB + screen->depthOffset,
- screen->cpp,
- screen->depthOffset, screen->depthPitch,
- driDrawPriv);
- radeonSetSpanFunctions(depthRb, mesaVis);
- _mesa_add_renderbuffer(fb, BUFFER_DEPTH, &depthRb->Base);
- depthRb->has_surface = screen->depthHasSurface;
- }
-
- /* stencil renderbuffer */
- if (mesaVis->stencilBits > 0 && !swStencil) {
- driRenderbuffer *stencilRb
- = driNewRenderbuffer(GL_STENCIL_INDEX8_EXT,
- driScrnPriv->pFB + screen->depthOffset,
- screen->cpp,
- screen->depthOffset, screen->depthPitch,
- driDrawPriv);
- radeonSetSpanFunctions(stencilRb, mesaVis);
- _mesa_add_renderbuffer(fb, BUFFER_STENCIL, &stencilRb->Base);
- stencilRb->has_surface = screen->depthHasSurface;
- }
-
- _mesa_add_soft_renderbuffers(fb,
- GL_FALSE, /* color */
- swDepth,
- swStencil,
- swAccum,
- swAlpha,
- GL_FALSE /* aux */);
- driDrawPriv->driverPrivate = (void *) fb;
-
- return (driDrawPriv->driverPrivate != NULL);
- }
-}
-#endif
static void
radeonDestroyBuffer(__DRIdrawablePrivate *driDrawPriv)
{
- struct radeon_renderbuffer *rb;
- GLframebuffer *fb;
+ struct radeon_renderbuffer *rb;
+ struct radeon_framebuffer *rfb;
- fb = (void*)driDrawPriv->driverPrivate;
- rb = (void *)fb->Attachment[BUFFER_FRONT_LEFT].Renderbuffer;
+ rfb = (void*)driDrawPriv->driverPrivate;
+ rb = (void *)rfb->base.Attachment[BUFFER_FRONT_LEFT].Renderbuffer;
if (rb && rb->bo) {
radeon_bo_unref(rb->bo);
rb->bo = NULL;
}
- rb = (void *)fb->Attachment[BUFFER_BACK_LEFT].Renderbuffer;
+ rb = (void *)rfb->base.Attachment[BUFFER_BACK_LEFT].Renderbuffer;
if (rb && rb->bo) {
radeon_bo_unref(rb->bo);
rb->bo = NULL;
}
- rb = (void *)fb->Attachment[BUFFER_DEPTH].Renderbuffer;
+ rb = (void *)rfb->base.Attachment[BUFFER_DEPTH].Renderbuffer;
if (rb && rb->bo) {
radeon_bo_unref(rb->bo);
rb->bo = NULL;
}
- _mesa_unreference_framebuffer((GLframebuffer **)(&(driDrawPriv->driverPrivate)));
+ _mesa_reference_framebuffer((GLframebuffer **)(&(driDrawPriv->driverPrivate)), NULL);
}
#if RADEON_COMMON && defined(RADEON_COMMON_FOR_R300)
#endif
+
/**
* This is the driver specific part of the createNewScreen entry point.
*
driInitSingleExtension( NULL, NV_vp_extension );
driInitSingleExtension( NULL, ATI_fs_extension );
driInitExtensions( NULL, point_extensions, GL_FALSE );
+#elif defined(RADEON_COMMON_FOR_R300)
+ driInitSingleExtension( NULL, gl_20_extension );
#endif
if (!radeonInitDriver(psp))
(dri_priv->bpp == 16) ? 16 : 24,
(dri_priv->bpp == 16) ? 0 : 8, 1);
}
+#define ARRAY_SIZE(a) (sizeof (a) / sizeof ((a)[0]))
/**
* This is the driver specific part of the createNewScreen entry point.
static const
__DRIconfig **radeonInitScreen2(__DRIscreenPrivate *psp)
{
+ GLenum fb_format[3];
+ GLenum fb_type[3];
+ /* GLX_SWAP_COPY_OML is only supported because the Intel driver doesn't
+ * support pageflipping at all.
+ */
+ static const GLenum back_buffer_modes[] = {
+ GLX_NONE, GLX_SWAP_UNDEFINED_OML, /*, GLX_SWAP_COPY_OML*/
+ };
+ uint8_t depth_bits[4], stencil_bits[4], msaa_samples_array[1];
+ int color;
+ __DRIconfig **configs = NULL;
+
/* Calling driInitExtensions here, with a NULL context pointer,
* does not actually enable the extensions. It just makes sure
* that all the dispatch offsets for all the extensions that
if (!radeonInitDriver(psp)) {
return NULL;
}
+ depth_bits[0] = 0;
+ stencil_bits[0] = 0;
+ depth_bits[1] = 16;
+ stencil_bits[1] = 0;
+ depth_bits[2] = 24;
+ stencil_bits[2] = 0;
+ depth_bits[3] = 24;
+ stencil_bits[3] = 8;
+
+ msaa_samples_array[0] = 0;
+
+ fb_format[0] = GL_RGB;
+ fb_type[0] = GL_UNSIGNED_SHORT_5_6_5;
+
+ fb_format[1] = GL_BGR;
+ fb_type[1] = GL_UNSIGNED_INT_8_8_8_8_REV;
+
+ fb_format[2] = GL_BGRA;
+ fb_type[2] = GL_UNSIGNED_INT_8_8_8_8_REV;
+
+ for (color = 0; color < ARRAY_SIZE(fb_format); color++) {
+ __DRIconfig **new_configs;
+
+ new_configs = driCreateConfigs(fb_format[color], fb_type[color],
+ depth_bits,
+ stencil_bits,
+ ARRAY_SIZE(depth_bits),
+ back_buffer_modes,
+ ARRAY_SIZE(back_buffer_modes),
+ msaa_samples_array,
+ ARRAY_SIZE(msaa_samples_array));
+ if (configs == NULL)
+ configs = new_configs;
+ else
+ configs = driConcatConfigs(configs, new_configs);
+ }
- /* for now fill in all modes */
- return radeonFillInModes( psp, 24, 24, 8, 1);
+ if (configs == NULL) {
+ fprintf(stderr, "[%s:%u] Error creating FBConfig!\n", __func__,
+ __LINE__);
+ return NULL;
+ }
+
+ return (const __DRIconfig **)configs;
}
/**
static int
getSwapInfo( __DRIdrawablePrivate *dPriv, __DRIswapInfo * sInfo )
{
-#if !RADEON_COMMON || (RADEON_COMMON && defined(RADEON_COMMON_FOR_R300))
- radeonContextPtr rmesa;
-#elif RADEON_COMMON && defined(RADEON_COMMON_FOR_R200)
- r200ContextPtr rmesa;
-#endif
+ struct radeon_framebuffer *rfb;
- if ( (dPriv == NULL) || (dPriv->driContextPriv == NULL)
- || (dPriv->driContextPriv->driverPrivate == NULL)
- || (sInfo == NULL) ) {
- return -1;
+ if ( (dPriv == NULL) || (dPriv->driContextPriv == NULL)
+ || (dPriv->driContextPriv->driverPrivate == NULL)
+ || (sInfo == NULL) ) {
+ return -1;
}
- rmesa = dPriv->driContextPriv->driverPrivate;
- sInfo->swap_count = rmesa->swap_count;
- sInfo->swap_ust = rmesa->swap_ust;
- sInfo->swap_missed_count = rmesa->swap_missed_count;
+ rfb = dPriv->driverPrivate;
+ sInfo->swap_count = rfb->swap_count;
+ sInfo->swap_ust = rfb->swap_ust;
+ sInfo->swap_missed_count = rfb->swap_missed_count;
sInfo->swap_missed_usage = (sInfo->swap_missed_count != 0)
- ? driCalculateSwapUsage( dPriv, 0, rmesa->swap_missed_ust )
+ ? driCalculateSwapUsage( dPriv, 0, rfb->swap_missed_ust )
: 0.0;
return 0;
.DestroyContext = r200DestroyContext,
.CreateBuffer = radeonCreateBuffer,
.DestroyBuffer = radeonDestroyBuffer,
- .SwapBuffers = r200SwapBuffers,
- .MakeCurrent = r200MakeCurrent,
- .UnbindContext = r200UnbindContext,
+ .SwapBuffers = radeonSwapBuffers,
+ .MakeCurrent = radeonMakeCurrent,
+ .UnbindContext = radeonUnbindContext,
.GetSwapInfo = getSwapInfo,
.GetDrawableMSC = driDrawableGetMSC32,
.WaitForMSC = driWaitForMSC32,
.WaitForSBC = NULL,
.SwapBuffersMSC = NULL,
- .CopySubBuffer = r200CopySubBuffer,
+ .CopySubBuffer = radeonCopySubBuffer,
+ .InitScreen2 = radeonInitScreen2,
};
#endif