#include "r200_tex.h"
#elif RADEON_COMMON && defined(RADEON_COMMON_FOR_R300)
#include "r300_context.h"
-#include "r300_fragprog.h"
#include "r300_tex.h"
#elif RADEON_COMMON && defined(RADEON_COMMON_FOR_R600)
#include "r600_context.h"
-//#include "r700_driconf.h" /* +r6/r7 */
-#include "r700_tex.h" /* +r6/r7 */
+#include "r700_driconf.h" /* +r6/r7 */
+#include "r600_tex.h" /* +r6/r7 */
#endif
#include "utils.h"
#elif RADEON_COMMON && (defined(RADEON_COMMON_FOR_R300) || defined(RADEON_COMMON_FOR_R600))
+#define DRI_CONF_FP_OPTIMIZATION_SPEED 0
+#define DRI_CONF_FP_OPTIMIZATION_QUALITY 1
+
/* TODO: integrate these into xmlpool.h! */
#define DRI_CONF_MAX_TEXTURE_IMAGE_UNITS(def,min,max) \
DRI_CONF_OPT_BEGIN_V(texture_image_units,int,def, # min ":" # max ) \
extern const struct dri_extension gl_20_extension[];
-#ifndef RADEON_DEBUG
-
-static const struct dri_debug_control debug_control[] = {
- {"fall", DEBUG_FALLBACKS},
- {"tex", DEBUG_TEXTURE},
- {"ioctl", DEBUG_IOCTL},
- {"prim", DEBUG_PRIMS},
- {"vert", DEBUG_VERTS},
- {"state", DEBUG_STATE},
- {"code", DEBUG_CODEGEN},
- {"vfmt", DEBUG_VFMT},
- {"vtxf", DEBUG_VFMT},
- {"verb", DEBUG_VERBOSE},
- {"dri", DEBUG_DRI},
- {"dma", DEBUG_DMA},
- {"san", DEBUG_SANITY},
- {"sync", DEBUG_SYNC},
- {"pix", DEBUG_PIXEL},
- {"mem", DEBUG_MEMORY},
- {"allmsg", ~DEBUG_SYNC}, /* avoid the term "sync" because the parser uses strstr */
- {NULL, 0}
-};
-#endif /* RADEON_DEBUG */
-
#endif /* RADEON_COMMON && defined(RADEON_COMMON_FOR_R300) */
extern const struct dri_extension card_extensions[];
radeonGetParam(__DRIscreenPrivate *sPriv, int param, void *value)
{
int ret;
- drm_radeon_getparam_t gp;
- struct drm_radeon_info info;
+ drm_radeon_getparam_t gp = { 0 };
+ struct drm_radeon_info info = { 0 };
if (sPriv->drm_version.major >= 2) {
- info.value = (uint64_t)value;
+ info.value = (uint64_t)(uintptr_t)value;
switch (param) {
case RADEON_PARAM_DEVICE_ID:
info.request = RADEON_INFO_DEVICE_ID;
case RADEON_PARAM_NUM_GB_PIPES:
info.request = RADEON_INFO_NUM_GB_PIPES;
break;
+ case RADEON_PARAM_NUM_Z_PIPES:
+ info.request = RADEON_INFO_NUM_Z_PIPES;
+ break;
default:
return -EINVAL;
}
* with a stencil buffer. It will be a sw fallback, but some apps won't
* care about that.
*/
- stencil_bits_array[0] = 0;
+ stencil_bits_array[0] = stencil_bits;
stencil_bits_array[1] = (stencil_bits == 0) ? 8 : stencil_bits;
msaa_samples_array[0] = 0;
- depth_buffer_factor = ((depth_bits != 0) || (stencil_bits != 0)) ? 2 : 1;
+ depth_buffer_factor = (stencil_bits == 0) ? 2 : 1;
back_buffer_factor = (have_back_buffer) ? 2 : 1;
if (pixel_bits == 16) {
#if RADEON_COMMON && defined(RADEON_COMMON_FOR_R600)
static const __DRItexOffsetExtension r600texOffsetExtension = {
{ __DRI_TEX_OFFSET, __DRI_TEX_OFFSET_VERSION },
- r700SetTexOffset, /* +r6/r7 */
+ r600SetTexOffset, /* +r6/r7 */
};
static const __DRItexBufferExtension r600TexBufferExtension = {
{ __DRI_TEX_BUFFER, __DRI_TEX_BUFFER_VERSION },
- r700SetTexBuffer, /* +r6/r7 */
- r700SetTexBuffer2, /* +r6/r7 */
+ r600SetTexBuffer, /* +r6/r7 */
+ r600SetTexBuffer2, /* +r6/r7 */
};
#endif
static int radeon_set_screen_flags(radeonScreenPtr screen, int device_id)
{
+ screen->device_id = device_id;
screen->chip_flags = 0;
switch ( device_id ) {
case PCI_CHIP_RADEON_LY:
screen->chip_family = CHIP_FAMILY_RS300;
break;
- /* 9500 with 1 pipe verified by: Reid Linnemann <lreid@cs.okstate.edu> */
case PCI_CHIP_R300_AD:
- screen->chip_family = CHIP_FAMILY_RV350;
- screen->chip_flags = RADEON_CHIPSET_TCL;
- break;
case PCI_CHIP_R300_AE:
case PCI_CHIP_R300_AF:
case PCI_CHIP_R300_AG:
screen->chip_flags = RADEON_CHIPSET_TCL;
break;
+ case PCI_CHIP_RS780_9610:
case PCI_CHIP_RS780_9611:
case PCI_CHIP_RS780_9612:
case PCI_CHIP_RS780_9613:
screen->chip_family = CHIP_FAMILY_RS780;
screen->chip_flags = RADEON_CHIPSET_TCL;
break;
+ case PCI_CHIP_RS880_9710:
+ case PCI_CHIP_RS880_9711:
+ case PCI_CHIP_RS880_9712:
+ case PCI_CHIP_RS880_9713:
+ case PCI_CHIP_RS880_9714:
+ screen->chip_family = CHIP_FAMILY_RS880;
+ screen->chip_flags = RADEON_CHIPSET_TCL;
+ break;
case PCI_CHIP_RV770_9440:
case PCI_CHIP_RV770_9441:
case PCI_CHIP_RV770_9442:
+ case PCI_CHIP_RV770_9443:
case PCI_CHIP_RV770_9444:
case PCI_CHIP_RV770_9446:
case PCI_CHIP_RV770_944A:
screen->chip_flags = RADEON_CHIPSET_TCL;
break;
+ case PCI_CHIP_RV730_9480:
case PCI_CHIP_RV730_9487:
+ case PCI_CHIP_RV730_9488:
case PCI_CHIP_RV730_9489:
case PCI_CHIP_RV730_948F:
case PCI_CHIP_RV730_9490:
case PCI_CHIP_RV730_9491:
+ case PCI_CHIP_RV730_9495:
case PCI_CHIP_RV730_9498:
case PCI_CHIP_RV730_949C:
case PCI_CHIP_RV730_949E:
case PCI_CHIP_RV710_9552:
case PCI_CHIP_RV710_9553:
case PCI_CHIP_RV710_9555:
+ case PCI_CHIP_RV710_9557:
screen->chip_family = CHIP_FAMILY_RV710;
screen->chip_flags = RADEON_CHIPSET_TCL;
break;
+ case PCI_CHIP_RV740_94A0:
+ case PCI_CHIP_RV740_94A1:
+ case PCI_CHIP_RV740_94A3:
+ case PCI_CHIP_RV740_94B1:
+ case PCI_CHIP_RV740_94B3:
+ case PCI_CHIP_RV740_94B4:
+ case PCI_CHIP_RV740_94B5:
+ case PCI_CHIP_RV740_94B9:
+ screen->chip_family = CHIP_FAMILY_RV740;
+ screen->chip_flags = RADEON_CHIPSET_TCL;
+ break;
+
default:
fprintf(stderr, "unknown chip id 0x%x, can't guess.\n",
device_id);
return NULL;
}
-#if DO_DEBUG && RADEON_COMMON && defined(RADEON_COMMON_FOR_R300)
- RADEON_DEBUG = driParseDebugString(getenv("RADEON_DEBUG"), debug_control);
-#endif
+ radeon_init_debug();
+
/* parse information in __driConfigOptions */
driParseOptionInfo (&screen->optionCache,
__driConfigOptions, __driNConfigOptions);
{
int ret;
-#ifdef RADEON_PARAM_KERNEL_MM
- ret = radeonGetParam(sPriv, RADEON_PARAM_KERNEL_MM, &screen->kernel_mm);
-
- if (ret && ret != -EINVAL) {
- FREE( screen );
- fprintf(stderr, "drm_radeon_getparam_t (RADEON_OFFSET): %d\n", ret);
- return NULL;
- }
-
- if (ret == -EINVAL)
- screen->kernel_mm = 0;
-#endif
-
ret = radeonGetParam(sPriv, RADEON_PARAM_GART_BUFFER_OFFSET,
&screen->gart_buffer_offset);
screen->drmSupportsPointSprites = (sPriv->drm_version.minor >= 13);
screen->drmSupportsCubeMapsR100 = (sPriv->drm_version.minor >= 15);
screen->drmSupportsVertexProgram = (sPriv->drm_version.minor >= 25);
+ screen->drmSupportsOcclusionQueries = (sPriv->drm_version.minor >= 30);
}
- if (!screen->kernel_mm) {
- screen->mmio.handle = dri_priv->registerHandle;
- screen->mmio.size = dri_priv->registerSize;
- if ( drmMap( sPriv->fd,
- screen->mmio.handle,
- screen->mmio.size,
- &screen->mmio.map ) ) {
- FREE( screen );
- __driUtilMessage("%s: drmMap failed\n", __FUNCTION__ );
- return NULL;
- }
+ ret = radeon_set_screen_flags(screen, dri_priv->deviceID);
+ if (ret == -1)
+ return NULL;
- RADEONMMIO = screen->mmio.map;
+ screen->mmio.handle = dri_priv->registerHandle;
+ screen->mmio.size = dri_priv->registerSize;
+ if ( drmMap( sPriv->fd,
+ screen->mmio.handle,
+ screen->mmio.size,
+ &screen->mmio.map ) ) {
+ FREE( screen );
+ __driUtilMessage("%s: drmMap failed\n", __FUNCTION__ );
+ return NULL;
+ }
- screen->status.handle = dri_priv->statusHandle;
- screen->status.size = dri_priv->statusSize;
- if ( drmMap( sPriv->fd,
- screen->status.handle,
- screen->status.size,
- &screen->status.map ) ) {
- drmUnmap( screen->mmio.map, screen->mmio.size );
- FREE( screen );
- __driUtilMessage("%s: drmMap (2) failed\n", __FUNCTION__ );
- return NULL;
- }
- screen->scratch = (__volatile__ uint32_t *)
- ((GLubyte *)screen->status.map + RADEON_SCRATCH_REG_OFFSET);
+ RADEONMMIO = screen->mmio.map;
+
+ screen->status.handle = dri_priv->statusHandle;
+ screen->status.size = dri_priv->statusSize;
+ if ( drmMap( sPriv->fd,
+ screen->status.handle,
+ screen->status.size,
+ &screen->status.map ) ) {
+ drmUnmap( screen->mmio.map, screen->mmio.size );
+ FREE( screen );
+ __driUtilMessage("%s: drmMap (2) failed\n", __FUNCTION__ );
+ return NULL;
+ }
+ if (screen->chip_family < CHIP_FAMILY_R600)
+ screen->scratch = (__volatile__ uint32_t *)
+ ((GLubyte *)screen->status.map + RADEON_SCRATCH_REG_OFFSET);
+ else
+ screen->scratch = (__volatile__ uint32_t *)
+ ((GLubyte *)screen->status.map + R600_SCRATCH_REG_OFFSET);
- screen->buffers = drmMapBufs( sPriv->fd );
- if ( !screen->buffers ) {
+ screen->buffers = drmMapBufs( sPriv->fd );
+ if ( !screen->buffers ) {
+ drmUnmap( screen->status.map, screen->status.size );
+ drmUnmap( screen->mmio.map, screen->mmio.size );
+ FREE( screen );
+ __driUtilMessage("%s: drmMapBufs failed\n", __FUNCTION__ );
+ return NULL;
+ }
+
+ if ( dri_priv->gartTexHandle && dri_priv->gartTexMapSize ) {
+ screen->gartTextures.handle = dri_priv->gartTexHandle;
+ screen->gartTextures.size = dri_priv->gartTexMapSize;
+ if ( drmMap( sPriv->fd,
+ screen->gartTextures.handle,
+ screen->gartTextures.size,
+ (drmAddressPtr)&screen->gartTextures.map ) ) {
+ drmUnmapBufs( screen->buffers );
drmUnmap( screen->status.map, screen->status.size );
drmUnmap( screen->mmio.map, screen->mmio.size );
FREE( screen );
- __driUtilMessage("%s: drmMapBufs failed\n", __FUNCTION__ );
+ __driUtilMessage("%s: drmMap failed for GART texture area\n", __FUNCTION__);
return NULL;
- }
-
- if ( dri_priv->gartTexHandle && dri_priv->gartTexMapSize ) {
- screen->gartTextures.handle = dri_priv->gartTexHandle;
- screen->gartTextures.size = dri_priv->gartTexMapSize;
- if ( drmMap( sPriv->fd,
- screen->gartTextures.handle,
- screen->gartTextures.size,
- (drmAddressPtr)&screen->gartTextures.map ) ) {
- drmUnmapBufs( screen->buffers );
- drmUnmap( screen->status.map, screen->status.size );
- drmUnmap( screen->mmio.map, screen->mmio.size );
- FREE( screen );
- __driUtilMessage("%s: drmMap failed for GART texture area\n", __FUNCTION__);
- return NULL;
- }
-
- screen->gart_texture_offset = dri_priv->gartTexOffset + screen->gart_base;
- }
- }
-
+ }
- ret = radeon_set_screen_flags(screen, dri_priv->deviceID);
- if (ret == -1)
- return NULL;
+ screen->gart_texture_offset = dri_priv->gartTexOffset + screen->gart_base;
+ }
if ((screen->chip_family == CHIP_FAMILY_R350 || screen->chip_family == CHIP_FAMILY_R300) &&
sPriv->ddx_version.minor < 2) {
screen->AGPMode = dri_priv->AGPMode;
ret = radeonGetParam(sPriv, RADEON_PARAM_FB_LOCATION, &temp);
- if (ret) {
- if (screen->chip_family < CHIP_FAMILY_RS600 && !screen->kernel_mm)
- screen->fbLocation = ( INREG( RADEON_MC_FB_LOCATION ) & 0xffff) << 16;
- else {
- FREE( screen );
- fprintf(stderr, "Unable to get fb location need newer drm\n");
- return NULL;
+
+ /* +r6/r7 */
+ if(screen->chip_family >= CHIP_FAMILY_R600)
+ {
+ if (ret)
+ {
+ FREE( screen );
+ fprintf(stderr, "Unable to get fb location need newer drm\n");
+ return NULL;
}
- } else {
- screen->fbLocation = (temp & 0xffff) << 16;
+ else
+ {
+ screen->fbLocation = (temp & 0xffff) << 24;
+ }
+ }
+ else
+ {
+ if (ret)
+ {
+ if (screen->chip_family < CHIP_FAMILY_RS600 && !screen->kernel_mm)
+ screen->fbLocation = ( INREG( RADEON_MC_FB_LOCATION ) & 0xffff) << 16;
+ else
+ {
+ FREE( screen );
+ fprintf(stderr, "Unable to get fb location need newer drm\n");
+ return NULL;
+ }
+ }
+ else
+ {
+ screen->fbLocation = (temp & 0xffff) << 16;
+ }
}
if (IS_R300_CLASS(screen)) {
} else {
screen->num_gb_pipes = temp;
}
+
+ /* pipe overrides */
+ switch (dri_priv->deviceID) {
+ case PCI_CHIP_R300_AD: /* 9500 with 1 quadpipe verified by: Reid Linnemann <lreid@cs.okstate.edu> */
+ case PCI_CHIP_RV410_5E4C: /* RV410 SE only have 1 quadpipe */
+ case PCI_CHIP_RV410_5E4F: /* RV410 SE only have 1 quadpipe */
+ screen->num_gb_pipes = 1;
+ break;
+ default:
+ break;
+ }
+
+ if ( sPriv->drm_version.minor >= 31 ) {
+ ret = radeonGetParam(sPriv, RADEON_PARAM_NUM_Z_PIPES, &temp);
+ if (ret)
+ screen->num_z_pipes = 2;
+ else
+ screen->num_z_pipes = temp;
+ } else
+ screen->num_z_pipes = 2;
}
if ( sPriv->drm_version.minor >= 10 ) {
screen->extensions[i++] = &driMediaStreamCounterExtension.base;
}
- if (!screen->kernel_mm) {
#if !RADEON_COMMON
- screen->extensions[i++] = &radeonTexOffsetExtension.base;
+ screen->extensions[i++] = &radeonTexOffsetExtension.base;
#endif
#if RADEON_COMMON && defined(RADEON_COMMON_FOR_R200)
- if (IS_R200_CLASS(screen))
- screen->extensions[i++] = &r200AllocateExtension.base;
+ if (IS_R200_CLASS(screen))
+ screen->extensions[i++] = &r200AllocateExtension.base;
- screen->extensions[i++] = &r200texOffsetExtension.base;
+ screen->extensions[i++] = &r200texOffsetExtension.base;
#endif
#if RADEON_COMMON && defined(RADEON_COMMON_FOR_R300)
- screen->extensions[i++] = &r300texOffsetExtension.base;
+ screen->extensions[i++] = &r300texOffsetExtension.base;
#endif
#if RADEON_COMMON && defined(RADEON_COMMON_FOR_R600)
- screen->extensions[i++] = &r600texOffsetExtension.base;
+ screen->extensions[i++] = &r600texOffsetExtension.base;
#endif
- }
screen->extensions[i++] = NULL;
sPriv->extensions = screen->extensions;
screen->sarea = (drm_radeon_sarea_t *) ((GLubyte *) sPriv->pSAREA +
screen->sarea_priv_offset);
- if (screen->kernel_mm)
- screen->bom = radeon_bo_manager_gem_ctor(sPriv->fd);
- else
- screen->bom = radeon_bo_manager_legacy_ctor(screen);
+ screen->bom = radeon_bo_manager_legacy_ctor(screen);
if (screen->bom == NULL) {
free(screen);
return NULL;
radeonScreenPtr screen;
int i;
int ret;
- uint32_t device_id;
+ uint32_t device_id = 0;
uint32_t temp = 0;
/* Allocate the private area */
return NULL;
}
-#if DO_DEBUG && RADEON_COMMON && defined(RADEON_COMMON_FOR_R300)
- RADEON_DEBUG = driParseDebugString(getenv("RADEON_DEBUG"), debug_control);
-#endif
+ radeon_init_debug();
/* parse information in __driConfigOptions */
driParseOptionInfo (&screen->optionCache,
screen->kernel_mm = 1;
screen->chip_flags = 0;
- ret = radeonGetParam(sPriv, RADEON_PARAM_IRQ_NR, &screen->irq);
+ /* if we have kms we can support all of these */
+ screen->drmSupportsCubeMapsR200 = 1;
+ screen->drmSupportsBlendColor = 1;
+ screen->drmSupportsTriPerf = 1;
+ screen->drmSupportsFragShader = 1;
+ screen->drmSupportsPointSprites = 1;
+ screen->drmSupportsCubeMapsR100 = 1;
+ screen->drmSupportsVertexProgram = 1;
+ screen->drmSupportsOcclusionQueries = 1;
+ screen->irq = 1;
ret = radeonGetParam(sPriv, RADEON_PARAM_DEVICE_ID, &device_id);
if (ret) {
} else {
screen->num_gb_pipes = temp;
}
+
+ /* pipe overrides */
+ switch (device_id) {
+ case PCI_CHIP_R300_AD: /* 9500 with 1 quadpipe verified by: Reid Linnemann <lreid@cs.okstate.edu> */
+ case PCI_CHIP_RV410_5E4C: /* RV410 SE only have 1 quadpipe */
+ case PCI_CHIP_RV410_5E4F: /* RV410 SE only have 1 quadpipe */
+ screen->num_gb_pipes = 1;
+ break;
+ default:
+ break;
+ }
+
+ ret = radeonGetParam(sPriv, RADEON_PARAM_NUM_Z_PIPES, &temp);
+ if (ret)
+ screen->num_z_pipes = 2;
+ else
+ screen->num_z_pipes = temp;
+
}
i = 0;
_mesa_reference_framebuffer((GLframebuffer **)(&(driDrawPriv->driverPrivate)), NULL);
}
-/**
- * Choose the appropriate CreateContext function based on the chipset.
- * Eventually, all drivers will go through this process.
- */
-static GLboolean radeonCreateContext(const __GLcontextModes * glVisual,
- __DRIcontextPrivate * driContextPriv,
- void *sharedContextPriv)
-{
- __DRIscreenPrivate *sPriv = driContextPriv->driScreenPriv;
- radeonScreenPtr screen = (radeonScreenPtr) (sPriv->private);
-#if RADEON_COMMON && defined(RADEON_COMMON_FOR_R600)
- if (IS_R600_CLASS(screen))
- return r600CreateContext(glVisual, driContextPriv, sharedContextPriv);
-#endif
-
-#if RADEON_COMMON && defined(RADEON_COMMON_FOR_R300)
- if (IS_R300_CLASS(screen))
- return r300CreateContext(glVisual, driContextPriv, sharedContextPriv);
-#endif
-
-#if RADEON_COMMON && defined(RADEON_COMMON_FOR_R200)
- if (IS_R200_CLASS(screen))
- return r200CreateContext(glVisual, driContextPriv, sharedContextPriv);
-#endif
-
-#if !RADEON_COMMON
- return r100CreateContext(glVisual, driContextPriv, sharedContextPriv);
-#endif
- return GL_FALSE;
-}
-
/**
* This is the driver specific part of the createNewScreen entry point.
driInitSingleExtension( NULL, NV_vp_extension );
driInitSingleExtension( NULL, ATI_fs_extension );
driInitExtensions( NULL, point_extensions, GL_FALSE );
+#elif (defined(RADEON_COMMON_FOR_R300) || defined(RADEON_COMMON_FOR_R600))
+ driInitSingleExtension( NULL, gl_20_extension );
#endif
if (!radeonInitDriver(psp)) {
const struct __DriverAPIRec driDriverAPI = {
.InitScreen = radeonInitScreen,
.DestroyScreen = radeonDestroyScreen,
- .CreateContext = radeonCreateContext,
+#if RADEON_COMMON && defined(RADEON_COMMON_FOR_R200)
+ .CreateContext = r200CreateContext,
+ .DestroyContext = r200DestroyContext,
+#elif RADEON_COMMON && defined(RADEON_COMMON_FOR_R600)
+ .CreateContext = r600CreateContext,
+ .DestroyContext = radeonDestroyContext,
+#elif RADEON_COMMON && defined(RADEON_COMMON_FOR_R300)
+ .CreateContext = r300CreateContext,
+ .DestroyContext = radeonDestroyContext,
+#else
+ .CreateContext = r100CreateContext,
.DestroyContext = radeonDestroyContext,
+#endif
.CreateBuffer = radeonCreateBuffer,
.DestroyBuffer = radeonDestroyBuffer,
.SwapBuffers = radeonSwapBuffers,
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