Merge branch 'r500test' of git://people.freedesktop.org/~airlied/mesa into r500test
[mesa.git] / src / mesa / drivers / dri / radeon / radeon_screen.c
index 4cc87a95aefc38744c32660b349a5642bebe0fd0..7d6b4a75777c566c26759033dfad81f859920fc7 100644 (file)
@@ -90,7 +90,7 @@ DRI_CONF_BEGIN
         DRI_CONF_COLOR_REDUCTION(DRI_CONF_COLOR_REDUCTION_DITHER)
         DRI_CONF_ROUND_MODE(DRI_CONF_ROUND_TRUNC)
         DRI_CONF_DITHER_MODE(DRI_CONF_DITHER_XERRORDIFF)
-        DRI_CONF_ALLOW_LARGE_TEXTURES(1)
+        DRI_CONF_ALLOW_LARGE_TEXTURES(2)
     DRI_CONF_SECTION_END
     DRI_CONF_SECTION_DEBUG
         DRI_CONF_NO_RAST(false)
@@ -117,7 +117,7 @@ DRI_CONF_BEGIN
         DRI_CONF_COLOR_REDUCTION(DRI_CONF_COLOR_REDUCTION_DITHER)
         DRI_CONF_ROUND_MODE(DRI_CONF_ROUND_TRUNC)
         DRI_CONF_DITHER_MODE(DRI_CONF_DITHER_XERRORDIFF)
-        DRI_CONF_ALLOW_LARGE_TEXTURES(1)
+        DRI_CONF_ALLOW_LARGE_TEXTURES(2)
         DRI_CONF_TEXTURE_BLEND_QUALITY(1.0,"0.0:1.0")
     DRI_CONF_SECTION_END
     DRI_CONF_SECTION_DEBUG
@@ -179,7 +179,7 @@ DRI_CONF_OPT_BEGIN_V(fp_optimization,enum,def,"0:1") \
         DRI_CONF_DESC_END \
 DRI_CONF_OPT_END
 
-const char __driConfigOptions[] =
+PUBLIC const char __driConfigOptions[] =
 DRI_CONF_BEGIN
        DRI_CONF_SECTION_PERFORMANCE
                DRI_CONF_TCL_MODE(DRI_CONF_TCL_CODEGEN)
@@ -252,17 +252,18 @@ radeonGetParam(int fd, int param, void *value)
   return ret;
 }
 
-static __GLcontextModes *
-radeonFillInModes( unsigned pixel_bits, unsigned depth_bits,
-                unsigned stencil_bits, GLboolean have_back_buffer )
+static const __DRIconfig **
+radeonFillInModes( __DRIscreenPrivate *psp,
+                  unsigned pixel_bits, unsigned depth_bits,
+                  unsigned stencil_bits, GLboolean have_back_buffer )
 {
-    __GLcontextModes * modes;
-    __GLcontextModes * m;
-    unsigned num_modes;
+    __DRIconfig **configs;
+    __GLcontextModes *m;
     unsigned depth_buffer_factor;
     unsigned back_buffer_factor;
     GLenum fb_format;
     GLenum fb_type;
+    int i;
 
     /* Right now GLX_SWAP_COPY_OML isn't supported, but it would be easy
      * enough to add support.  Basically, if a context is created with an
@@ -290,8 +291,6 @@ radeonFillInModes( unsigned pixel_bits, unsigned depth_bits,
     depth_buffer_factor = ((depth_bits != 0) || (stencil_bits != 0)) ? 2 : 1;
     back_buffer_factor  = (have_back_buffer) ? 2 : 1;
 
-    num_modes = depth_buffer_factor * back_buffer_factor * 4;
-
     if ( pixel_bits == 16 ) {
         fb_format = GL_RGB;
         fb_type = GL_UNSIGNED_SHORT_5_6_5;
@@ -301,21 +300,11 @@ radeonFillInModes( unsigned pixel_bits, unsigned depth_bits,
         fb_type = GL_UNSIGNED_INT_8_8_8_8_REV;
     }
 
-    modes = (*dri_interface->createContextModes)( num_modes, sizeof( __GLcontextModes ) );
-    m = modes;
-    if ( ! driFillInModes( & m, fb_format, fb_type,
-                          depth_bits_array, stencil_bits_array, depth_buffer_factor,
-                          back_buffer_modes, back_buffer_factor,
-                          GLX_TRUE_COLOR ) ) {
-       fprintf( stderr, "[%s:%u] Error creating FBConfig!\n",
-                __func__, __LINE__ );
-       return NULL;
-    }
-
-    if ( ! driFillInModes( & m, fb_format, fb_type,
-                          depth_bits_array, stencil_bits_array, depth_buffer_factor,
-                          back_buffer_modes, back_buffer_factor,
-                          GLX_DIRECT_COLOR ) ) {
+    configs = driCreateConfigs(fb_format, fb_type,
+                              depth_bits_array, stencil_bits_array,
+                              depth_buffer_factor,
+                              back_buffer_modes, back_buffer_factor);
+    if (configs == NULL) {
        fprintf( stderr, "[%s:%u] Error creating FBConfig!\n",
                 __func__, __LINE__ );
        return NULL;
@@ -323,13 +312,14 @@ radeonFillInModes( unsigned pixel_bits, unsigned depth_bits,
 
     /* Mark the visual as slow if there are "fake" stencil bits.
      */
-    for ( m = modes ; m != NULL ; m = m->next ) {
-       if ( (m->stencilBits != 0) && (m->stencilBits != stencil_bits) ) {
+    for (i = 0; configs[i]; i++) {
+       m = &configs[i]->modes;
+       if ((m->stencilBits != 0) && (m->stencilBits != stencil_bits)) {
            m->visualRating = GLX_SLOW_CONFIG;
        }
     }
 
-    return modes;
+    return (const __DRIconfig **) configs;
 }
 
 #if RADEON_COMMON && defined(RADEON_COMMON_FOR_R200)
@@ -339,6 +329,11 @@ static const __DRIallocateExtension r200AllocateExtension = {
     r200FreeMemoryMESA,
     r200GetMemoryOffsetMESA
 };
+
+static const __DRItexOffsetExtension r200texOffsetExtension = {
+    { __DRI_TEX_OFFSET, __DRI_TEX_OFFSET_VERSION },
+   r200SetTexOffset,
+};
 #endif
 
 #if RADEON_COMMON && defined(RADEON_COMMON_FOR_R300)
@@ -357,6 +352,8 @@ radeonCreateScreen( __DRIscreenPrivate *sPriv )
    RADEONDRIPtr dri_priv = (RADEONDRIPtr)sPriv->pDevPriv;
    unsigned char *RADEONMMIO;
    int i;
+   int ret;
+   uint32_t temp;
 
    if (sPriv->devPrivSize != sizeof(RADEONDRIRec)) {
       fprintf(stderr,"\nERROR!  sizeof(RADEONDRIRec) does not match passed size from device driver\n");
@@ -549,7 +546,11 @@ radeonCreateScreen( __DRIscreenPrivate *sPriv )
       screen->chip_family = CHIP_FAMILY_RS300;
       break;
 
+      /* 9500 with 1 pipe verified by: Reid Linnemann <lreid@cs.okstate.edu> */
    case PCI_CHIP_R300_AD:
+      screen->chip_family = CHIP_FAMILY_RV350;
+      screen->chip_flags = RADEON_CHIPSET_TCL;
+      break;
    case PCI_CHIP_R300_AE:
    case PCI_CHIP_R300_AF:
    case PCI_CHIP_R300_AG:
@@ -598,6 +599,7 @@ radeonCreateScreen( __DRIscreenPrivate *sPriv )
    case PCI_CHIP_RV370_5B63:
    case PCI_CHIP_RV370_5B64:
    case PCI_CHIP_RV370_5B65:
+   case PCI_CHIP_RV370_5657:
    case PCI_CHIP_RV380_3150:
    case PCI_CHIP_RV380_3152:
    case PCI_CHIP_RV380_3154:
@@ -647,6 +649,13 @@ radeonCreateScreen( __DRIscreenPrivate *sPriv )
       screen->chip_flags = RADEON_CHIPSET_TCL;
       break;
 
+   /* RV410 SE chips have half the pipes of regular RV410 */
+   case PCI_CHIP_RV410_5E4C:
+   case PCI_CHIP_RV410_5E4F:
+      screen->chip_family = CHIP_FAMILY_RV380;
+      screen->chip_flags = RADEON_CHIPSET_TCL;
+      break;
+
    case PCI_CHIP_RV410_564A:
    case PCI_CHIP_RV410_564B:
    case PCI_CHIP_RV410_564F:
@@ -655,9 +664,7 @@ radeonCreateScreen( __DRIscreenPrivate *sPriv )
    case PCI_CHIP_RV410_5E48:
    case PCI_CHIP_RV410_5E4A:
    case PCI_CHIP_RV410_5E4B:
-   case PCI_CHIP_RV410_5E4C:
    case PCI_CHIP_RV410_5E4D:
-   case PCI_CHIP_RV410_5E4F:
       screen->chip_family = CHIP_FAMILY_RV410;
       screen->chip_flags = RADEON_CHIPSET_TCL;
       break;
@@ -674,6 +681,24 @@ radeonCreateScreen( __DRIscreenPrivate *sPriv )
       fprintf(stderr, "Warning, xpress200 detected.\n");
       break;
 
+   case PCI_CHIP_RS690_791E:
+      screen->chip_family = CHIP_FAMILY_RS690;
+      fprintf(stderr, "Warning, RS690 detected, 3D support is incomplete.\n");
+      break;
+
+   case PCI_CHIP_RV530_71C4:
+      screen->chip_family = CHIP_FAMILY_R520;
+      fprintf(stderr, "Warning, R520 detected, 3D HAHAHAHAHA!!.\n");
+      break;
+
+<<<<<<< HEAD:src/mesa/drivers/dri/radeon/radeon_screen.c
+   case PCI_CHIP_RV530_71D5:
+      screen->chip_family = CHIP_FAMILY_R520;
+      fprintf(stderr, "Warning, RV530 detected, all your base belong to us\n");
+      break;
+
+=======
+>>>>>>> eff6f1203222a776c5990b5d104b57a7f69b9aab:src/mesa/drivers/dri/radeon/radeon_screen.c
    default:
       fprintf(stderr, "unknown chip id 0x%x, can't guess.\n",
              dri_priv->deviceID);
@@ -695,7 +720,19 @@ radeonCreateScreen( __DRIscreenPrivate *sPriv )
    screen->cpp = dri_priv->bpp / 8;
    screen->AGPMode = dri_priv->AGPMode;
 
-   screen->fbLocation  = ( INREG( RADEON_MC_FB_LOCATION ) & 0xffff ) << 16;
+   ret = radeonGetParam( sPriv->fd, RADEON_PARAM_FB_LOCATION,
+                         &temp);
+   if (ret) {
+       if (screen->chip_family < CHIP_FAMILY_RS690)
+          screen->fbLocation      = ( INREG( RADEON_MC_FB_LOCATION ) & 0xffff) << 16;
+       else {
+           FREE( screen );
+           fprintf(stderr, "Unable to get fb location need newer drm\n");
+           return NULL;
+       }
+   } else {
+       screen->fbLocation = (temp & 0xffff) << 16;
+   }
 
    if ( sPriv->drm_version.minor >= 10 ) {
       drm_radeon_setparam_t sp;
@@ -715,8 +752,11 @@ radeonCreateScreen( __DRIscreenPrivate *sPriv )
    screen->depthPitch  = dri_priv->depthPitch;
 
    /* Check if ddx has set up a surface reg to cover depth buffer */
-   screen->depthHasSurface = ((sPriv->ddx_version.major > 4) &&
-      (screen->chip_flags & RADEON_CHIPSET_TCL));
+   screen->depthHasSurface = (sPriv->ddx_version.major > 4) ||
+      /* these chips don't use tiled z without hyperz. So always pretend
+         we have set up a surface which will cause linear reads/writes */
+      ((screen->chip_family & RADEON_CLASS_R100) &&
+      !(screen->chip_flags & RADEON_CHIPSET_TCL));
 
    if ( dri_priv->textureSize == 0 ) {
       screen->texOffset[RADEON_LOCAL_TEX_HEAP] = screen->gart_texture_offset;
@@ -758,6 +798,8 @@ radeonCreateScreen( __DRIscreenPrivate *sPriv )
 #if RADEON_COMMON && defined(RADEON_COMMON_FOR_R200)
    if (IS_R200_CLASS(screen))
        screen->extensions[i++] = &r200AllocateExtension.base;
+
+   screen->extensions[i++] = &r200texOffsetExtension.base;
 #endif
 
 #if RADEON_COMMON && defined(RADEON_COMMON_FOR_R300)
@@ -949,46 +991,6 @@ static void radeonDestroyContext(__DRIcontextPrivate * driContextPriv)
 
 #endif
 
-#if !RADEON_COMMON || (RADEON_COMMON && defined(RADEON_COMMON_FOR_R300))
-static struct __DriverAPIRec radeonAPI = {
-   .DestroyScreen   = radeonDestroyScreen,
-   .CreateContext   = radeonCreateContext,
-   .DestroyContext  = radeonDestroyContext,
-   .CreateBuffer    = radeonCreateBuffer,
-   .DestroyBuffer   = radeonDestroyBuffer,
-   .SwapBuffers     = radeonSwapBuffers,
-   .MakeCurrent     = radeonMakeCurrent,
-   .UnbindContext   = radeonUnbindContext,
-   .GetSwapInfo     = getSwapInfo,
-   .GetMSC          = driGetMSC32,
-   .GetDrawableMSC  = driDrawableGetMSC32,
-   .WaitForMSC      = driWaitForMSC32,
-   .WaitForSBC      = NULL,
-   .SwapBuffersMSC  = NULL,
-   .CopySubBuffer   = radeonCopySubBuffer,
-};
-#else
-static const struct __DriverAPIRec r200API = {
-   .DestroyScreen   = radeonDestroyScreen,
-   .CreateContext   = r200CreateContext,
-   .DestroyContext  = r200DestroyContext,
-   .CreateBuffer    = radeonCreateBuffer,
-   .DestroyBuffer   = radeonDestroyBuffer,
-   .SwapBuffers     = r200SwapBuffers,
-   .MakeCurrent     = r200MakeCurrent,
-   .UnbindContext   = r200UnbindContext,
-   .GetSwapInfo     = getSwapInfo,
-   .GetMSC          = driGetMSC32,
-   .GetDrawableMSC  = driDrawableGetMSC32,
-   .WaitForMSC      = driWaitForMSC32,
-   .WaitForSBC      = NULL,
-   .SwapBuffersMSC  = NULL,
-   .CopySubBuffer   = r200CopySubBuffer,
-   .setTexOffset    = r200SetTexOffset
-};
-#endif
-
-
 /**
  * This is the driver specific part of the createNewScreen entry point.
  * 
@@ -996,7 +998,8 @@ static const struct __DriverAPIRec r200API = {
  *
  * \return the __GLcontextModes supported by this driver
  */
-__GLcontextModes *__driDriverInitScreen(__DRIscreenPrivate *psp)
+static const __DRIconfig **
+radeonInitScreen(__DRIscreenPrivate *psp)
 {
 #if !RADEON_COMMON
    static const char *driver_name = "Radeon";
@@ -1022,11 +1025,6 @@ __GLcontextModes *__driDriverInitScreen(__DRIscreenPrivate *psp)
                                      &psp->drm_version, & drm_expected ) ) {
       return NULL;
    }
-#if !RADEON_COMMON || (RADEON_COMMON && defined(RADEON_COMMON_FOR_R300))
-   psp->DriverAPI = radeonAPI;
-#elif RADEON_COMMON && defined(RADEON_COMMON_FOR_R200)
-   psp->DriverAPI = r200API;
-#endif
 
    /* Calling driInitExtensions here, with a NULL context pointer,
     * does not actually enable the extensions.  It just makes sure
@@ -1050,7 +1048,8 @@ __GLcontextModes *__driDriverInitScreen(__DRIscreenPrivate *psp)
    if (!radeonInitDriver(psp))
        return NULL;
 
-   return radeonFillInModes( dri_priv->bpp,
+   return radeonFillInModes( psp,
+                            dri_priv->bpp,
                             (dri_priv->bpp == 16) ? 16 : 24,
                             (dri_priv->bpp == 16) ? 0  : 8,
                             (dri_priv->backOffset != dri_priv->depthOffset) );
@@ -1086,3 +1085,41 @@ getSwapInfo( __DRIdrawablePrivate *dPriv, __DRIswapInfo * sInfo )
 
    return 0;
 }
+
+#if !RADEON_COMMON || (RADEON_COMMON && defined(RADEON_COMMON_FOR_R300))
+const struct __DriverAPIRec driDriverAPI = {
+   .InitScreen      = radeonInitScreen,
+   .DestroyScreen   = radeonDestroyScreen,
+   .CreateContext   = radeonCreateContext,
+   .DestroyContext  = radeonDestroyContext,
+   .CreateBuffer    = radeonCreateBuffer,
+   .DestroyBuffer   = radeonDestroyBuffer,
+   .SwapBuffers     = radeonSwapBuffers,
+   .MakeCurrent     = radeonMakeCurrent,
+   .UnbindContext   = radeonUnbindContext,
+   .GetSwapInfo     = getSwapInfo,
+   .GetDrawableMSC  = driDrawableGetMSC32,
+   .WaitForMSC      = driWaitForMSC32,
+   .WaitForSBC      = NULL,
+   .SwapBuffersMSC  = NULL,
+   .CopySubBuffer   = radeonCopySubBuffer,
+};
+#else
+const struct __DriverAPIRec driDriverAPI = {
+   .InitScreen      = radeonInitScreen,
+   .DestroyScreen   = radeonDestroyScreen,
+   .CreateContext   = r200CreateContext,
+   .DestroyContext  = r200DestroyContext,
+   .CreateBuffer    = radeonCreateBuffer,
+   .DestroyBuffer   = radeonDestroyBuffer,
+   .SwapBuffers     = r200SwapBuffers,
+   .MakeCurrent     = r200MakeCurrent,
+   .UnbindContext   = r200UnbindContext,
+   .GetSwapInfo     = getSwapInfo,
+   .GetDrawableMSC  = driDrawableGetMSC32,
+   .WaitForMSC      = driWaitForMSC32,
+   .WaitForSBC      = NULL,
+   .SwapBuffersMSC  = NULL,
+   .CopySubBuffer   = r200CopySubBuffer,
+};
+#endif