-/* $XFree86: xc/lib/GL/mesa/src/drv/radeon/radeon_screen.c,v 1.6 2002/12/16 16:18:58 dawes Exp $ */
+/* $XFree86: xc/lib/GL/mesa/src/drv/radeon/radeon_screen.c,v 1.7 2003/03/26 20:43:51 tsi Exp $ */
/**************************************************************************
Copyright 2000, 2001 ATI Technologies Inc., Ontario, Canada, and
**************************************************************************/
-/*
- * Authors:
- * Kevin E. Martin <martin@valinux.com>
- * Gareth Hughes <gareth@valinux.com>
+/**
+ * \file radeon_screen.c
+ * Screen initialization functions for the Radeon driver.
*
+ * \author Kevin E. Martin <martin@valinux.com>
+ * \author Gareth Hughes <gareth@valinux.com>
*/
#include "glheader.h"
#include "imports.h"
+#define STANDALONE_MMIO
#include "radeon_context.h"
#include "radeon_screen.h"
#include "radeon_macros.h"
#include "context.h"
#include "vblank.h"
-#ifndef _SOLO
-#include "glxextensions.h"
-#endif
+#include "GL/internal/dri_interface.h"
+
+/* Radeon configuration
+ */
+#include "xmlpool.h"
+
+PUBLIC const char __driConfigOptions[] =
+DRI_CONF_BEGIN
+ DRI_CONF_SECTION_PERFORMANCE
+ DRI_CONF_TCL_MODE(DRI_CONF_TCL_CODEGEN)
+ DRI_CONF_FTHROTTLE_MODE(DRI_CONF_FTHROTTLE_IRQS)
+ DRI_CONF_VBLANK_MODE(DRI_CONF_VBLANK_DEF_INTERVAL_0)
+ DRI_CONF_HYPERZ(false)
+ DRI_CONF_SECTION_END
+ DRI_CONF_SECTION_QUALITY
+ DRI_CONF_TEXTURE_DEPTH(DRI_CONF_TEXTURE_DEPTH_FB)
+ DRI_CONF_DEF_MAX_ANISOTROPY(1.0,"1.0,2.0,4.0,8.0,16.0")
+ DRI_CONF_NO_NEG_LOD_BIAS(false)
+ DRI_CONF_FORCE_S3TC_ENABLE(false)
+ DRI_CONF_COLOR_REDUCTION(DRI_CONF_COLOR_REDUCTION_DITHER)
+ DRI_CONF_ROUND_MODE(DRI_CONF_ROUND_TRUNC)
+ DRI_CONF_DITHER_MODE(DRI_CONF_DITHER_XERRORDIFF)
+ DRI_CONF_SECTION_END
+ DRI_CONF_SECTION_DEBUG
+ DRI_CONF_NO_RAST(false)
+ DRI_CONF_SECTION_END
+DRI_CONF_END;
+static const GLuint __driNConfigOptions = 12;
#if 1
/* Including xf86PciInfo.h introduces a bunch of errors...
#define PCI_CHIP_RADEON_QZ 0x515A
#define PCI_CHIP_RADEON_LW 0x4C57 /* mobility 7 - has tcl */
+#define PCI_CHIP_RADEON_LX 0x4C58 /* mobility FireGL 7800 m7 */
#define PCI_CHIP_RADEON_LY 0x4C59
#define PCI_CHIP_RADEON_LZ 0x4C5A
#define PCI_CHIP_RV200_QW 0x5157 /* Radeon 7500 - not an R200 at all */
+#define PCI_CHIP_RV200_QX 0x5158
+
+/* IGP Chipsets */
+#define PCI_CHIP_RS100_4136 0x4136
+#define PCI_CHIP_RS200_4137 0x4137
+#define PCI_CHIP_RS250_4237 0x4237
+#define PCI_CHIP_RS100_4336 0x4336
+#define PCI_CHIP_RS200_4337 0x4337
+#define PCI_CHIP_RS250_4437 0x4437
#endif
+#ifdef USE_NEW_INTERFACE
+static PFNGLXCREATECONTEXTMODES create_context_modes = NULL;
+#endif /* USE_NEW_INTERFACE */
+
static int getSwapInfo( __DRIdrawablePrivate *dPriv, __DRIswapInfo * sInfo );
+#ifdef USE_NEW_INTERFACE
+static __GLcontextModes *
+radeonFillInModes( unsigned pixel_bits, unsigned depth_bits,
+ unsigned stencil_bits, GLboolean have_back_buffer )
+{
+ __GLcontextModes * modes;
+ __GLcontextModes * m;
+ unsigned num_modes;
+ unsigned depth_buffer_factor;
+ unsigned back_buffer_factor;
+ GLenum fb_format;
+ GLenum fb_type;
+
+ /* Right now GLX_SWAP_COPY_OML isn't supported, but it would be easy
+ * enough to add support. Basically, if a context is created with an
+ * fbconfig where the swap method is GLX_SWAP_COPY_OML, pageflipping
+ * will never be used.
+ */
+ static const GLenum back_buffer_modes[] = {
+ GLX_NONE, GLX_SWAP_UNDEFINED_OML /*, GLX_SWAP_COPY_OML */
+ };
+
+ u_int8_t depth_bits_array[2];
+ u_int8_t stencil_bits_array[2];
+
+
+ depth_bits_array[0] = depth_bits;
+ depth_bits_array[1] = depth_bits;
+
+ /* Just like with the accumulation buffer, always provide some modes
+ * with a stencil buffer. It will be a sw fallback, but some apps won't
+ * care about that.
+ */
+ stencil_bits_array[0] = 0;
+ stencil_bits_array[1] = (stencil_bits == 0) ? 8 : stencil_bits;
+
+ depth_buffer_factor = ((depth_bits != 0) || (stencil_bits != 0)) ? 2 : 1;
+ back_buffer_factor = (have_back_buffer) ? 2 : 1;
+
+ num_modes = depth_buffer_factor * back_buffer_factor * 4;
+
+ if ( pixel_bits == 16 ) {
+ fb_format = GL_RGB;
+ fb_type = GL_UNSIGNED_SHORT_5_6_5;
+ }
+ else {
+ fb_format = GL_BGRA;
+ fb_type = GL_UNSIGNED_INT_8_8_8_8_REV;
+ }
+
+ modes = (*create_context_modes)( num_modes, sizeof( __GLcontextModes ) );
+ m = modes;
+ if ( ! driFillInModes( & m, fb_format, fb_type,
+ depth_bits_array, stencil_bits_array, depth_buffer_factor,
+ back_buffer_modes, back_buffer_factor,
+ GLX_TRUE_COLOR ) ) {
+ fprintf( stderr, "[%s:%u] Error creating FBConfig!\n",
+ __func__, __LINE__ );
+ return NULL;
+ }
+
+ if ( ! driFillInModes( & m, fb_format, fb_type,
+ depth_bits_array, stencil_bits_array, depth_buffer_factor,
+ back_buffer_modes, back_buffer_factor,
+ GLX_DIRECT_COLOR ) ) {
+ fprintf( stderr, "[%s:%u] Error creating FBConfig!\n",
+ __func__, __LINE__ );
+ return NULL;
+ }
+
+ /* Mark the visual as slow if there are "fake" stencil bits.
+ */
+ for ( m = modes ; m != NULL ; m = m->next ) {
+ if ( (m->stencilBits != 0) && (m->stencilBits != stencil_bits) ) {
+ m->visualRating = GLX_SLOW_CONFIG;
+ }
+ }
+
+ return modes;
+}
+#endif /* USE_NEW_INTERFACE */
+
/* Create the device specific screen private data struct.
*/
radeonScreenPtr radeonCreateScreen( __DRIscreenPrivate *sPriv )
{
radeonScreenPtr screen;
RADEONDRIPtr dri_priv = (RADEONDRIPtr)sPriv->pDevPriv;
+ unsigned char *RADEONMMIO;
- if ( ! driCheckDriDdxDrmVersions( sPriv, "Radeon", 4, 0, 4, 0, 1, 3 ) )
- return NULL;
/* Allocate the private area */
screen = (radeonScreenPtr) CALLOC( sizeof(*screen) );
return NULL;
}
- if ( sPriv->drmMinor < 3 ||
- getenv("RADEON_COMPAT")) {
- fprintf( stderr, "Radeon DRI driver:\n\t"
- "Compatibility mode for DRM driver version %d.%d.%d\n\t"
- "TCL will be disabled, expect reduced performance\n\t"
- "(prefer DRM radeon.o 1.3.x or newer)\n\t",
- sPriv->drmMajor, sPriv->drmMinor, sPriv->drmPatch );
- }
-
+ /* parse information in __driConfigOptions */
+ driParseOptionInfo (&screen->optionCache,
+ __driConfigOptions, __driNConfigOptions);
/* This is first since which regions we map depends on whether or
* not we are using a PCI card.
*/
screen->IsPCI = dri_priv->IsPCI;
- if (sPriv->drmMinor >= 3) {
+ {
int ret;
- drmRadeonGetParam gp;
+ drm_radeon_getparam_t gp;
- gp.param = RADEON_PARAM_AGP_BUFFER_OFFSET;
- gp.value = &screen->agp_buffer_offset;
+ gp.param = RADEON_PARAM_GART_BUFFER_OFFSET;
+ gp.value = &screen->gart_buffer_offset;
ret = drmCommandWriteRead( sPriv->fd, DRM_RADEON_GETPARAM,
&gp, sizeof(gp));
if (ret) {
- fprintf(stderr, "drmRadeonGetParam (RADEON_PARAM_AGP_BUFFER_OFFSET): %d\n", ret);
+ FREE( screen );
+ fprintf(stderr, "drm_radeon_getparam_t (RADEON_PARAM_GART_BUFFER_OFFSET): %d\n", ret);
return NULL;
}
&gp, sizeof(gp));
if (ret) {
FREE( screen );
- fprintf(stderr, "drmRadeonGetParam (RADEON_PARAM_IRQ_NR): %d\n", ret);
+ fprintf(stderr, "drm_radeon_getparam_t (RADEON_PARAM_IRQ_NR): %d\n", ret);
return NULL;
}
}
return NULL;
}
+ RADEONMMIO = screen->mmio.map;
+
screen->status.handle = dri_priv->statusHandle;
screen->status.size = dri_priv->statusSize;
if ( drmMap( sPriv->fd,
__driUtilMessage("%s: drmMap (2) failed\n", __FUNCTION__ );
return NULL;
}
- screen->scratch = (__volatile__ CARD32 *)
+ screen->scratch = (__volatile__ u_int32_t *)
((GLubyte *)screen->status.map + RADEON_SCRATCH_REG_OFFSET);
screen->buffers = drmMapBufs( sPriv->fd );
return NULL;
}
- if ( !screen->IsPCI ) {
- screen->agpTextures.handle = dri_priv->agpTexHandle;
- screen->agpTextures.size = dri_priv->agpTexMapSize;
+ if ( dri_priv->gartTexHandle && dri_priv->gartTexMapSize ) {
+ screen->gartTextures.handle = dri_priv->gartTexHandle;
+ screen->gartTextures.size = dri_priv->gartTexMapSize;
if ( drmMap( sPriv->fd,
- screen->agpTextures.handle,
- screen->agpTextures.size,
- (drmAddressPtr)&screen->agpTextures.map ) ) {
+ screen->gartTextures.handle,
+ screen->gartTextures.size,
+ (drmAddressPtr)&screen->gartTextures.map ) ) {
drmUnmapBufs( screen->buffers );
drmUnmap( screen->status.map, screen->status.size );
drmUnmap( screen->mmio.map, screen->mmio.size );
FREE( screen );
- __driUtilMessage("%s: IsPCI failed\n", __FUNCTION__);
+ __driUtilMessage("%s: drmMap failed for GART texture area\n", __FUNCTION__);
return NULL;
}
+
+ screen->gart_texture_offset = dri_priv->gartTexOffset + ( screen->IsPCI
+ ? INREG( RADEON_AIC_LO_ADDR )
+ : ( ( INREG( RADEON_MC_AGP_LOCATION ) & 0x0ffffU ) << 16 ) );
}
screen->chipset = 0;
case PCI_CHIP_RADEON_QE:
case PCI_CHIP_RADEON_QF:
case PCI_CHIP_RADEON_QG:
+ /* all original radeons (7200) presumably have a stencil op bug */
+ screen->chipset |= RADEON_CHIPSET_BROKEN_STENCIL;
case PCI_CHIP_RV200_QW:
+ case PCI_CHIP_RV200_QX:
case PCI_CHIP_RADEON_LW:
+ case PCI_CHIP_RADEON_LX:
screen->chipset |= RADEON_CHIPSET_TCL;
case PCI_CHIP_RADEON_QY:
case PCI_CHIP_RADEON_QZ:
case PCI_CHIP_RADEON_LY:
case PCI_CHIP_RADEON_LZ:
+ case PCI_CHIP_RS100_4136: /* IGPs don't have TCL */
+ case PCI_CHIP_RS200_4137:
+ case PCI_CHIP_RS250_4237:
+ case PCI_CHIP_RS100_4336:
+ case PCI_CHIP_RS200_4337:
+ case PCI_CHIP_RS250_4437:
break;
}
screen->cpp = dri_priv->bpp / 8;
screen->AGPMode = dri_priv->AGPMode;
+ screen->fbLocation = ( INREG( RADEON_MC_FB_LOCATION ) & 0xffff ) << 16;
+
+ if ( sPriv->drmMinor >= 10 ) {
+ drm_radeon_setparam_t sp;
+
+ sp.param = RADEON_SETPARAM_FB_LOCATION;
+ sp.value = screen->fbLocation;
+
+ drmCommandWrite( sPriv->fd, DRM_RADEON_SETPARAM,
+ &sp, sizeof( sp ) );
+ }
+
screen->frontOffset = dri_priv->frontOffset;
screen->frontPitch = dri_priv->frontPitch;
screen->backOffset = dri_priv->backOffset;
screen->depthOffset = dri_priv->depthOffset;
screen->depthPitch = dri_priv->depthPitch;
- screen->texOffset[RADEON_CARD_HEAP] = dri_priv->textureOffset;
- screen->texSize[RADEON_CARD_HEAP] = dri_priv->textureSize;
- screen->logTexGranularity[RADEON_CARD_HEAP] =
+ /* Check if ddx has set up a surface reg to cover depth buffer */
+ screen->depthHasSurface = ((sPriv->ddxMajor > 4) &&
+ (screen->chipset & RADEON_CHIPSET_TCL));
+
+ screen->texOffset[RADEON_LOCAL_TEX_HEAP] = dri_priv->textureOffset
+ + screen->fbLocation;
+ screen->texSize[RADEON_LOCAL_TEX_HEAP] = dri_priv->textureSize;
+ screen->logTexGranularity[RADEON_LOCAL_TEX_HEAP] =
dri_priv->log2TexGran;
- if ( screen->IsPCI
- || getenv( "RADEON_AGPTEXTURING_FORCE_DISABLE" ) ) {
+ if ( !screen->gartTextures.map
+ || getenv( "RADEON_GARTTEXTURING_FORCE_DISABLE" ) ) {
screen->numTexHeaps = RADEON_NR_TEX_HEAPS - 1;
- screen->texOffset[RADEON_AGP_HEAP] = 0;
- screen->texSize[RADEON_AGP_HEAP] = 0;
- screen->logTexGranularity[RADEON_AGP_HEAP] = 0;
+ screen->texOffset[RADEON_GART_TEX_HEAP] = 0;
+ screen->texSize[RADEON_GART_TEX_HEAP] = 0;
+ screen->logTexGranularity[RADEON_GART_TEX_HEAP] = 0;
} else {
screen->numTexHeaps = RADEON_NR_TEX_HEAPS;
- screen->texOffset[RADEON_AGP_HEAP] =
- dri_priv->agpTexOffset + RADEON_AGP_TEX_OFFSET;
- screen->texSize[RADEON_AGP_HEAP] = dri_priv->agpTexMapSize;
- screen->logTexGranularity[RADEON_AGP_HEAP] =
- dri_priv->log2AGPTexGran;
+ screen->texOffset[RADEON_GART_TEX_HEAP] = screen->gart_texture_offset;
+ screen->texSize[RADEON_GART_TEX_HEAP] = dri_priv->gartTexMapSize;
+ screen->logTexGranularity[RADEON_GART_TEX_HEAP] =
+ dri_priv->log2GARTTexGran;
+ }
+
+ if ( driCompareGLXAPIVersion( 20030813 ) >= 0 ) {
+ PFNGLXSCRENABLEEXTENSIONPROC glx_enable_extension =
+ (PFNGLXSCRENABLEEXTENSIONPROC) glXGetProcAddress( (const GLubyte *) "__glXScrEnableExtension" );
+ void * const psc = sPriv->psc->screenConfigs;
+
+ if ( glx_enable_extension != NULL ) {
+ if ( screen->irq != 0 ) {
+ (*glx_enable_extension)( psc, "GLX_SGI_swap_control" );
+ (*glx_enable_extension)( psc, "GLX_SGI_video_sync" );
+ (*glx_enable_extension)( psc, "GLX_MESA_swap_control" );
+ }
+
+ (*glx_enable_extension)( psc, "GLX_MESA_swap_frame_usage" );
+
+ if ( driCompareGLXAPIVersion( 20030915 ) >= 0 ) {
+ (*glx_enable_extension)( psc, "GLX_SGIX_fbconfig" );
+ (*glx_enable_extension)( psc, "GLX_OML_swap_method" );
+ }
+
+ }
}
screen->driScreen = sPriv;
if (!screen)
return;
- if ( !screen->IsPCI ) {
- drmUnmap( screen->agpTextures.map,
- screen->agpTextures.size );
+ if ( screen->gartTextures.map ) {
+ drmUnmap( screen->gartTextures.map, screen->gartTextures.size );
}
drmUnmapBufs( screen->buffers );
drmUnmap( screen->status.map, screen->status.size );
drmUnmap( screen->mmio.map, screen->mmio.size );
+ /* free all option information */
+ driDestroyOptionInfo (&screen->optionCache);
+
FREE( screen );
sPriv->private = NULL;
}
-/* Create and initialize the Mesa and driver specific pixmap buffer
+/**
+ * Create and initialize the Mesa and driver specific pixmap buffer
* data.
+ *
+ * \todo This function (and its interface) will need to be updated to support
+ * pbuffers.
*/
static GLboolean
radeonCreateBuffer( __DRIscreenPrivate *driScrnPriv,
_mesa_destroy_framebuffer((GLframebuffer *) (driDrawPriv->driverPrivate));
}
-
-
-
-/* Fullscreen mode isn't used for much -- could be a way to shrink
- * front/back buffers & get more texture memory if the client has
- * changed the video resolution.
- *
- * Pageflipping is now done automatically whenever there is a single
- * 3d client.
- */
-static GLboolean
-radeonOpenCloseFullScreen( __DRIcontextPrivate *driContextPriv )
-{
- return GL_TRUE;
-}
-
static struct __DriverAPIRec radeonAPI = {
.InitDriver = radeonInitDriver,
.DestroyScreen = radeonDestroyScreen,
.SwapBuffers = radeonSwapBuffers,
.MakeCurrent = radeonMakeCurrent,
.UnbindContext = radeonUnbindContext,
- .OpenFullScreen = radeonOpenCloseFullScreen,
- .CloseFullScreen = radeonOpenCloseFullScreen,
.GetSwapInfo = getSwapInfo,
.GetMSC = driGetMSC32,
.WaitForMSC = driWaitForMSC32,
};
-
/*
* This is the bootstrap function for the driver.
* The __driCreateScreen name is the symbol that libGL.so fetches.
* Return: pointer to a __DRIscreenPrivate.
*/
-#ifndef _SOLO
+#if !defined(DRI_NEW_INTERFACE_ONLY)
void *__driCreateScreen(Display *dpy, int scrn, __DRIscreen *psc,
int numConfigs, __GLXvisualConfig *config)
{
psp = __driUtilCreateScreen(dpy, scrn, psc, numConfigs, config, &radeonAPI);
return (void *) psp;
}
-#else
-void *__driCreateScreen(struct DRIDriverRec *driver,
- struct DRIDriverContextRec *driverContext)
-{
- __DRIscreenPrivate *psp;
- psp = __driUtilCreateScreen(driver, driverContext, &radeonAPI);
- return (void *) psp;
-}
-#endif
-
+#endif /* !defined(DRI_NEW_INTERFACE_ONLY) */
-#ifndef _SOLO
-/* This function is called by libGL.so as soon as libGL.so is loaded.
- * This is where we'd register new extension functions with the dispatcher.
+/**
+ * This is the bootstrap function for the driver. libGL supplies all of the
+ * requisite information about the system, and the driver initializes itself.
+ * This routine also fills in the linked list pointed to by \c driver_modes
+ * with the \c __GLcontextModes that the driver can support for windows or
+ * pbuffers.
+ *
+ * \return A pointer to a \c __DRIscreenPrivate on success, or \c NULL on
+ * failure.
*/
-void
-__driRegisterExtensions( void )
-{
- PFNGLXENABLEEXTENSIONPROC glx_enable_extension;
-
+#ifdef USE_NEW_INTERFACE
+PUBLIC
+void * __driCreateNewScreen( __DRInativeDisplay *dpy, int scrn, __DRIscreen *psc,
+ const __GLcontextModes * modes,
+ const __DRIversion * ddx_version,
+ const __DRIversion * dri_version,
+ const __DRIversion * drm_version,
+ const __DRIframebuffer * frame_buffer,
+ drmAddress pSAREA, int fd,
+ int internal_api_version,
+ __GLcontextModes ** driver_modes )
- if ( driCompareGLXAPIVersion( 20030317 ) >= 0 ) {
- glx_enable_extension = (PFNGLXENABLEEXTENSIONPROC)
- glXGetProcAddress( "__glXEnableExtension" );
+{
+ __DRIscreenPrivate *psp;
+ static const __DRIutilversion2 ddx_expected = { 4, 5, 0, 0 };
+ static const __DRIversion dri_expected = { 4, 0, 0 };
+ static const __DRIversion drm_expected = { 1, 3, 0 };
+
+ if ( ! driCheckDriDdxDrmVersions3( "Radeon",
+ dri_version, & dri_expected,
+ ddx_version, & ddx_expected,
+ drm_version, & drm_expected ) ) {
+ return NULL;
+ }
- if ( glx_enable_extension != NULL ) {
- glx_enable_extension( "GLX_SGI_swap_control", GL_FALSE );
- glx_enable_extension( "GLX_SGI_video_sync", GL_FALSE );
- glx_enable_extension( "GLX_MESA_swap_control", GL_FALSE );
- glx_enable_extension( "GLX_MESA_swap_frame_usage", GL_FALSE );
+ psp = __driUtilCreateNewScreen(dpy, scrn, psc, NULL,
+ ddx_version, dri_version, drm_version,
+ frame_buffer, pSAREA, fd,
+ internal_api_version, &radeonAPI);
+ if ( psp != NULL ) {
+ create_context_modes = (PFNGLXCREATECONTEXTMODES)
+ glXGetProcAddress( (const GLubyte *) "__glXCreateContextModes" );
+ if ( create_context_modes != NULL ) {
+ RADEONDRIPtr dri_priv = (RADEONDRIPtr) psp->pDevPriv;
+ *driver_modes = radeonFillInModes( dri_priv->bpp,
+ (dri_priv->bpp == 16) ? 16 : 24,
+ (dri_priv->bpp == 16) ? 0 : 8,
+ (dri_priv->backOffset != dri_priv->depthOffset) );
}
}
-}
-#endif
+ return (void *) psp;
+}
+#endif /* USE_NEW_INTERFACE */
/**
* Get information about previous buffer swaps.