radeon: use t->bo to figure out of settexbuffer override is in action

[mesa.git] / src / mesa / drivers / dri / radeon / radeon_screen.h

diff --git a/src/mesa/drivers/dri/radeon/radeon_screen.h b/src/mesa/drivers/dri/radeon/radeon_screen.h
index b9cbeaac3354f889b5233140511e75a90d468792..1c0f5bb9bc7db468b38a26dea1a16f2dd0606b05 100644 (file)
--- a/src/mesa/drivers/dri/radeon/radeon_screen.h
+++ b/src/mesa/drivers/dri/radeon/radeon_screen.h
@@ -1,4 +1,3 @@
-/* $XFree86: xc/lib/GL/mesa/src/drv/radeon/radeon_screen.h,v 1.5 2002/12/16 16:18:58 dawes Exp $ */
 /**************************************************************************
 
 Copyright 2000, 2001 ATI Technologies Inc., Ontario, Canada, and
@@ -41,8 +40,9 @@ WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
  * IMPORTS: these headers contain all the DRI, X and kernel-related
  * definitions that we need.
  */
-/* #include "dri_util.h" */
+#include "dri_util.h"
 #include "radeon_dri.h"
+#include "radeon_chipset.h"
 #include "radeon_reg.h"
 #include "drm_sarea.h"
 #include "xmlconfig.h"
@@ -54,15 +54,11 @@ typedef struct {
    drmAddress map;                     /* Mapping of the DRM region */
 } radeonRegionRec, *radeonRegionPtr;
 
-/* chipset features */
-#define RADEON_CHIPSET_TCL     (1 << 0)
-#define RADEON_CHIPSET_BROKEN_STENCIL (1 << 1)
-
-typedef struct {
-
-   int chipset;
+typedef struct radeon_screen {
+   int chip_family;
+   int chip_flags;
    int cpp;
-   int IsPCI;                          /* Current card is a PCI card */
+   int card_type;
    int AGPMode;
    unsigned int irq;                   /* IRQ number (0 means none) */
 
@@ -87,17 +83,39 @@ typedef struct {
 
    drmBufMapPtr buffers;
 
-   __volatile__ u_int32_t *scratch;
+   __volatile__ uint32_t *scratch;
 
    __DRIscreenPrivate *driScreen;
    unsigned int sarea_priv_offset;
    unsigned int gart_buffer_offset;    /* offset in card memory space */
    unsigned int gart_texture_offset;   /* offset in card memory space */
-
+   unsigned int gart_base;
+
+   GLboolean drmSupportsCubeMapsR200;   /* need radeon kernel module >= 1.7 */
+   GLboolean drmSupportsBlendColor;     /* need radeon kernel module >= 1.11 */
+   GLboolean drmSupportsTriPerf;        /* need radeon kernel module >= 1.16 */
+   GLboolean drmSupportsFragShader;     /* need radeon kernel module >= 1.18 */
+   GLboolean drmSupportsPointSprites;   /* need radeon kernel module >= 1.13 */
+   GLboolean drmSupportsCubeMapsR100;   /* need radeon kernel module >= 1.15 */
+   GLboolean drmSupportsVertexProgram;  /* need radeon kernel module >= 1.25 */
    GLboolean depthHasSurface;
 
    /* Configuration cache with default values for all contexts */
    driOptionCache optionCache;
+
+   const __DRIextension *extensions[16];
+
+   int num_gb_pipes;
+   int kernel_mm;
+   drm_radeon_sarea_t *sarea;  /* Private SAREA data */
+   struct radeon_bo_manager *bom;
 } radeonScreenRec, *radeonScreenPtr;
 
+#define IS_R100_CLASS(screen) \
+       ((screen->chip_flags & RADEON_CLASS_MASK) == RADEON_CLASS_R100)
+#define IS_R200_CLASS(screen) \
+       ((screen->chip_flags & RADEON_CLASS_MASK) == RADEON_CLASS_R200)
+#define IS_R300_CLASS(screen) \
+       ((screen->chip_flags & RADEON_CLASS_MASK) == RADEON_CLASS_R300)
+
 #endif /* __RADEON_SCREEN_H__ */