mesa: Remove EXT_texture_env_combine extension enable flag

[mesa.git] / src / mesa / drivers / dri / radeon / radeon_screen.h

diff --git a/src/mesa/drivers/dri/radeon/radeon_screen.h b/src/mesa/drivers/dri/radeon/radeon_screen.h
index fe5c7d875a0577f772037f0f455fcc458bd91eaa..417ebf3b067dc9f4c72b8c2f1c862f2bc76cb861 100644 (file)
--- a/src/mesa/drivers/dri/radeon/radeon_screen.h
+++ b/src/mesa/drivers/dri/radeon/radeon_screen.h
@@ -86,7 +86,7 @@ typedef struct radeon_screen {
 
    __volatile__ uint32_t *scratch;
 
-   __DRIscreenPrivate *driScreen;
+   __DRIscreen *driScreen;
    unsigned int sarea_priv_offset;
    unsigned int gart_buffer_offset;    /* offset in card memory space */
    unsigned int gart_texture_offset;   /* offset in card memory space */
@@ -99,25 +99,47 @@ typedef struct radeon_screen {
    GLboolean drmSupportsPointSprites;   /* need radeon kernel module >= 1.13 */
    GLboolean drmSupportsCubeMapsR100;   /* need radeon kernel module >= 1.15 */
    GLboolean drmSupportsVertexProgram;  /* need radeon kernel module >= 1.25 */
+   GLboolean drmSupportsOcclusionQueries; /* need radeon kernel module >= 1.30 */
    GLboolean depthHasSurface;
 
    /* Configuration cache with default values for all contexts */
    driOptionCache optionCache;
 
-   const __DRIextension *extensions[16];
+   const __DRIextension *extensions[17];
 
    int num_gb_pipes;
+   int num_z_pipes;
    int kernel_mm;
    drm_radeon_sarea_t *sarea;  /* Private SAREA data */
    struct radeon_bo_manager *bom;
+
+   /* r6xx+ tiling */
+   GLuint tile_config;
+   GLint group_bytes;
+   GLint num_channels;
+   GLint num_banks;
+   GLint r7xx_bank_op;
 } radeonScreenRec, *radeonScreenPtr;
 
+struct __DRIimageRec {
+   struct radeon_bo *bo;
+   GLenum internal_format;
+   GLuint format;
+   GLenum data_type;
+   int width, height;  /* in pixels */
+   int pitch;          /* in pixels */
+   int cpp;
+   void *data;
+};
+
 #define IS_R100_CLASS(screen) \
        ((screen->chip_flags & RADEON_CLASS_MASK) == RADEON_CLASS_R100)
 #define IS_R200_CLASS(screen) \
        ((screen->chip_flags & RADEON_CLASS_MASK) == RADEON_CLASS_R200)
 #define IS_R300_CLASS(screen) \
        ((screen->chip_flags & RADEON_CLASS_MASK) == RADEON_CLASS_R300)
+#define IS_R600_CLASS(screen) \
+       ((screen->chip_flags & RADEON_CLASS_MASK) == RADEON_CLASS_R600)
 
-extern void radeonDestroyBuffer(__DRIdrawablePrivate *driDrawPriv);
+extern void radeonDestroyBuffer(__DRIdrawable *driDrawPriv);
 #endif /* __RADEON_SCREEN_H__ */