#define LOCAL_STENCIL_VARS LOCAL_DEPTH_VARS
-
-#define CLIPPIXEL( _x, _y ) \
- ((_x >= minx) && (_x < maxx) && (_y >= miny) && (_y < maxy))
-
-
-#define CLIPSPAN( _x, _y, _n, _x1, _n1, _i ) \
- if ( _y < miny || _y >= maxy ) { \
- _n1 = 0, _x1 = x; \
- } else { \
- _n1 = _n; \
- _x1 = _x; \
- if ( _x1 < minx ) _i += (minx-_x1), n1 -= (minx-_x1), _x1 = minx; \
- if ( _x1 + _n1 >= maxx ) n1 -= (_x1 + n1 - maxx); \
- }
-
#define Y_FLIP( _y ) (height - _y - 1)
-
#define HW_LOCK()
-#define HW_CLIPLOOP() \
- do { \
- __DRIdrawablePrivate *dPriv = rmesa->dri.drawable; \
- int _nc = dPriv->numClipRects; \
- \
- while ( _nc-- ) { \
- int minx = dPriv->pClipRects[_nc].x1 - dPriv->x; \
- int miny = dPriv->pClipRects[_nc].y1 - dPriv->y; \
- int maxx = dPriv->pClipRects[_nc].x2 - dPriv->x; \
- int maxy = dPriv->pClipRects[_nc].y2 - dPriv->y;
-
-#define HW_ENDCLIPLOOP() \
- } \
- } while (0)
-
#define HW_UNLOCK()
/* 16 bit, RGB565 color spanline and pixel functions
*/
-#define INIT_MONO_PIXEL(p, color) \
- p = PACK_COLOR_565( color[0], color[1], color[2] )
-
-#define WRITE_RGBA( _x, _y, r, g, b, a ) \
- *(GLushort *)(buf + _x*2 + _y*pitch) = ((((int)r & 0xf8) << 8) | \
- (((int)g & 0xfc) << 3) | \
- (((int)b & 0xf8) >> 3))
-
-#define WRITE_PIXEL( _x, _y, p ) \
- *(GLushort *)(buf + _x*2 + _y*pitch) = p
+#define SPANTMP_PIXEL_FMT GL_RGB
+#define SPANTMP_PIXEL_TYPE GL_UNSIGNED_SHORT_5_6_5
-#define READ_RGBA( rgba, _x, _y ) \
- do { \
- GLushort p = *(GLushort *)(read_buf + _x*2 + _y*pitch); \
- rgba[0] = ((p >> 8) & 0xf8) * 255 / 0xf8; \
- rgba[1] = ((p >> 3) & 0xfc) * 255 / 0xfc; \
- rgba[2] = ((p << 3) & 0xf8) * 255 / 0xf8; \
- rgba[3] = 0xff; \
- } while (0)
-
-#define TAG(x) radeon##x##_RGB565
-#include "spantmp.h"
+#define TAG(x) radeon##x##_RGB565
+#define TAG2(x,y) radeon##x##_RGB565##y
+#include "spantmp2.h"
/* 32 bit, ARGB8888 color spanline and pixel functions
*/
-#undef INIT_MONO_PIXEL
-#define INIT_MONO_PIXEL(p, color) \
- p = PACK_COLOR_8888( color[3], color[0], color[1], color[2] )
-
-#define WRITE_RGBA( _x, _y, r, g, b, a ) \
-do { \
- *(GLuint *)(buf + _x*4 + _y*pitch) = ((b << 0) | \
- (g << 8) | \
- (r << 16) | \
- (a << 24) ); \
-} while (0)
-
-#define WRITE_PIXEL( _x, _y, p ) \
-do { \
- *(GLuint *)(buf + _x*4 + _y*pitch) = p; \
-} while (0)
-
-#define READ_RGBA( rgba, _x, _y ) \
-do { \
- volatile GLuint *ptr = (volatile GLuint *)(read_buf + _x*4 + _y*pitch); \
- GLuint p = *ptr; \
- rgba[0] = (p >> 16) & 0xff; \
- rgba[1] = (p >> 8) & 0xff; \
- rgba[2] = (p >> 0) & 0xff; \
- rgba[3] = (p >> 24) & 0xff; \
-} while (0)
-
-#define TAG(x) radeon##x##_ARGB8888
-#include "spantmp.h"
+#define SPANTMP_PIXEL_FMT GL_BGRA
+#define SPANTMP_PIXEL_TYPE GL_UNSIGNED_INT_8_8_8_8_REV
+#define TAG(x) radeon##x##_ARGB8888
+#define TAG2(x,y) radeon##x##_ARGB8888##y
+#include "spantmp2.h"
/* ================================================================
* manner as the engine. In each case, the linear block address (ba)
* is calculated, and then wired with x and y to produce the final
* memory address.
+ * The chip will do address translation on its own if the surface registers
+ * are set up correctly. It is not quite enough to get it working with hyperz too...
*/
static GLuint radeon_mba_z32( radeonContextPtr rmesa,
GLint x, GLint y )
{
GLuint pitch = rmesa->radeonScreen->frontPitch;
- GLuint ba, address = 0; /* a[0..1] = 0 */
+ if (rmesa->radeonScreen->depthHasSurface) {
+ return 4*(x + y*pitch);
+ }
+ else {
+ GLuint ba, address = 0; /* a[0..1] = 0 */
- ba = (y / 16) * (pitch / 16) + (x / 16);
+ ba = (y / 16) * (pitch / 16) + (x / 16);
- address |= (x & 0x7) << 2; /* a[2..4] = x[0..2] */
- address |= (y & 0x3) << 5; /* a[5..6] = y[0..1] */
- address |=
- (((x & 0x10) >> 2) ^ (y & 0x4)) << 5; /* a[7] = x[4] ^ y[2] */
- address |= (ba & 0x3) << 8; /* a[8..9] = ba[0..1] */
+ address |= (x & 0x7) << 2; /* a[2..4] = x[0..2] */
+ address |= (y & 0x3) << 5; /* a[5..6] = y[0..1] */
+ address |=
+ (((x & 0x10) >> 2) ^ (y & 0x4)) << 5; /* a[7] = x[4] ^ y[2] */
+ address |= (ba & 0x3) << 8; /* a[8..9] = ba[0..1] */
- address |= (y & 0x8) << 7; /* a[10] = y[3] */
- address |=
- (((x & 0x8) << 1) ^ (y & 0x10)) << 7; /* a[11] = x[3] ^ y[4] */
- address |= (ba & ~0x3) << 10; /* a[12..] = ba[2..] */
+ address |= (y & 0x8) << 7; /* a[10] = y[3] */
+ address |=
+ (((x & 0x8) << 1) ^ (y & 0x10)) << 7; /* a[11] = x[3] ^ y[4] */
+ address |= (ba & ~0x3) << 10; /* a[12..] = ba[2..] */
- return address;
+ return address;
+ }
}
static __inline GLuint radeon_mba_z16( radeonContextPtr rmesa, GLint x, GLint y )
{
GLuint pitch = rmesa->radeonScreen->frontPitch;
- GLuint ba, address = 0; /* a[0] = 0 */
+ if (rmesa->radeonScreen->depthHasSurface) {
+ return 2*(x + y*pitch);
+ }
+ else {
+ GLuint ba, address = 0; /* a[0] = 0 */
- ba = (y / 16) * (pitch / 32) + (x / 32);
+ ba = (y / 16) * (pitch / 32) + (x / 32);
- address |= (x & 0x7) << 1; /* a[1..3] = x[0..2] */
- address |= (y & 0x7) << 4; /* a[4..6] = y[0..2] */
- address |= (x & 0x8) << 4; /* a[7] = x[3] */
- address |= (ba & 0x3) << 8; /* a[8..9] = ba[0..1] */
- address |= (y & 0x8) << 7; /* a[10] = y[3] */
- address |= ((x & 0x10) ^ (y & 0x10)) << 7; /* a[11] = x[4] ^ y[4] */
- address |= (ba & ~0x3) << 10; /* a[12..] = ba[2..] */
+ address |= (x & 0x7) << 1; /* a[1..3] = x[0..2] */
+ address |= (y & 0x7) << 4; /* a[4..6] = y[0..2] */
+ address |= (x & 0x8) << 4; /* a[7] = x[3] */
+ address |= (ba & 0x3) << 8; /* a[8..9] = ba[0..1] */
+ address |= (y & 0x8) << 7; /* a[10] = y[3] */
+ address |= ((x & 0x10) ^ (y & 0x10)) << 7; /* a[11] = x[4] ^ y[4] */
+ address |= (ba & ~0x3) << 10; /* a[12..] = ba[2..] */
- return address;
+ return address;
+ }
}
radeonContextPtr rmesa = RADEON_CONTEXT(ctx);
switch ( bufferBit ) {
- case DD_FRONT_LEFT_BIT:
+ case BUFFER_BIT_FRONT_LEFT:
if ( rmesa->sarea->pfCurrentPage == 1 ) {
rmesa->state.pixel.readOffset = rmesa->radeonScreen->backOffset;
rmesa->state.pixel.readPitch = rmesa->radeonScreen->backPitch;
rmesa->state.color.drawPitch = rmesa->radeonScreen->frontPitch;
}
break;
- case DD_BACK_LEFT_BIT:
+ case BUFFER_BIT_BACK_LEFT:
if ( rmesa->sarea->pfCurrentPage == 1 ) {
rmesa->state.pixel.readOffset = rmesa->radeonScreen->frontOffset;
rmesa->state.pixel.readPitch = rmesa->radeonScreen->frontPitch;
void radeonInitSpanFuncs( GLcontext *ctx )
{
- radeonContextPtr rmesa = RADEON_CONTEXT(ctx);
struct swrast_device_driver *swdd = _swrast_GetDeviceDriverReference(ctx);
swdd->SetBuffer = radeonSetBuffer;
+ swdd->SpanRenderStart = radeonSpanRenderStart;
+ swdd->SpanRenderFinish = radeonSpanRenderFinish;
+}
- switch ( rmesa->radeonScreen->cpp ) {
- case 2:
- swdd->WriteRGBASpan = radeonWriteRGBASpan_RGB565;
- swdd->WriteRGBSpan = radeonWriteRGBSpan_RGB565;
- swdd->WriteMonoRGBASpan = radeonWriteMonoRGBASpan_RGB565;
- swdd->WriteRGBAPixels = radeonWriteRGBAPixels_RGB565;
- swdd->WriteMonoRGBAPixels = radeonWriteMonoRGBAPixels_RGB565;
- swdd->ReadRGBASpan = radeonReadRGBASpan_RGB565;
- swdd->ReadRGBAPixels = radeonReadRGBAPixels_RGB565;
- break;
-
- case 4:
- swdd->WriteRGBASpan = radeonWriteRGBASpan_ARGB8888;
- swdd->WriteRGBSpan = radeonWriteRGBSpan_ARGB8888;
- swdd->WriteMonoRGBASpan = radeonWriteMonoRGBASpan_ARGB8888;
- swdd->WriteRGBAPixels = radeonWriteRGBAPixels_ARGB8888;
- swdd->WriteMonoRGBAPixels = radeonWriteMonoRGBAPixels_ARGB8888;
- swdd->ReadRGBASpan = radeonReadRGBASpan_ARGB8888;
- swdd->ReadRGBAPixels = radeonReadRGBAPixels_ARGB8888;
- break;
- default:
- break;
+/**
+ * Plug in the Get/Put routines for the given driRenderbuffer.
+ */
+void
+radeonSetSpanFunctions(driRenderbuffer *drb, const GLvisual *vis)
+{
+ if (drb->Base.InternalFormat == GL_RGBA) {
+ if (vis->redBits == 5 && vis->greenBits == 6 && vis->blueBits == 5) {
+ radeonInitPointers_RGB565(&drb->Base);
+ }
+ else {
+ radeonInitPointers_ARGB8888(&drb->Base);
+ }
}
-
- switch ( rmesa->glCtx->Visual.depthBits ) {
- case 16:
- swdd->ReadDepthSpan = radeonReadDepthSpan_16;
- swdd->WriteDepthSpan = radeonWriteDepthSpan_16;
- swdd->ReadDepthPixels = radeonReadDepthPixels_16;
- swdd->WriteDepthPixels = radeonWriteDepthPixels_16;
- break;
-
- case 24:
- swdd->ReadDepthSpan = radeonReadDepthSpan_24_8;
- swdd->WriteDepthSpan = radeonWriteDepthSpan_24_8;
- swdd->ReadDepthPixels = radeonReadDepthPixels_24_8;
- swdd->WriteDepthPixels = radeonWriteDepthPixels_24_8;
-
- swdd->ReadStencilSpan = radeonReadStencilSpan_24_8;
- swdd->WriteStencilSpan = radeonWriteStencilSpan_24_8;
- swdd->ReadStencilPixels = radeonReadStencilPixels_24_8;
- swdd->WriteStencilPixels = radeonWriteStencilPixels_24_8;
- break;
-
- default:
- break;
+ else if (drb->Base.InternalFormat == GL_DEPTH_COMPONENT16) {
+ drb->Base.GetRow = radeonReadDepthSpan_16;
+ drb->Base.GetValues = radeonReadDepthPixels_16;
+ drb->Base.PutRow = radeonWriteDepthSpan_16;
+ drb->Base.PutMonoRow = radeonWriteMonoDepthSpan_16;
+ drb->Base.PutValues = radeonWriteDepthPixels_16;
+ drb->Base.PutMonoValues = NULL;
+ }
+ else if (drb->Base.InternalFormat == GL_DEPTH_COMPONENT24) {
+ drb->Base.GetRow = radeonReadDepthSpan_24_8;
+ drb->Base.GetValues = radeonReadDepthPixels_24_8;
+ drb->Base.PutRow = radeonWriteDepthSpan_24_8;
+ drb->Base.PutMonoRow = radeonWriteMonoDepthSpan_24_8;
+ drb->Base.PutValues = radeonWriteDepthPixels_24_8;
+ drb->Base.PutMonoValues = NULL;
+ }
+ else if (drb->Base.InternalFormat == GL_STENCIL_INDEX8_EXT) {
+ drb->Base.GetRow = radeonReadStencilSpan_24_8;
+ drb->Base.GetValues = radeonReadStencilPixels_24_8;
+ drb->Base.PutRow = radeonWriteStencilSpan_24_8;
+ drb->Base.PutMonoRow = radeonWriteMonoStencilSpan_24_8;
+ drb->Base.PutValues = radeonWriteStencilPixels_24_8;
+ drb->Base.PutMonoValues = NULL;
}
-
- swdd->SpanRenderStart = radeonSpanRenderStart;
- swdd->SpanRenderFinish = radeonSpanRenderFinish;
}
projects / mesa.git / blobdiff