#include "enums.h"
#include "colormac.h"
#include "state.h"
+#include "buffers.h"
+#include "context.h"
#include "swrast/swrast.h"
#include "array_cache/acache.h"
rmesa->hw.ctx.cmd[CTX_PP_MISC] = pp_misc;
}
-static void radeonBlendEquation( GLcontext *ctx, GLenum mode )
+static void radeonBlendEquationSeparate( GLcontext *ctx,
+ GLenum modeRGB, GLenum modeA )
{
radeonContextPtr rmesa = RADEON_CONTEXT(ctx);
GLuint b = rmesa->hw.ctx.cmd[CTX_RB3D_BLENDCNTL] & ~RADEON_COMB_FCN_MASK;
GLboolean fallback = GL_FALSE;
- switch ( mode ) {
+ assert( modeRGB == modeA );
+
+ switch ( modeRGB ) {
case GL_FUNC_ADD:
case GL_LOGIC_OP:
b |= RADEON_COMB_FCN_ADD_CLAMP;
if ( !fallback ) {
RADEON_STATECHANGE( rmesa, ctx );
rmesa->hw.ctx.cmd[CTX_RB3D_BLENDCNTL] = b;
- if ( ctx->Color.ColorLogicOpEnabled ) {
+ if ( ctx->Color._LogicOpEnabled ) {
rmesa->hw.ctx.cmd[CTX_RB3D_CNTL] |= RADEON_ROP_ENABLE;
} else {
rmesa->hw.ctx.cmd[CTX_RB3D_CNTL] &= ~RADEON_ROP_ENABLE;
}
}
-static void radeonBlendFunc( GLcontext *ctx, GLenum sfactor, GLenum dfactor )
+static void radeonBlendFuncSeparate( GLcontext *ctx,
+ GLenum sfactorRGB, GLenum dfactorRGB,
+ GLenum sfactorA, GLenum dfactorA )
{
radeonContextPtr rmesa = RADEON_CONTEXT(ctx);
GLuint b = rmesa->hw.ctx.cmd[CTX_RB3D_BLENDCNTL] &
}
}
-static void radeonBlendFuncSeparate( GLcontext *ctx,
- GLenum sfactorRGB, GLenum dfactorRGB,
- GLenum sfactorA, GLenum dfactorA )
-{
- radeonBlendFunc( ctx, sfactorRGB, dfactorRGB );
-}
-
/* =============================================================
* Depth testing
*/
-static GLboolean intersect_rect( XF86DRIClipRectPtr out,
- XF86DRIClipRectPtr a,
- XF86DRIClipRectPtr b )
+static GLboolean intersect_rect( drm_clip_rect_t *out,
+ drm_clip_rect_t *a,
+ drm_clip_rect_t *b )
{
*out = *a;
if ( b->x1 > out->x1 ) out->x1 = b->x1;
void radeonRecalcScissorRects( radeonContextPtr rmesa )
{
- XF86DRIClipRectPtr out;
+ drm_clip_rect_t *out;
int i;
/* Grow cliprect store?
rmesa->state.scissor.pClipRects =
MALLOC( rmesa->state.scissor.numAllocedClipRects *
- sizeof(XF86DRIClipRectRec) );
+ sizeof(drm_clip_rect_t) );
if ( rmesa->state.scissor.pClipRects == NULL ) {
rmesa->state.scissor.numAllocedClipRects = 0;
{
radeonContextPtr rmesa = RADEON_CONTEXT(ctx);
GLuint i;
- drmRadeonStipple stipple;
+ drm_radeon_stipple_t stipple;
/* Must flip pattern upside down.
*/
*/
stipple.mask = rmesa->state.stipple.mask;
drmCommandWrite( rmesa->dri.fd, DRM_RADEON_STIPPLE,
- &stipple, sizeof(drmRadeonStipple) );
+ &stipple, sizeof(drm_radeon_stipple_t) );
UNLOCK_HARDWARE( rmesa );
}
static void radeonUpdateSpecular( GLcontext *ctx )
{
radeonContextPtr rmesa = RADEON_CONTEXT(ctx);
- CARD32 p = rmesa->hw.ctx.cmd[CTX_PP_CNTL];
+ uint32_t p = rmesa->hw.ctx.cmd[CTX_PP_CNTL];
RADEON_STATECHANGE( rmesa, tcl );
rmesa->hw.tcl.cmd[TCL_LIGHT_MODEL_CTL] |= RADEON_LIGHTING_ENABLE;
}
- if ( ctx->_TriangleCaps & DD_SEPARATE_SPECULAR ) {
+ if (NEED_SECONDARY_COLOR(ctx)) {
assert( (p & RADEON_SPECULAR_ENABLE) != 0 );
} else {
assert( (p & RADEON_SPECULAR_ENABLE) == 0 );
float *fcmd = (float *)RADEON_DB_STATE( glt );
/* Need to do more if both emmissive & ambient are PREMULT:
+ * Hope this is not needed for MULT
*/
if ((rmesa->hw.tcl.cmd[TCL_LIGHT_MODEL_CTL] &
((3 << RADEON_EMISSIVE_SOURCE_SHIFT) |
/* Update on change to
* - light[p].colors
* - light[p].enabled
- * - material,
- * - colormaterial enabled
- * - colormaterial bitmask
*/
static void update_light_colors( GLcontext *ctx, GLuint p )
{
if (l->Enabled) {
radeonContextPtr rmesa = RADEON_CONTEXT(ctx);
float *fcmd = (float *)RADEON_DB_STATE( lit[p] );
- GLuint bitmask = ctx->Light.ColorMaterialBitmask;
- GLfloat (*mat)[4] = ctx->Light.Material.Attrib;
COPY_4V( &fcmd[LIT_AMBIENT_RED], l->Ambient );
COPY_4V( &fcmd[LIT_DIFFUSE_RED], l->Diffuse );
COPY_4V( &fcmd[LIT_SPECULAR_RED], l->Specular );
- if (!ctx->Light.ColorMaterialEnabled)
- bitmask = 0;
-
- if ((bitmask & MAT_BIT_FRONT_AMBIENT) == 0)
- SELF_SCALE_3V( &fcmd[LIT_AMBIENT_RED], mat[MAT_ATTRIB_FRONT_AMBIENT] );
-
- if ((bitmask & MAT_BIT_FRONT_DIFFUSE) == 0)
- SELF_SCALE_3V( &fcmd[LIT_DIFFUSE_RED], mat[MAT_ATTRIB_FRONT_DIFFUSE] );
-
- if ((bitmask & MAT_BIT_FRONT_SPECULAR) == 0)
- SELF_SCALE_3V( &fcmd[LIT_SPECULAR_RED], mat[MAT_ATTRIB_FRONT_SPECULAR] );
-
RADEON_DB_STATECHANGE( rmesa, &rmesa->hw.lit[p] );
}
}
static void radeonColorMaterial( GLcontext *ctx, GLenum face, GLenum mode )
{
- if (ctx->Light.ColorMaterialEnabled) {
radeonContextPtr rmesa = RADEON_CONTEXT(ctx);
GLuint light_model_ctl1 = rmesa->hw.tcl.cmd[TCL_LIGHT_MODEL_CTL];
- GLuint mask = ctx->Light.ColorMaterialBitmask;
- /* Default to PREMULT:
- */
- light_model_ctl1 &= ~((0xf << RADEON_EMISSIVE_SOURCE_SHIFT) |
- (0xf << RADEON_AMBIENT_SOURCE_SHIFT) |
- (0xf << RADEON_DIFFUSE_SOURCE_SHIFT) |
- (0xf << RADEON_SPECULAR_SOURCE_SHIFT));
+ light_model_ctl1 &= ~((3 << RADEON_EMISSIVE_SOURCE_SHIFT) |
+ (3 << RADEON_AMBIENT_SOURCE_SHIFT) |
+ (3 << RADEON_DIFFUSE_SOURCE_SHIFT) |
+ (3 << RADEON_SPECULAR_SOURCE_SHIFT));
+ if (ctx->Light.ColorMaterialEnabled) {
+ GLuint mask = ctx->Light.ColorMaterialBitmask;
+
if (mask & MAT_BIT_FRONT_EMISSION) {
- light_model_ctl1 |= (3 <<
+ light_model_ctl1 |= (RADEON_LM_SOURCE_VERTEX_DIFFUSE <<
+ RADEON_EMISSIVE_SOURCE_SHIFT);
+ }
+ else {
+ light_model_ctl1 |= (RADEON_LM_SOURCE_STATE_MULT <<
RADEON_EMISSIVE_SOURCE_SHIFT);
}
if (mask & MAT_BIT_FRONT_AMBIENT) {
- light_model_ctl1 |= (3 <<
+ light_model_ctl1 |= (RADEON_LM_SOURCE_VERTEX_DIFFUSE <<
+ RADEON_AMBIENT_SOURCE_SHIFT);
+ }
+ else {
+ light_model_ctl1 |= (RADEON_LM_SOURCE_STATE_MULT <<
RADEON_AMBIENT_SOURCE_SHIFT);
}
if (mask & MAT_BIT_FRONT_DIFFUSE) {
- light_model_ctl1 |= (3 <<
+ light_model_ctl1 |= (RADEON_LM_SOURCE_VERTEX_DIFFUSE <<
+ RADEON_DIFFUSE_SOURCE_SHIFT);
+ }
+ else {
+ light_model_ctl1 |= (RADEON_LM_SOURCE_STATE_MULT <<
RADEON_DIFFUSE_SOURCE_SHIFT);
}
if (mask & MAT_BIT_FRONT_SPECULAR) {
- light_model_ctl1 |= (3 <<
+ light_model_ctl1 |= (RADEON_LM_SOURCE_VERTEX_DIFFUSE <<
+ RADEON_SPECULAR_SOURCE_SHIFT);
+ }
+ else {
+ light_model_ctl1 |= (RADEON_LM_SOURCE_STATE_MULT <<
RADEON_SPECULAR_SOURCE_SHIFT);
}
+ }
+ else {
+ /* Default to MULT:
+ */
+ light_model_ctl1 |= (RADEON_LM_SOURCE_STATE_MULT << RADEON_EMISSIVE_SOURCE_SHIFT) |
+ (RADEON_LM_SOURCE_STATE_MULT << RADEON_AMBIENT_SOURCE_SHIFT) |
+ (RADEON_LM_SOURCE_STATE_MULT << RADEON_DIFFUSE_SOURCE_SHIFT) |
+ (RADEON_LM_SOURCE_STATE_MULT << RADEON_SPECULAR_SOURCE_SHIFT);
+ }
if (light_model_ctl1 != rmesa->hw.tcl.cmd[TCL_LIGHT_MODEL_CTL]) {
- GLuint p;
-
RADEON_STATECHANGE( rmesa, tcl );
rmesa->hw.tcl.cmd[TCL_LIGHT_MODEL_CTL] = light_model_ctl1;
-
- for (p = 0 ; p < MAX_LIGHTS; p++)
- update_light_colors( ctx, p );
- update_global_ambient( ctx );
- }
}
-
- check_twoside_fallback( ctx );
}
void radeonUpdateMaterial( GLcontext *ctx )
radeonContextPtr rmesa = RADEON_CONTEXT(ctx);
GLfloat (*mat)[4] = ctx->Light.Material.Attrib;
GLfloat *fcmd = (GLfloat *)RADEON_DB_STATE( mtl );
- GLuint p;
GLuint mask = ~0;
if (ctx->Light.ColorMaterialEnabled)
fcmd[MTL_SHININESS] = mat[MAT_ATTRIB_FRONT_SHININESS][0];
}
- if (RADEON_DB_STATECHANGE( rmesa, &rmesa->hw.mtl )) {
- for (p = 0 ; p < MAX_LIGHTS; p++)
- update_light_colors( ctx, p );
+ RADEON_DB_STATECHANGE( rmesa, &rmesa->hw.mtl );
- check_twoside_fallback( ctx );
- update_global_ambient( ctx );
- }
- else if (RADEON_DEBUG & (DEBUG_PRIMS|DEBUG_STATE))
- fprintf(stderr, "%s: Elided noop material call\n", __FUNCTION__);
+ check_twoside_fallback( ctx );
+/* update_global_ambient( ctx );*/
}
/* _NEW_LIGHT
case GL_CONSTANT_ATTENUATION:
RADEON_STATECHANGE(rmesa, lit[p]);
fcmd[LIT_ATTEN_CONST] = params[0];
+ if ( params[0] == 0.0 )
+ fcmd[LIT_ATTEN_CONST_INV] = FLT_MAX;
+ else
+ fcmd[LIT_ATTEN_CONST_INV] = 1.0 / params[0];
break;
case GL_LINEAR_ATTENUATION:
RADEON_STATECHANGE(rmesa, lit[p]);
/* Set RANGE_ATTEN only when needed */
switch (pname) {
case GL_POSITION:
+ case GL_CONSTANT_ATTENUATION:
case GL_LINEAR_ATTENUATION:
case GL_QUADRATIC_ATTENUATION:
{
- GLuint flag;
+ GLuint *icmd = (GLuint *)RADEON_DB_STATE( tcl );
GLuint idx = TCL_PER_LIGHT_CTL_0 + p/2;
+ GLuint atten_flag = ( p&1 ) ? RADEON_LIGHT_1_ENABLE_RANGE_ATTEN
+ : RADEON_LIGHT_0_ENABLE_RANGE_ATTEN;
+ GLuint atten_const_flag = ( p&1 ) ? RADEON_LIGHT_1_CONSTANT_RANGE_ATTEN
+ : RADEON_LIGHT_0_CONSTANT_RANGE_ATTEN;
+
+ if ( l->EyePosition[3] == 0.0F ||
+ ( ( fcmd[LIT_ATTEN_CONST] == 0.0 || fcmd[LIT_ATTEN_CONST] == 1.0 ) &&
+ fcmd[LIT_ATTEN_QUADRATIC] == 0.0 && fcmd[LIT_ATTEN_LINEAR] == 0.0 ) ) {
+ /* Disable attenuation */
+ icmd[idx] &= ~atten_flag;
+ } else {
+ if ( fcmd[LIT_ATTEN_QUADRATIC] == 0.0 && fcmd[LIT_ATTEN_LINEAR] == 0.0 ) {
+ /* Enable only constant portion of attenuation calculation */
+ icmd[idx] |= ( atten_flag | atten_const_flag );
+ } else {
+ /* Enable full attenuation calculation */
+ icmd[idx] &= ~atten_const_flag;
+ icmd[idx] |= atten_flag;
+ }
+ }
- if (p&1)
- flag = RADEON_LIGHT_1_ENABLE_RANGE_ATTEN;
- else
- flag = RADEON_LIGHT_0_ENABLE_RANGE_ATTEN;
-
- RADEON_STATECHANGE(rmesa, tcl);
- if (l->EyePosition[3] != 0.0F &&
- (l->LinearAttenuation != 0.0F || l->QuadraticAttenuation != 0.0F))
- rmesa->hw.tcl.cmd[idx] |= flag;
- else
- rmesa->hw.tcl.cmd[idx] &= ~flag;
+ RADEON_DB_STATECHANGE( rmesa, &rmesa->hw.tcl );
break;
}
default:
{
radeonContextPtr rmesa = RADEON_CONTEXT(ctx);
+ /* radeon 7200 have stencil bug, DEC and INC_WRAP will actually both do DEC_WRAP,
+ and DEC_WRAP (and INVERT) will do INVERT. No way to get correct INC_WRAP and DEC,
+ but DEC_WRAP can be fixed by using DEC and INC_WRAP at least use INC. */
+
+ GLuint tempRADEON_STENCIL_FAIL_DEC_WRAP;
+ GLuint tempRADEON_STENCIL_FAIL_INC_WRAP;
+ GLuint tempRADEON_STENCIL_ZFAIL_DEC_WRAP;
+ GLuint tempRADEON_STENCIL_ZFAIL_INC_WRAP;
+ GLuint tempRADEON_STENCIL_ZPASS_DEC_WRAP;
+ GLuint tempRADEON_STENCIL_ZPASS_INC_WRAP;
+
+ if (rmesa->radeonScreen->chipset & RADEON_CHIPSET_BROKEN_STENCIL) {
+ tempRADEON_STENCIL_FAIL_DEC_WRAP = RADEON_STENCIL_FAIL_DEC;
+ tempRADEON_STENCIL_FAIL_INC_WRAP = RADEON_STENCIL_FAIL_INC;
+ tempRADEON_STENCIL_ZFAIL_DEC_WRAP = RADEON_STENCIL_ZFAIL_DEC;
+ tempRADEON_STENCIL_ZFAIL_INC_WRAP = RADEON_STENCIL_ZFAIL_INC;
+ tempRADEON_STENCIL_ZPASS_DEC_WRAP = RADEON_STENCIL_ZPASS_DEC;
+ tempRADEON_STENCIL_ZPASS_INC_WRAP = RADEON_STENCIL_ZPASS_INC;
+ }
+ else {
+ tempRADEON_STENCIL_FAIL_DEC_WRAP = RADEON_STENCIL_FAIL_DEC_WRAP;
+ tempRADEON_STENCIL_FAIL_INC_WRAP = RADEON_STENCIL_FAIL_INC_WRAP;
+ tempRADEON_STENCIL_ZFAIL_DEC_WRAP = RADEON_STENCIL_ZFAIL_DEC_WRAP;
+ tempRADEON_STENCIL_ZFAIL_INC_WRAP = RADEON_STENCIL_ZFAIL_INC_WRAP;
+ tempRADEON_STENCIL_ZPASS_DEC_WRAP = RADEON_STENCIL_ZPASS_DEC_WRAP;
+ tempRADEON_STENCIL_ZPASS_INC_WRAP = RADEON_STENCIL_ZPASS_INC_WRAP;
+ }
+
RADEON_STATECHANGE( rmesa, ctx );
rmesa->hw.ctx.cmd[CTX_RB3D_ZSTENCILCNTL] &= ~(RADEON_STENCIL_FAIL_MASK |
RADEON_STENCIL_ZFAIL_MASK |
case GL_DECR:
rmesa->hw.ctx.cmd[CTX_RB3D_ZSTENCILCNTL] |= RADEON_STENCIL_FAIL_DEC;
break;
+ case GL_INCR_WRAP:
+ rmesa->hw.ctx.cmd[CTX_RB3D_ZSTENCILCNTL] |= tempRADEON_STENCIL_FAIL_INC_WRAP;
+ break;
+ case GL_DECR_WRAP:
+ rmesa->hw.ctx.cmd[CTX_RB3D_ZSTENCILCNTL] |= tempRADEON_STENCIL_FAIL_DEC_WRAP;
+ break;
case GL_INVERT:
rmesa->hw.ctx.cmd[CTX_RB3D_ZSTENCILCNTL] |= RADEON_STENCIL_FAIL_INVERT;
break;
case GL_DECR:
rmesa->hw.ctx.cmd[CTX_RB3D_ZSTENCILCNTL] |= RADEON_STENCIL_ZFAIL_DEC;
break;
+ case GL_INCR_WRAP:
+ rmesa->hw.ctx.cmd[CTX_RB3D_ZSTENCILCNTL] |= tempRADEON_STENCIL_ZFAIL_INC_WRAP;
+ break;
+ case GL_DECR_WRAP:
+ rmesa->hw.ctx.cmd[CTX_RB3D_ZSTENCILCNTL] |= tempRADEON_STENCIL_ZFAIL_DEC_WRAP;
+ break;
case GL_INVERT:
rmesa->hw.ctx.cmd[CTX_RB3D_ZSTENCILCNTL] |= RADEON_STENCIL_ZFAIL_INVERT;
break;
case GL_DECR:
rmesa->hw.ctx.cmd[CTX_RB3D_ZSTENCILCNTL] |= RADEON_STENCIL_ZPASS_DEC;
break;
+ case GL_INCR_WRAP:
+ rmesa->hw.ctx.cmd[CTX_RB3D_ZSTENCILCNTL] |= tempRADEON_STENCIL_ZPASS_INC_WRAP;
+ break;
+ case GL_DECR_WRAP:
+ rmesa->hw.ctx.cmd[CTX_RB3D_ZSTENCILCNTL] |= tempRADEON_STENCIL_ZPASS_DEC_WRAP;
+ break;
case GL_INVERT:
rmesa->hw.ctx.cmd[CTX_RB3D_ZSTENCILCNTL] |= RADEON_STENCIL_ZPASS_INVERT;
break;
static void radeonViewport( GLcontext *ctx, GLint x, GLint y,
GLsizei width, GLsizei height )
{
+ /* update size of Mesa/software ancillary buffers */
+ _mesa_ResizeBuffersMESA();
/* Don't pipeline viewport changes, conflict with window offset
* setting below. Could apply deltas to rescue pipelined viewport
* values, or keep the originals hanging around.
switch ( mode ) {
case GL_FRONT_LEFT:
rmesa->numClipRects = dPriv->numClipRects;
- rmesa->pClipRects = (XF86DRIClipRectPtr)dPriv->pClipRects;
+ rmesa->pClipRects = dPriv->pClipRects;
break;
case GL_BACK_LEFT:
/* Can't ignore 2d windows if we are page flipping.
*/
if ( dPriv->numBackClipRects == 0 || rmesa->doPageFlip ) {
rmesa->numClipRects = dPriv->numClipRects;
- rmesa->pClipRects = (XF86DRIClipRectPtr)dPriv->pClipRects;
+ rmesa->pClipRects = dPriv->pClipRects;
}
else {
rmesa->numClipRects = dPriv->numBackClipRects;
- rmesa->pClipRects = (XF86DRIClipRectPtr)dPriv->pBackClipRects;
+ rmesa->pClipRects = dPriv->pBackClipRects;
}
break;
default:
/*
* _DrawDestMask is easier to cope with than <mode>.
*/
- switch ( ctx->Color._DrawDestMask ) {
- case FRONT_LEFT_BIT:
+ switch ( ctx->Color._DrawDestMask[0] ) {
+ case DD_FRONT_LEFT_BIT:
FALLBACK( rmesa, RADEON_FALLBACK_DRAW_BUFFER, GL_FALSE );
radeonSetCliprects( rmesa, GL_FRONT_LEFT );
break;
- case BACK_LEFT_BIT:
+ case DD_BACK_LEFT_BIT:
FALLBACK( rmesa, RADEON_FALLBACK_DRAW_BUFFER, GL_FALSE );
radeonSetCliprects( rmesa, GL_BACK_LEFT );
break;
_swrast_DrawBuffer(ctx, mode);
RADEON_STATECHANGE( rmesa, ctx );
- rmesa->hw.ctx.cmd[CTX_RB3D_COLOROFFSET] = (rmesa->state.color.drawOffset &
- RADEON_COLOROFFSET_MASK);
+ rmesa->hw.ctx.cmd[CTX_RB3D_COLOROFFSET] = ((rmesa->state.color.drawOffset +
+ rmesa->radeonScreen->fbLocation)
+ & RADEON_COLOROFFSET_MASK);
rmesa->hw.ctx.cmd[CTX_RB3D_COLORPITCH] = rmesa->state.color.drawPitch;
}
} else {
rmesa->hw.ctx.cmd[CTX_RB3D_CNTL] &= ~RADEON_ALPHA_BLEND_ENABLE;
}
- if ( ctx->Color.ColorLogicOpEnabled ) {
+ if ( ctx->Color._LogicOpEnabled ) {
rmesa->hw.ctx.cmd[CTX_RB3D_CNTL] |= RADEON_ROP_ENABLE;
} else {
rmesa->hw.ctx.cmd[CTX_RB3D_CNTL] &= ~RADEON_ROP_ENABLE;
/* Catch a possible fallback:
*/
if (state) {
- ctx->Driver.BlendEquation( ctx, ctx->Color.BlendEquation );
- ctx->Driver.BlendFunc( ctx, ctx->Color.BlendSrcRGB,
- ctx->Color.BlendDstRGB );
+ ctx->Driver.BlendEquationSeparate( ctx,
+ ctx->Color.BlendEquationRGB,
+ ctx->Color.BlendEquationA );
+ ctx->Driver.BlendFuncSeparate( ctx, ctx->Color.BlendSrcRGB,
+ ctx->Color.BlendDstRGB,
+ ctx->Color.BlendSrcA,
+ ctx->Color.BlendDstA );
}
else {
FALLBACK( rmesa, RADEON_FALLBACK_BLEND_FUNC, GL_FALSE );
case GL_COLOR_MATERIAL:
radeonColorMaterial( ctx, 0, 0 );
- if (!state)
- radeonUpdateMaterial( ctx );
+ radeonUpdateMaterial( ctx );
break;
case GL_CULL_FACE:
RADEON_STATECHANGE(rmesa, ctx );
if ( state ) {
rmesa->hw.ctx.cmd[CTX_RB3D_CNTL] |= RADEON_DITHER_ENABLE;
+ rmesa->hw.ctx.cmd[CTX_RB3D_CNTL] &= ~rmesa->state.color.roundEnable;
} else {
rmesa->hw.ctx.cmd[CTX_RB3D_CNTL] &= ~RADEON_DITHER_ENABLE;
+ rmesa->hw.ctx.cmd[CTX_RB3D_CNTL] |= rmesa->state.color.roundEnable;
}
break;
case GL_COLOR_LOGIC_OP:
RADEON_STATECHANGE( rmesa, ctx );
- if ( state ) {
+ if ( ctx->Color._LogicOpEnabled ) {
rmesa->hw.ctx.cmd[CTX_RB3D_CNTL] |= RADEON_ROP_ENABLE;
} else {
rmesa->hw.ctx.cmd[CTX_RB3D_CNTL] &= ~RADEON_ROP_ENABLE;
static void radeonWrapRunPipeline( GLcontext *ctx )
{
radeonContextPtr rmesa = RADEON_CONTEXT(ctx);
- TNLcontext *tnl = TNL_CONTEXT(ctx);
GLboolean has_material;
if (0)
if (has_material) {
TCL_FALLBACK( ctx, RADEON_TCL_FALLBACK_MATERIAL, GL_FALSE );
- radeonUpdateMaterial( ctx ); /* not needed any more? */
}
}
ctx->Driver.ReadBuffer = radeonReadBuffer;
ctx->Driver.AlphaFunc = radeonAlphaFunc;
- ctx->Driver.BlendEquation = radeonBlendEquation;
- ctx->Driver.BlendFunc = radeonBlendFunc;
+ ctx->Driver.BlendEquationSeparate = radeonBlendEquationSeparate;
ctx->Driver.BlendFuncSeparate = radeonBlendFuncSeparate;
ctx->Driver.ClearColor = radeonClearColor;
ctx->Driver.ClearDepth = radeonClearDepth;