i965/vec4: Assert that ATTR regions are register-aligned.

[mesa.git] / src / mesa / drivers / dri / radeon / radeon_state.c

diff --git a/src/mesa/drivers/dri/radeon/radeon_state.c b/src/mesa/drivers/dri/radeon/radeon_state.c
index cba3d9c9689f680008881960cd4efab44ebdfc12..c6b1f38dd0204e6ca3e4760d5b379b7801eec01d 100644 (file)
--- a/src/mesa/drivers/dri/radeon/radeon_state.c
+++ b/src/mesa/drivers/dri/radeon/radeon_state.c
@@ -51,6 +51,7 @@ WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
 #include "tnl/t_pipeline.h"
 #include "swrast_setup/swrast_setup.h"
 #include "drivers/common/meta.h"
+#include "util/bitscan.h"
 
 #include "radeon_context.h"
 #include "radeon_mipmap_tree.h"
@@ -892,27 +893,26 @@ static void update_light( struct gl_context *ctx )
 
 
    if (ctx->Light.Enabled) {
-      GLint p;
-      for (p = 0 ; p < MAX_LIGHTS; p++) {
-        if (ctx->Light.Light[p].Enabled) {
-           struct gl_light *l = &ctx->Light.Light[p];
-           GLfloat *fcmd = (GLfloat *)RADEON_DB_STATE( lit[p] );
-
-           if (l->EyePosition[3] == 0.0) {
-              COPY_3FV( &fcmd[LIT_POSITION_X], l->_VP_inf_norm );
-              COPY_3FV( &fcmd[LIT_DIRECTION_X], l->_h_inf_norm );
-              fcmd[LIT_POSITION_W] = 0;
-              fcmd[LIT_DIRECTION_W] = 0;
-           } else {
-              COPY_4V( &fcmd[LIT_POSITION_X], l->_Position );
-              fcmd[LIT_DIRECTION_X] = -l->_NormSpotDirection[0];
-              fcmd[LIT_DIRECTION_Y] = -l->_NormSpotDirection[1];
-              fcmd[LIT_DIRECTION_Z] = -l->_NormSpotDirection[2];
-              fcmd[LIT_DIRECTION_W] = 0;
-           }
-
-           RADEON_DB_STATECHANGE( rmesa, &rmesa->hw.lit[p] );
-        }
+      GLbitfield mask = ctx->Light._EnabledLights;
+      while (mask) {
+         const int p = u_bit_scan(&mask);
+         struct gl_light *l = &ctx->Light.Light[p];
+         GLfloat *fcmd = (GLfloat *)RADEON_DB_STATE( lit[p] );
+
+         if (l->EyePosition[3] == 0.0) {
+            COPY_3FV( &fcmd[LIT_POSITION_X], l->_VP_inf_norm );
+            COPY_3FV( &fcmd[LIT_DIRECTION_X], l->_h_inf_norm );
+            fcmd[LIT_POSITION_W] = 0;
+            fcmd[LIT_DIRECTION_W] = 0;
+         } else {
+            COPY_4V( &fcmd[LIT_POSITION_X], l->_Position );
+            fcmd[LIT_DIRECTION_X] = -l->_NormSpotDirection[0];
+            fcmd[LIT_DIRECTION_Y] = -l->_NormSpotDirection[1];
+            fcmd[LIT_DIRECTION_Z] = -l->_NormSpotDirection[2];
+            fcmd[LIT_DIRECTION_W] = 0;
+         }
+
+         RADEON_DB_STATECHANGE( rmesa, &rmesa->hw.lit[p] );
       }
    }
 }
@@ -1134,18 +1134,17 @@ static void radeonClipPlane( struct gl_context *ctx, GLenum plane, const GLfloat
 static void radeonUpdateClipPlanes( struct gl_context *ctx )
 {
    r100ContextPtr rmesa = R100_CONTEXT(ctx);
-   GLuint p;
+   GLbitfield mask = ctx->Transform.ClipPlanesEnabled;
 
-   for (p = 0; p < ctx->Const.MaxClipPlanes; p++) {
-      if (ctx->Transform.ClipPlanesEnabled & (1 << p)) {
-        GLint *ip = (GLint *)ctx->Transform._ClipUserPlane[p];
+   while (mask) {
+      const int p = u_bit_scan(&mask);
+      GLint *ip = (GLint *)ctx->Transform._ClipUserPlane[p];
 
-        RADEON_STATECHANGE( rmesa, ucp[p] );
-        rmesa->hw.ucp[p].cmd[UCP_X] = ip[0];
-        rmesa->hw.ucp[p].cmd[UCP_Y] = ip[1];
-        rmesa->hw.ucp[p].cmd[UCP_Z] = ip[2];
-        rmesa->hw.ucp[p].cmd[UCP_W] = ip[3];
-      }
+      RADEON_STATECHANGE( rmesa, ucp[p] );
+      rmesa->hw.ucp[p].cmd[UCP_X] = ip[0];
+      rmesa->hw.ucp[p].cmd[UCP_Y] = ip[1];
+      rmesa->hw.ucp[p].cmd[UCP_Z] = ip[2];
+      rmesa->hw.ucp[p].cmd[UCP_W] = ip[3];
    }
 }
 
@@ -1354,7 +1353,7 @@ void radeonUpdateWindow( struct gl_context *ctx )
    GLfloat xoffset = 0.0;
    GLfloat yoffset = dPriv ? (GLfloat) dPriv->h : 0;
    const GLboolean render_to_fbo = (ctx->DrawBuffer ? _mesa_is_user_fbo(ctx->DrawBuffer) : 0);
-   double scale[3], translate[3];
+   float scale[3], translate[3];
    GLfloat y_scale, y_bias;
 
    if (render_to_fbo) {
@@ -1452,7 +1451,7 @@ static void radeonEnable( struct gl_context *ctx, GLenum cap, GLboolean state )
 
    if ( RADEON_DEBUG & RADEON_STATE )
       fprintf( stderr, "%s( %s = %s )\n", __func__,
-              _mesa_lookup_enum_by_nr( cap ),
+              _mesa_enum_to_string( cap ),
               state ? "GL_TRUE" : "GL_FALSE" );
 
    switch ( cap ) {
@@ -2148,7 +2147,6 @@ void radeonInitStateFuncs( struct gl_context *ctx )
    ctx->Driver.Enable                  = radeonEnable;
    ctx->Driver.Fogfv                   = radeonFogfv;
    ctx->Driver.FrontFace               = radeonFrontFace;
-   ctx->Driver.Hint                    = NULL;
    ctx->Driver.LightModelfv            = radeonLightModelfv;
    ctx->Driver.Lightfv                 = radeonLightfv;
    ctx->Driver.LineStipple              = radeonLineStipple;