mesa: add bool param to _mesa_free_context_data
[mesa.git] / src / mesa / drivers / dri / radeon / radeon_swtcl.c
index 8a1fbab39f8d8e1f34762cffa024bcc9b4719231..f1e55e0b68e10633cc48ae97c60f89911c63d085 100644 (file)
@@ -34,11 +34,9 @@ WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
 
 #include "main/glheader.h"
 #include "main/mtypes.h"
-#include "main/colormac.h"
 #include "main/enums.h"
-#include "main/imports.h"
 #include "main/macros.h"
-#include "util/simple_list.h"
+#include "main/state.h"
 
 #include "math/m_xform.h"
 
@@ -61,7 +59,7 @@ WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
 #define RADEON_MAX_TNL_VERTEX_SIZE (15 * sizeof(GLfloat))      /* for mesa _tnl stage */
 
 /***********************************************************************
- *                         Initialization 
+ *                         Initialization
  ***********************************************************************/
 
 #define EMIT_ATTR( ATTR, STYLE, F0 )                                   \
@@ -114,19 +112,19 @@ static void radeonSetVertexFormat( struct gl_context *ctx )
    if ( !rmesa->swtcl.needproj ||
         (index_bitset & BITFIELD64_RANGE(_TNL_ATTRIB_TEX0, _TNL_NUM_TEX))) {
       /* for projtex */
-      EMIT_ATTR( _TNL_ATTRIB_POS, EMIT_4F, 
+      EMIT_ATTR( _TNL_ATTRIB_POS, EMIT_4F,
                 RADEON_CP_VC_FRMT_XY | RADEON_CP_VC_FRMT_Z | RADEON_CP_VC_FRMT_W0 );
       offset = 4;
    }
    else {
-      EMIT_ATTR( _TNL_ATTRIB_POS, EMIT_3F, 
+      EMIT_ATTR( _TNL_ATTRIB_POS, EMIT_3F,
                 RADEON_CP_VC_FRMT_XY | RADEON_CP_VC_FRMT_Z );
       offset = 3;
    }
 
    rmesa->swtcl.coloroffset = offset;
-#if MESA_LITTLE_ENDIAN 
-   EMIT_ATTR( _TNL_ATTRIB_COLOR0, EMIT_4UB_4F_RGBA, 
+#if MESA_LITTLE_ENDIAN
+   EMIT_ATTR( _TNL_ATTRIB_COLOR0, EMIT_4UB_4F_RGBA,
              RADEON_CP_VC_FRMT_PKCOLOR );
 #else
    EMIT_ATTR( _TNL_ATTRIB_COLOR0, EMIT_4UB_4F_ABGR,
@@ -138,7 +136,7 @@ static void radeonSetVertexFormat( struct gl_context *ctx )
    if (index_bitset &
        (BITFIELD64_BIT(_TNL_ATTRIB_COLOR1) | BITFIELD64_BIT(_TNL_ATTRIB_FOG))) {
 
-#if MESA_LITTLE_ENDIAN 
+#if MESA_LITTLE_ENDIAN
       if (index_bitset & BITFIELD64_BIT(_TNL_ATTRIB_COLOR1)) {
         rmesa->swtcl.specoffset = offset;
         EMIT_ATTR( _TNL_ATTRIB_COLOR1, EMIT_3UB_3F_RGB,
@@ -210,7 +208,7 @@ static void radeonSetVertexFormat( struct gl_context *ctx )
               break;
            default:
               continue;
-           };
+           }
         }
       }
    }
@@ -221,7 +219,7 @@ static void radeonSetVertexFormat( struct gl_context *ctx )
       rmesa->swtcl.vertex_format = fmt_0;
       rmesa->radeon.swtcl.vertex_size =
          _tnl_install_attrs( ctx,
-                             rmesa->radeon.swtcl.vertex_attrs, 
+                             rmesa->radeon.swtcl.vertex_attrs,
                              rmesa->radeon.swtcl.vertex_attr_count,
                              NULL, 0 );
       rmesa->radeon.swtcl.vertex_size /= 4;
@@ -278,7 +276,7 @@ void radeonChooseVertexState( struct gl_context *ctx )
    GLboolean unfilled = (ctx->Polygon.FrontMode != GL_FILL ||
                          ctx->Polygon.BackMode != GL_FILL);
    GLboolean twosided = ctx->Light.Enabled && ctx->Light.Model.TwoSide;
-   
+
    se_coord_fmt &= ~(RADEON_VTX_XY_PRE_MULT_1_OVER_W0 |
                     RADEON_VTX_Z_PRE_MULT_1_OVER_W0 |
                     RADEON_VTX_W0_IS_NOT_1_OVER_W0);
@@ -294,7 +292,7 @@ void radeonChooseVertexState( struct gl_context *ctx )
     * bigger one.
     */
 
-   if ((0 == (tnl->render_inputs_bitset & 
+   if ((0 == (tnl->render_inputs_bitset &
         (BITFIELD64_RANGE(_TNL_ATTRIB_TEX0, _TNL_NUM_TEX)
          | BITFIELD64_BIT(_TNL_ATTRIB_COLOR1))))
        || twosided
@@ -328,7 +326,7 @@ void r100_swtcl_flush(struct gl_context *ctx, uint32_t current_offset)
                        rmesa->radeon.swtcl.bo,
                        current_offset);
 
-                     
+
    radeonEmitVbufPrim( rmesa,
                       rmesa->swtcl.vertex_format,
                       rmesa->radeon.swtcl.hw_primitive,
@@ -353,25 +351,22 @@ void r100_swtcl_flush(struct gl_context *ctx, uint32_t current_offset)
 #define HAVE_LINE_STRIPS 1
 #define HAVE_TRIANGLES   1
 #define HAVE_TRI_STRIPS  1
-#define HAVE_TRI_STRIP_1 0
 #define HAVE_TRI_FANS    1
-#define HAVE_QUADS       0
-#define HAVE_QUAD_STRIPS 0
 #define HAVE_POLYGONS    0
 /* \todo: is it possible to make "ELTS" work with t_vertex code ? */
 #define HAVE_ELTS        0
 
 static const GLuint hw_prim[GL_POLYGON+1] = {
-   RADEON_CP_VC_CNTL_PRIM_TYPE_POINT,
-   RADEON_CP_VC_CNTL_PRIM_TYPE_LINE,
-   0,
-   RADEON_CP_VC_CNTL_PRIM_TYPE_LINE_STRIP,
-   RADEON_CP_VC_CNTL_PRIM_TYPE_TRI_LIST,
-   RADEON_CP_VC_CNTL_PRIM_TYPE_TRI_STRIP,
-   RADEON_CP_VC_CNTL_PRIM_TYPE_TRI_FAN,
-   0,
-   0,
-   0
+   [GL_POINTS] = RADEON_CP_VC_CNTL_PRIM_TYPE_POINT,
+   [GL_LINES] = RADEON_CP_VC_CNTL_PRIM_TYPE_LINE,
+   [GL_LINE_LOOP] = 0,
+   [GL_LINE_STRIP] = RADEON_CP_VC_CNTL_PRIM_TYPE_LINE_STRIP,
+   [GL_TRIANGLES] = RADEON_CP_VC_CNTL_PRIM_TYPE_TRI_LIST,
+   [GL_TRIANGLE_STRIP] = RADEON_CP_VC_CNTL_PRIM_TYPE_TRI_STRIP,
+   [GL_TRIANGLE_FAN] = RADEON_CP_VC_CNTL_PRIM_TYPE_TRI_FAN,
+   [GL_QUADS] = 0,
+   [GL_QUAD_STRIP] = 0,
+   [GL_POLYGON] = 0
 };
 
 static inline void
@@ -418,12 +413,12 @@ static GLboolean radeon_run_render( struct gl_context *ctx,
    r100ContextPtr rmesa = R100_CONTEXT(ctx);
    TNLcontext *tnl = TNL_CONTEXT(ctx);
    struct vertex_buffer *VB = &tnl->vb;
-   tnl_render_func *tab = TAG(render_tab_verts);
+   const tnl_render_func *tab = TAG(render_tab_verts);
    GLuint i;
 
-   if (rmesa->radeon.swtcl.RenderIndex != 0 ||   
+   if (rmesa->radeon.swtcl.RenderIndex != 0 ||
        !radeon_dma_validate_render( ctx, VB ))
-      return GL_TRUE;          
+      return GL_TRUE;
 
    radeon_prepare_render(&rmesa->radeon);
    if (rmesa->radeon.NewGLState)
@@ -442,11 +437,11 @@ static GLboolean radeon_run_render( struct gl_context *ctx,
 
       radeon_print(RADEON_SWRENDER, RADEON_NORMAL,
          "radeon_render.c: prim %s %d..%d\n",
-                _mesa_lookup_enum_by_nr(prim & PRIM_MODE_MASK), 
+                _mesa_enum_to_string(prim & PRIM_MODE_MASK),
                 start, start+length);
 
       if (length)
-        tab[prim & PRIM_MODE_MASK]( ctx, start, start + length, prim );
+         tab[prim & PRIM_MODE_MASK](ctx, start, length, prim);
    }
 
    tnl->Driver.Render.Finish( ctx );
@@ -471,16 +466,16 @@ const struct tnl_pipeline_stage _radeon_render_stage =
 
 
 static const GLuint reduced_hw_prim[GL_POLYGON+1] = {
-   RADEON_CP_VC_CNTL_PRIM_TYPE_POINT,
-   RADEON_CP_VC_CNTL_PRIM_TYPE_LINE,
-   RADEON_CP_VC_CNTL_PRIM_TYPE_LINE,
-   RADEON_CP_VC_CNTL_PRIM_TYPE_LINE,
-   RADEON_CP_VC_CNTL_PRIM_TYPE_TRI_LIST,
-   RADEON_CP_VC_CNTL_PRIM_TYPE_TRI_LIST,
-   RADEON_CP_VC_CNTL_PRIM_TYPE_TRI_LIST,
-   RADEON_CP_VC_CNTL_PRIM_TYPE_TRI_LIST,
-   RADEON_CP_VC_CNTL_PRIM_TYPE_TRI_LIST,
-   RADEON_CP_VC_CNTL_PRIM_TYPE_TRI_LIST
+   [GL_POINTS] = RADEON_CP_VC_CNTL_PRIM_TYPE_POINT,
+   [GL_LINES] = RADEON_CP_VC_CNTL_PRIM_TYPE_LINE,
+   [GL_LINE_LOOP] = RADEON_CP_VC_CNTL_PRIM_TYPE_LINE,
+   [GL_LINE_STRIP] = RADEON_CP_VC_CNTL_PRIM_TYPE_LINE,
+   [GL_TRIANGLES] = RADEON_CP_VC_CNTL_PRIM_TYPE_TRI_LIST,
+   [GL_TRIANGLE_STRIP] = RADEON_CP_VC_CNTL_PRIM_TYPE_TRI_LIST,
+   [GL_TRIANGLE_FAN] = RADEON_CP_VC_CNTL_PRIM_TYPE_TRI_LIST,
+   [GL_QUADS] = RADEON_CP_VC_CNTL_PRIM_TYPE_TRI_LIST,
+   [GL_QUAD_STRIP] = RADEON_CP_VC_CNTL_PRIM_TYPE_TRI_LIST,
+   [GL_POLYGON] = RADEON_CP_VC_CNTL_PRIM_TYPE_TRI_LIST
 };
 
 static void radeonRasterPrimitive( struct gl_context *ctx, GLuint hwprim );
@@ -502,7 +497,7 @@ static void radeonResetLineStipple( struct gl_context *ctx );
    r100ContextPtr rmesa = R100_CONTEXT(ctx);           \
    const char *radeonverts = (char *)rmesa->radeon.swtcl.verts;
 #define VERT(x) (radeonVertex *)(radeonverts + ((x) * (vertsize) * sizeof(int)))
-#define VERTEX radeonVertex 
+#define VERTEX radeonVertex
 #undef TAG
 #define TAG(x) radeon_##x
 #include "tnl_dd/t_dd_triemit.h"
@@ -703,7 +698,7 @@ void radeonChooseRenderState( struct gl_context *ctx )
                          ctx->Polygon.BackMode != GL_FILL);
    GLboolean twosided = ctx->Light.Enabled && ctx->Light.Model.TwoSide;
 
-   if (!rmesa->radeon.TclFallback || rmesa->radeon.Fallback) 
+   if (!rmesa->radeon.TclFallback || rmesa->radeon.Fallback)
       return;
 
    if (twosided)
@@ -755,7 +750,7 @@ static void radeonRenderPrimitive( struct gl_context *ctx, GLenum prim )
                          ctx->Polygon.BackMode != GL_FILL);
 
    rmesa->radeon.swtcl.render_primitive = prim;
-   if (prim < GL_TRIANGLES || !unfilled) 
+   if (prim < GL_TRIANGLES || !unfilled)
       radeonRasterPrimitive( ctx, reduced_hw_prim[prim] );
 }
 
@@ -874,9 +869,9 @@ void radeonInitSwtcl( struct gl_context *ctx )
    tnl->Driver.Render.CopyPV = _tnl_copy_pv;
    tnl->Driver.Render.Interp = _tnl_interp;
 
-   _tnl_init_vertices( ctx, ctx->Const.MaxArrayLockSize + 12, 
+   _tnl_init_vertices( ctx, ctx->Const.MaxArrayLockSize + 12,
                       RADEON_MAX_TNL_VERTEX_SIZE);
-   
+
    rmesa->radeon.swtcl.verts = (GLubyte *)tnl->clipspace.vertex_buf;
    rmesa->radeon.swtcl.RenderIndex = ~0;
    rmesa->radeon.swtcl.render_primitive = GL_TRIANGLES;