/**************************************************************************
Copyright 2000, 2001 ATI Technologies Inc., Ontario, Canada, and
- Tungsten Graphics Inc., Austin, Texas.
+ VMware, Inc.
All Rights Reserved.
/*
* Authors:
- * Keith Whitwell <keith@tungstengraphics.com>
+ * Keith Whitwell <keithw@vmware.com>
*/
#include "main/glheader.h"
#include "main/imports.h"
-#include "main/light.h"
#include "main/mtypes.h"
+#include "main/light.h"
#include "main/enums.h"
+#include "main/state.h"
#include "vbo/vbo.h"
#include "tnl/tnl.h"
static GLushort *radeonAllocElts( r100ContextPtr rmesa, GLuint nr )
{
if (rmesa->radeon.dma.flush)
- rmesa->radeon.dma.flush( rmesa->radeon.glCtx );
+ rmesa->radeon.dma.flush( &rmesa->radeon.glCtx );
radeonEmitAOS( rmesa,
rmesa->radeon.tcl.aos_count, 0 );
* discrete and there are no intervening state changes. (Somewhat
* duplicates changes to DrawArrays code)
*/
-static void radeonEmitPrim( GLcontext *ctx,
+static void radeonEmitPrim( struct gl_context *ctx,
GLenum prim,
GLuint hwprim,
GLuint start,
#ifdef MESA_BIG_ENDIAN
/* We could do without (most of) this ugliness if dest was always 32 bit word aligned... */
#define EMIT_ELT(dest, offset, x) do { \
- int off = offset + ( ( (GLuint)dest & 0x2 ) >> 1 ); \
- GLushort *des = (GLushort *)( (GLuint)dest & ~0x2 ); \
+ int off = offset + ( ( (uintptr_t)dest & 0x2 ) >> 1 ); \
+ GLushort *des = (GLushort *)( (uintptr_t)dest & ~0x2 ); \
(des)[ off + 1 - 2 * ( off & 1 ) ] = (GLushort)(x); \
(void)rmesa; } while (0)
#else
/* External entrypoints */
/**********************************************************************/
-void radeonEmitPrimitive( GLcontext *ctx,
+void radeonEmitPrimitive( struct gl_context *ctx,
GLuint first,
GLuint last,
GLuint flags )
tcl_render_tab_verts[flags&PRIM_MODE_MASK]( ctx, first, last, flags );
}
-void radeonEmitEltPrimitive( GLcontext *ctx,
+void radeonEmitEltPrimitive( struct gl_context *ctx,
GLuint first,
GLuint last,
GLuint flags )
tcl_render_tab_elts[flags&PRIM_MODE_MASK]( ctx, first, last, flags );
}
-void radeonTclPrimitive( GLcontext *ctx,
+void radeonTclPrimitive( struct gl_context *ctx,
GLenum prim,
int hw_prim )
{
GLuint se_cntl;
GLuint newprim = hw_prim | RADEON_CP_VC_CNTL_TCL_ENABLE;
+ radeon_prepare_render(&rmesa->radeon);
+ if (rmesa->radeon.NewGLState)
+ radeonValidateState( ctx );
+
if (newprim != rmesa->tcl.hw_primitive ||
!discrete_prim[hw_prim&0xf]) {
RADEON_NEWPRIM( rmesa );
se_cntl = rmesa->hw.set.cmd[SET_SE_CNTL];
se_cntl &= ~RADEON_FLAT_SHADE_VTX_LAST;
- if (prim == GL_POLYGON && (ctx->_TriangleCaps & DD_FLATSHADE))
+ if (prim == GL_POLYGON && ctx->Light.ShadeModel == GL_FLAT)
se_cntl |= RADEON_FLAT_SHADE_VTX_0;
else
se_cntl |= RADEON_FLAT_SHADE_VTX_LAST;
}
}
-/**********************************************************************/
-/* Fog blend factor computation for hw tcl */
-/* same calculation used as in t_vb_fog.c */
-/**********************************************************************/
-
-#define FOG_EXP_TABLE_SIZE 256
-#define FOG_MAX (10.0)
-#define EXP_FOG_MAX .0006595
-#define FOG_INCR (FOG_MAX/FOG_EXP_TABLE_SIZE)
-static GLfloat exp_table[FOG_EXP_TABLE_SIZE];
-
-#if 1
-#define NEG_EXP( result, narg ) \
-do { \
- GLfloat f = (GLfloat) (narg * (1.0/FOG_INCR)); \
- GLint k = (GLint) f; \
- if (k > FOG_EXP_TABLE_SIZE-2) \
- result = (GLfloat) EXP_FOG_MAX; \
- else \
- result = exp_table[k] + (f-k)*(exp_table[k+1]-exp_table[k]); \
-} while (0)
-#else
-#define NEG_EXP( result, narg ) \
-do { \
- result = exp(-narg); \
-} while (0)
-#endif
-
-
-/**
- * Initialize the exp_table[] lookup table for approximating exp().
- */
-void
-radeonInitStaticFogData( void )
-{
- GLfloat f = 0.0F;
- GLint i = 0;
- for ( ; i < FOG_EXP_TABLE_SIZE ; i++, f += FOG_INCR) {
- exp_table[i] = (GLfloat) exp(-f);
- }
-}
-
-
-/**
- * Compute per-vertex fog blend factors from fog coordinates by
- * evaluating the GL_LINEAR, GL_EXP or GL_EXP2 fog function.
- * Fog coordinates are distances from the eye (typically between the
- * near and far clip plane distances).
- * Note the fog (eye Z) coords may be negative so we use ABS(z) below.
- * Fog blend factors are in the range [0,1].
- */
-float
-radeonComputeFogBlendFactor( GLcontext *ctx, GLfloat fogcoord )
-{
- GLfloat end = ctx->Fog.End;
- GLfloat d, temp;
- const GLfloat z = FABSF(fogcoord);
-
- switch (ctx->Fog.Mode) {
- case GL_LINEAR:
- if (ctx->Fog.Start == ctx->Fog.End)
- d = 1.0F;
- else
- d = 1.0F / (ctx->Fog.End - ctx->Fog.Start);
- temp = (end - z) * d;
- return CLAMP(temp, 0.0F, 1.0F);
- break;
- case GL_EXP:
- d = ctx->Fog.Density;
- NEG_EXP( temp, d * z );
- return temp;
- break;
- case GL_EXP2:
- d = ctx->Fog.Density*ctx->Fog.Density;
- NEG_EXP( temp, d * z * z );
- return temp;
- break;
- default:
- _mesa_problem(ctx, "Bad fog mode in make_fog_coord");
- return 0;
- }
-}
-
/**
* Predict total emit size for next rendering operation so there is no flush in middle of rendering
* Prediction has to aim towards the best possible value that is worse than worst case scenario
*/
-static GLuint radeonEnsureEmitSize( GLcontext * ctx , GLuint inputs )
+static GLuint radeonEnsureEmitSize( struct gl_context * ctx , GLuint inputs )
{
r100ContextPtr rmesa = R100_CONTEXT(ctx);
TNLcontext *tnl = TNL_CONTEXT(ctx);
state_size = radeonCountStateEmitSize( &rmesa->radeon );
/* tcl may be changed in radeonEmitArrays so account for it if not dirty */
if (!rmesa->hw.tcl.dirty)
- state_size += rmesa->hw.tcl.check( rmesa->radeon.glCtx, &rmesa->hw.tcl );
+ state_size += rmesa->hw.tcl.check( &rmesa->radeon.glCtx, &rmesa->hw.tcl );
/* predict size for elements */
for (i = 0; i < VB->PrimitiveCount; ++i)
{
- if (!VB->Primitive[i].count)
- continue;
/* If primitive.count is less than MAX_CONVERSION_SIZE
rendering code may decide convert to elts.
In that case we have to make pessimistic prediction.
const GLuint elts = ELTS_BUFSZ(nr_aos);
const GLuint index = INDEX_BUFSZ;
const GLuint vbuf = VBUF_BUFSZ;
+ if (!VB->Primitive[i].count)
+ continue;
if ( (!VB->Elts && VB->Primitive[i].count >= MAX_CONVERSION_SIZE)
|| vbuf > index + elts)
space_required += vbuf;
space_required += SCISSOR_BUFSZ;
}
/* flush the buffer in case we need more than is left. */
- if (rcommonEnsureCmdBufSpace(&rmesa->radeon, space_required, __FUNCTION__))
+ if (rcommonEnsureCmdBufSpace(&rmesa->radeon, space_required, __func__))
return space_required + radeonCountStateEmitSize( &rmesa->radeon );
else
return space_required + state_size;
/* TCL render.
*/
-static GLboolean radeon_run_tcl_render( GLcontext *ctx,
+static GLboolean radeon_run_tcl_render( struct gl_context *ctx,
struct tnl_pipeline_stage *stage )
{
r100ContextPtr rmesa = R100_CONTEXT(ctx);
struct vertex_buffer *VB = &tnl->vb;
GLuint inputs = VERT_BIT_POS | VERT_BIT_COLOR0;
GLuint i;
+ GLuint emit_end;
/* TODO: separate this from the swtnl pipeline
*/
inputs |= VERT_BIT_NORMAL;
}
- if (ctx->_TriangleCaps & DD_SEPARATE_SPECULAR) {
+ if (_mesa_need_secondary_color(ctx)) {
inputs |= VERT_BIT_COLOR1;
}
}
for (i = 0 ; i < ctx->Const.MaxTextureUnits; i++) {
- if (ctx->Texture.Unit[i]._ReallyEnabled) {
+ if (ctx->Texture.Unit[i]._Current) {
/* TODO: probably should not emit texture coords when texgen is enabled */
if (rmesa->TexGenNeedNormals[i]) {
inputs |= VERT_BIT_NORMAL;
}
radeonReleaseArrays( ctx, ~0 );
- GLuint emit_end = radeonEnsureEmitSize( ctx, inputs )
+ emit_end = radeonEnsureEmitSize( ctx, inputs )
+ rmesa->radeon.cmdbuf.cs->cdw;
radeonEmitArrays( ctx, inputs );
*/
-static void transition_to_swtnl( GLcontext *ctx )
+static void transition_to_swtnl( struct gl_context *ctx )
{
r100ContextPtr rmesa = R100_CONTEXT(ctx);
TNLcontext *tnl = TNL_CONTEXT(ctx);
radeonChooseVertexState( ctx );
radeonChooseRenderState( ctx );
- _mesa_validate_all_lighting_tables( ctx );
+ _tnl_validate_shine_tables( ctx );
tnl->Driver.NotifyMaterialChange =
- _mesa_validate_all_lighting_tables;
+ _tnl_validate_shine_tables;
radeonReleaseArrays( ctx, ~0 );
}
-static void transition_to_hwtnl( GLcontext *ctx )
+static void transition_to_hwtnl( struct gl_context *ctx )
{
r100ContextPtr rmesa = R100_CONTEXT(ctx);
TNLcontext *tnl = TNL_CONTEXT(ctx);
tnl->Driver.NotifyMaterialChange = radeonUpdateMaterial;
if ( rmesa->radeon.dma.flush )
- rmesa->radeon.dma.flush( rmesa->radeon.glCtx );
+ rmesa->radeon.dma.flush( &rmesa->radeon.glCtx );
rmesa->radeon.dma.flush = NULL;
rmesa->swtcl.vertex_format = 0;
// if (rmesa->swtcl.indexed_verts.buf)
// radeonReleaseDmaRegion( rmesa, &rmesa->swtcl.indexed_verts,
- // __FUNCTION__ );
+ // __func__ );
if (RADEON_DEBUG & RADEON_FALLBACKS)
fprintf(stderr, "Radeon end tcl fallback\n");
-void radeonTclFallback( GLcontext *ctx, GLuint bit, GLboolean mode )
+void radeonTclFallback( struct gl_context *ctx, GLuint bit, GLboolean mode )
{
r100ContextPtr rmesa = R100_CONTEXT(ctx);
GLuint oldfallback = rmesa->radeon.TclFallback;