/**************************************************************************
Copyright 2000, 2001 ATI Technologies Inc., Ontario, Canada, and
- Tungsten Graphics Inc., Austin, Texas.
+ VMware, Inc.
All Rights Reserved.
/*
* Authors:
- * Keith Whitwell <keith@tungstengraphics.com>
+ * Keith Whitwell <keithw@vmware.com>
*/
#include "main/glheader.h"
#include "main/mtypes.h"
#include "main/light.h"
#include "main/enums.h"
+#include "main/state.h"
#include "vbo/vbo.h"
#include "tnl/tnl.h"
#define HAVE_LINE_STRIPS 1
#define HAVE_TRIANGLES 1
#define HAVE_TRI_STRIPS 1
-#define HAVE_TRI_STRIP_1 0
#define HAVE_TRI_FANS 1
#define HAVE_QUADS 0
#define HAVE_QUAD_STRIPS 0
static GLushort *radeonAllocElts( r100ContextPtr rmesa, GLuint nr )
{
if (rmesa->radeon.dma.flush)
- rmesa->radeon.dma.flush( rmesa->radeon.glCtx );
+ rmesa->radeon.dma.flush( &rmesa->radeon.glCtx );
radeonEmitAOS( rmesa,
rmesa->radeon.tcl.aos_count, 0 );
state_size = radeonCountStateEmitSize( &rmesa->radeon );
/* tcl may be changed in radeonEmitArrays so account for it if not dirty */
if (!rmesa->hw.tcl.dirty)
- state_size += rmesa->hw.tcl.check( rmesa->radeon.glCtx, &rmesa->hw.tcl );
+ state_size += rmesa->hw.tcl.check( &rmesa->radeon.glCtx, &rmesa->hw.tcl );
/* predict size for elements */
for (i = 0; i < VB->PrimitiveCount; ++i)
{
space_required += SCISSOR_BUFSZ;
}
/* flush the buffer in case we need more than is left. */
- if (rcommonEnsureCmdBufSpace(&rmesa->radeon, space_required, __FUNCTION__))
+ if (rcommonEnsureCmdBufSpace(&rmesa->radeon, space_required, __func__))
return space_required + radeonCountStateEmitSize( &rmesa->radeon );
else
return space_required + state_size;
inputs |= VERT_BIT_NORMAL;
}
- if (ctx->_TriangleCaps & DD_SEPARATE_SPECULAR) {
+ if (_mesa_need_secondary_color(ctx)) {
inputs |= VERT_BIT_COLOR1;
}
}
for (i = 0 ; i < ctx->Const.MaxTextureUnits; i++) {
- if (ctx->Texture.Unit[i]._ReallyEnabled) {
+ if (ctx->Texture.Unit[i]._Current) {
/* TODO: probably should not emit texture coords when texgen is enabled */
if (rmesa->TexGenNeedNormals[i]) {
inputs |= VERT_BIT_NORMAL;
tnl->Driver.NotifyMaterialChange = radeonUpdateMaterial;
if ( rmesa->radeon.dma.flush )
- rmesa->radeon.dma.flush( rmesa->radeon.glCtx );
+ rmesa->radeon.dma.flush( &rmesa->radeon.glCtx );
rmesa->radeon.dma.flush = NULL;
rmesa->swtcl.vertex_format = 0;
// if (rmesa->swtcl.indexed_verts.buf)
// radeonReleaseDmaRegion( rmesa, &rmesa->swtcl.indexed_verts,
- // __FUNCTION__ );
+ // __func__ );
if (RADEON_DEBUG & RADEON_FALLBACKS)
fprintf(stderr, "Radeon end tcl fallback\n");