r200: fix glean pixelFormats regression

[mesa.git] / src / mesa / drivers / dri / radeon / radeon_tex.c

diff --git a/src/mesa/drivers/dri/radeon/radeon_tex.c b/src/mesa/drivers/dri/radeon/radeon_tex.c
index 8784dcc5edd4c3cc2e75da82823a44fa99d356c8..2dfb5042ecc23d5db5b69029b2f9c31290e3f725 100644 (file)
--- a/src/mesa/drivers/dri/radeon/radeon_tex.c
+++ b/src/mesa/drivers/dri/radeon/radeon_tex.c
@@ -171,6 +171,9 @@ static void radeonSetTexFilter( radeonTexObjPtr t, GLenum minf, GLenum magf )
 {
    GLuint anisotropy = (t->pp_txfilter & RADEON_MAX_ANISO_MASK);
 
+   /* Force revalidation to account for switches from/to mipmapping. */
+   t->validated = GL_FALSE;
+
    t->pp_txfilter &= ~(RADEON_MIN_FILTER_MASK | RADEON_MAG_FILTER_MASK);
 
    /* r100 chips can't handle mipmaps/aniso for cubemap/volume textures */
@@ -343,21 +346,22 @@ static void radeonTexParameter( GLcontext *ctx, GLenum target,
    case GL_TEXTURE_MAX_LEVEL:
    case GL_TEXTURE_MIN_LOD:
    case GL_TEXTURE_MAX_LOD:
+
       /* This isn't the most efficient solution but there doesn't appear to
        * be a nice alternative.  Since there's no LOD clamping,
        * we just have to rely on loading the right subset of mipmap levels
        * to simulate a clamped LOD.
        */
-      driSwapOutTextureObject( (driTextureObject *) t );
+      if (t->mt) {
+         radeon_miptree_unreference(t->mt);
+        t->mt = 0;
+        t->validated = GL_FALSE;
+      }
       break;
 
    default:
       return;
    }
-
-   /* Mark this texobj as dirty (one bit per tex unit)
-    */
-   t->dirty_state = R100_TEX_ALL;
 }
 
 static void radeonDeleteTexture( GLcontext *ctx,
@@ -365,6 +369,7 @@ static void radeonDeleteTexture( GLcontext *ctx,
 {
    r100ContextPtr rmesa = R100_CONTEXT(ctx);
    radeonTexObj* t = radeon_tex_obj(texObj);
+   int i;
 
    if ( RADEON_DEBUG & (DEBUG_STATE|DEBUG_TEXTURE) ) {
       fprintf( stderr, "%s( %p (target = %s) )\n", __FUNCTION__, (void *)texObj,
@@ -372,8 +377,14 @@ static void radeonDeleteTexture( GLcontext *ctx,
    }
 
    if ( rmesa ) {
-     RADEON_FIREVERTICES( rmesa );
-     
+     radeon_firevertices(&rmesa->radeon);
+     for ( i = 0 ; i < rmesa->radeon.glCtx->Const.MaxTextureUnits ; i++ ) {
+       if ( t == rmesa->state.texture.unit[i].texobj ) {
+        rmesa->state.texture.unit[i].texobj = NULL;
+        rmesa->hw.tex[i].dirty = GL_FALSE;
+        rmesa->hw.cube[i].dirty = GL_FALSE;
+       }
+     }
    }
 
    if (t->mt) {
@@ -441,11 +452,12 @@ void radeonInitTextureFuncs( struct dd_function_table *functions )
    functions->TexImage2D               = radeonTexImage2D;
    functions->TexSubImage1D            = radeonTexSubImage1D;
    functions->TexSubImage2D            = radeonTexSubImage2D;
+   functions->GetTexImage               = radeonGetTexImage;
+   functions->GetCompressedTexImage     = radeonGetCompressedTexImage;
 
    functions->NewTextureObject         = radeonNewTextureObject;
    //   functions->BindTexture         = radeonBindTexture;
    functions->DeleteTexture            = radeonDeleteTexture;
-   functions->IsTextureResident                = driIsTextureResident;
 
    functions->TexEnv                   = radeonTexEnv;
    functions->TexParameter             = radeonTexParameter;