SUBPIXEL fixes from Dieter

[mesa.git] / src / mesa / drivers / dri / radeon / radeon_texmem.c

diff --git a/src/mesa/drivers/dri/radeon/radeon_texmem.c b/src/mesa/drivers/dri/radeon/radeon_texmem.c
index 61f187762cdeac016fe9b09ee3f5c3f33c23b247..d910a6c15a5e90ff7b69cdea3a34689d92143bff 100644 (file)
--- a/src/mesa/drivers/dri/radeon/radeon_texmem.c
+++ b/src/mesa/drivers/dri/radeon/radeon_texmem.c
@@ -41,7 +41,6 @@ SOFTWARE.
 #include "imports.h"
 #include "context.h"
 #include "macros.h"
-#include "simple_list.h"
 
 #include "radeon_context.h"
 #include "radeon_ioctl.h"
@@ -56,7 +55,7 @@ void
 radeonDestroyTexObj( radeonContextPtr rmesa, radeonTexObjPtr t )
 {
    if ( RADEON_DEBUG & DEBUG_TEXTURE ) {
-      fprintf( stderr, "%s( %p, %p )\n", __FUNCTION__, t, t->base.tObj );
+      fprintf( stderr, "%s( %p, %p )\n", __FUNCTION__, (void *)t, (void *)t->base.tObj );
    }
 
    if ( rmesa != NULL ) {
@@ -66,8 +65,7 @@ radeonDestroyTexObj( radeonContextPtr rmesa, radeonTexObjPtr t )
       for ( i = 0 ; i < rmesa->glCtx->Const.MaxTextureUnits ; i++ ) {
         if ( t == rmesa->state.texture.unit[i].texobj ) {
            rmesa->state.texture.unit[i].texobj = NULL;
-           remove_from_list( &rmesa->hw.tex[i] );
-           make_empty_list( &rmesa->hw.tex[i] );
+           rmesa->hw.tex[i].dirty = GL_FALSE;
         }
       }
    }
@@ -189,7 +187,7 @@ static void uploadSubImage( radeonContextPtr rmesa, radeonTexObjPtr t,
 
    if ( RADEON_DEBUG & DEBUG_TEXTURE ) {
       fprintf( stderr, "%s( %p, %p ) level/width/height/face = %d/%d/%d/%u\n", 
-              __FUNCTION__, t, t->base.tObj, level, width, height, face );
+              __FUNCTION__, (void *)t, (void *)t->base.tObj, level, width, height, face );
    }
 
    ASSERT(face < 6);
@@ -259,10 +257,21 @@ static void uploadSubImage( radeonContextPtr rmesa, radeonTexObjPtr t,
       tex.height = imageHeight;
    }
    else {
-      tex.width = imageWidth; /* compressed */
-      tex.height = imageHeight;
-      if (tex.height < 4)
-         tex.height = 4;
+      /* In case of for instance 8x8 texture (2x2 dxt blocks), padding after the first two blocks is
+         needed (only with dxt1 since 2 dxt3/dxt5 blocks already use 32 Byte). */
+      /* set tex.height to 1/4 since 1 "macropixel" (dxt-block) has 4 real pixels. Needed
+         so the kernel module reads the right amount of data. */
+      tex.height = (imageHeight + 3) / 4;
+      tex.width = (imageWidth + 3) / 4;
+      switch (t->pp_txformat & RADEON_TXFORMAT_FORMAT_MASK) {
+      case RADEON_TXFORMAT_DXT1:
+         tex.width *= 8;
+         break;
+      case RADEON_TXFORMAT_DXT23:
+      case RADEON_TXFORMAT_DXT45:
+         tex.width *= 16;
+         break;
+      }
    }
    tex.image = &tmp;
 
@@ -306,13 +315,18 @@ int radeonUploadTexImages( radeonContextPtr rmesa, radeonTexObjPtr t, GLuint fac
 
    if ( RADEON_DEBUG & (DEBUG_TEXTURE|DEBUG_IOCTL) ) {
       fprintf( stderr, "%s( %p, %p ) sz=%d lvls=%d-%d\n", __FUNCTION__,
-              rmesa->glCtx, t->base.tObj, t->base.totalSize,
+              (void *)rmesa->glCtx, (void *)t->base.tObj, t->base.totalSize,
               t->base.firstLevel, t->base.lastLevel );
    }
 
    if ( !t || t->base.totalSize == 0 )
       return 0;
 
+   if (RADEON_DEBUG & DEBUG_SYNC) {
+      fprintf(stderr, "%s: Syncing\n", __FUNCTION__ );
+      radeonFinish( rmesa->glCtx );
+   }
+
    LOCK_HARDWARE( rmesa );
 
    if ( t->base.memBlock == NULL ) {
@@ -355,5 +369,10 @@ int radeonUploadTexImages( radeonContextPtr rmesa, radeonTexObjPtr t, GLuint fac
       t->base.dirty_images[face] = 0;
    }
 
+   if (RADEON_DEBUG & DEBUG_SYNC) {
+      fprintf(stderr, "%s: Syncing\n", __FUNCTION__ );
+      radeonFinish( rmesa->glCtx );
+   }
+
    return 0;
 }