R300: set the number of GB pipes on all r3xx-r5xx chips

[mesa.git] / src / mesa / drivers / dri / radeon / radeon_texstate.c

diff --git a/src/mesa/drivers/dri/radeon/radeon_texstate.c b/src/mesa/drivers/dri/radeon/radeon_texstate.c
index 0c7c85557760783376b4754141e241afd30506e5..6a34f1e33283e166a47722848b847074e70af116 100644 (file)
--- a/src/mesa/drivers/dri/radeon/radeon_texstate.c
+++ b/src/mesa/drivers/dri/radeon/radeon_texstate.c
@@ -605,19 +605,18 @@ void radeonSetTexOffset(__DRIcontext * pDRICtx, GLint texname,
        r100ContextPtr rmesa = pDRICtx->driverPrivate;
        struct gl_texture_object *tObj =
            _mesa_lookup_texture(rmesa->radeon.glCtx, texname);
-       radeonTexObjPtr t;
+       radeonTexObjPtr t = radeon_tex_obj(tObj);
 
        if (tObj == NULL)
                return;
 
-       t = (radeonTexObjPtr) tObj->DriverData;
-
        t->image_override = GL_TRUE;
 
        if (!offset)
                return;
-
-       t->pp_txoffset = offset;
+       
+       t->bo = NULL;
+       t->override_offset = offset;
        t->pp_txpitch = pitch - 32;
 
        switch (depth) {
@@ -717,7 +716,6 @@ static void import_tex_obj_state( r100ContextPtr rmesa,
    cmd[TEX_PP_TXFILTER] |= texobj->pp_txfilter & TEXOBJ_TXFILTER_MASK;
    cmd[TEX_PP_TXFORMAT] &= ~TEXOBJ_TXFORMAT_MASK;
    cmd[TEX_PP_TXFORMAT] |= texobj->pp_txformat & TEXOBJ_TXFORMAT_MASK;
-   cmd[TEX_PP_TXOFFSET] = texobj->pp_txoffset;
    cmd[TEX_PP_BORDER_COLOR] = texobj->pp_border_color;
 
    if (texobj->base.Target == GL_TEXTURE_RECTANGLE_NV) {
@@ -732,21 +730,10 @@ static void import_tex_obj_state( r100ContextPtr rmesa,
 
       if (texobj->base.Target == GL_TEXTURE_CUBE_MAP) {
         uint32_t *cube_cmd = &rmesa->hw.cube[unit].cmd[CUBE_CMD_0];
-        //      GLuint bytesPerFace = texobj->base.totalSize / 6;
-        //      ASSERT(texobj->base.totalSize % 6 == 0);
-        GLuint bytesPerFace = 1; // TODO
 
         RADEON_STATECHANGE( rmesa, cube[unit] );
         cube_cmd[CUBE_PP_CUBIC_FACES] = texobj->pp_cubic_faces;
-        /* dont know if this setup conforms to OpenGL.. 
-         * at least it matches the behavior of mesa software renderer
-         */
-        cube_cmd[CUBE_PP_CUBIC_OFFSET_0] = texobj->pp_txoffset; /* right */
-        cube_cmd[CUBE_PP_CUBIC_OFFSET_1] = texobj->pp_txoffset + 1 * bytesPerFace; /* left */
-        cube_cmd[CUBE_PP_CUBIC_OFFSET_2] = texobj->pp_txoffset + 2 * bytesPerFace; /* top */
-        cube_cmd[CUBE_PP_CUBIC_OFFSET_3] = texobj->pp_txoffset + 3 * bytesPerFace; /* bottom */
-        cube_cmd[CUBE_PP_CUBIC_OFFSET_4] = texobj->pp_txoffset + 4 * bytesPerFace; /* front */
-        cmd[TEX_PP_TXOFFSET] = texobj->pp_txoffset + 5 * bytesPerFace; /* back */
+        /* state filled out in the cube_emit */
       }
    }
 
@@ -755,8 +742,6 @@ static void import_tex_obj_state( r100ContextPtr rmesa,
       rmesa->hw.set.cmd[SET_SE_COORDFMT] = se_coord_fmt;
    }
 
-   texobj->dirty_state &= ~(1<<unit);
-
    rmesa->radeon.NewGLState |= _NEW_TEXTURE_MATRIX;
 }
 
@@ -986,6 +971,7 @@ static GLboolean setup_hardware_state(r100ContextPtr rmesa, radeonTexObj *t, int
    if (t->base.Target == GL_TEXTURE_RECTANGLE_NV) {
       t->pp_txformat |= RADEON_TXFORMAT_NON_POWER2;
    }
+
    return GL_TRUE;
 }
 
@@ -995,20 +981,17 @@ static GLboolean radeon_validate_texture(GLcontext *ctx, struct gl_texture_objec
    radeonTexObj *t = radeon_tex_obj(texObj);
    int ret;
 
-   fprintf(stderr,"t dirty %d %x %d\n", unit, t->dirty_state, t->validated);
-
    if (!radeon_validate_texture_miptree(ctx, texObj))
       return GL_FALSE;
 
-   /* yuv conversion only works in first unit */
-   if (unit != 0 && (t->pp_txfilter & RADEON_YUV_TO_RGB))
-      return GL_FALSE;
-
-
    ret = setup_hardware_state(rmesa, t, unit);
    if (ret == GL_FALSE)
      return GL_FALSE;
 
+   /* yuv conversion only works in first unit */
+   if (unit != 0 && (t->pp_txfilter & RADEON_YUV_TO_RGB))
+      return GL_FALSE;
+
    RADEON_STATECHANGE( rmesa, ctx );
    rmesa->hw.ctx.cmd[CTX_PP_CNTL] |= 
      (RADEON_TEX_0_ENABLE | RADEON_TEX_BLEND_0_ENABLE) << unit;
@@ -1016,12 +999,9 @@ static GLboolean radeon_validate_texture(GLcontext *ctx, struct gl_texture_objec
    RADEON_STATECHANGE( rmesa, tcl );
    rmesa->hw.tcl.cmd[TCL_OUTPUT_VTXFMT] |= RADEON_ST_BIT(unit);
 
-   fprintf(stderr,"setting pp cntl to %x\n", rmesa->hw.ctx.cmd[CTX_PP_CNTL]);
    rmesa->recheck_texgen[unit] = GL_TRUE;
 
-   if (t->dirty_state & (1<<unit)) {
-      import_tex_obj_state( rmesa, unit, t );
-   }
+   import_tex_obj_state( rmesa, unit, t );
 
    if (rmesa->recheck_texgen[unit]) {
       GLboolean fallback = !radeon_validate_texgen( ctx, unit );