dri/radeon: test for FEATURE defines

[mesa.git] / src / mesa / drivers / dri / radeon / server / radeon.h

diff --git a/src/mesa/drivers/dri/radeon/server/radeon.h b/src/mesa/drivers/dri/radeon/server/radeon.h
index 7966859078b08532a2fc8b99734e24fc1bd145cd..3fb1e37c530b65fd8ae7678a4b4adcef2320362a 100644 (file)
--- a/src/mesa/drivers/dri/radeon/server/radeon.h
+++ b/src/mesa/drivers/dri/radeon/server/radeon.h
@@ -31,13 +31,28 @@
  * DEALINGS IN THE SOFTWARE.
  */
 
-/* $XFree86: xc/programs/Xserver/hw/xfree86/drivers/ati/radeon.h,v 1.29 2002/10/12 01:38:07 martin Exp $ */
 
 #ifndef _RADEON_H_
 #define _RADEON_H_
 
 #include "xf86drm.h"           /* drm_handle_t, etc */
 
+#       define RADEON_AGP_1X_MODE           0x01
+#       define RADEON_AGP_2X_MODE           0x02
+#       define RADEON_AGP_4X_MODE           0x04
+#       define RADEON_AGP_FW_MODE           0x10
+#       define RADEON_AGP_MODE_MASK         0x17
+#define RADEON_CP_CSQ_CNTL                  0x0740
+#       define RADEON_CSQ_CNT_PRIMARY_MASK     (0xff << 0)
+#       define RADEON_CSQ_PRIDIS_INDDIS        (0    << 28)
+#       define RADEON_CSQ_PRIPIO_INDDIS        (1    << 28)
+#       define RADEON_CSQ_PRIBM_INDDIS         (2    << 28)
+#       define RADEON_CSQ_PRIPIO_INDBM         (3    << 28)
+#       define RADEON_CSQ_PRIBM_INDBM          (4    << 28)
+#       define RADEON_CSQ_PRIPIO_INDPIO        (15   << 28)
+
+#define RADEON_PCIGART_TABLE_SIZE       32768
+
 #define PCI_CHIP_R200_BB                0x4242
 #define PCI_CHIP_RV250_Id               0x4964
 #define PCI_CHIP_RV250_Ie               0x4965
@@ -67,6 +82,7 @@
 #define PCI_CHIP_RADEON_QY             0x5159
 #define PCI_CHIP_RADEON_QZ             0x515A
 #define PCI_CHIP_R200_Ql               0x516C
+#define PCI_CHIP_RV370_5460             0x5460
 #define PCI_CHIP_RV280_Y_              0x5960
 #define PCI_CHIP_RV280_Ya              0x5961
 #define PCI_CHIP_RV280_Yb              0x5962
@@ -89,7 +105,11 @@ typedef enum {
     CHIP_FAMILY_RV250,
     CHIP_FAMILY_M9,
     CHIP_FAMILY_RV280,
-    CHIP_FAMILY_R300
+    CHIP_FAMILY_R300,
+    CHIP_FAMILY_R350,
+    CHIP_FAMILY_RV350,
+    CHIP_FAMILY_RV380,  /* RV370/RV380/M22/M24 */
+    CHIP_FAMILY_R420,   /* R420/R423/M18 */
 } RADEONChipFamily;
 
 
@@ -173,12 +193,15 @@ typedef struct {
    unsigned int      frontPitchOffset;
    unsigned int      backPitchOffset;
    unsigned int      depthPitchOffset;
+   
+   int               colorTiling;      /**< \brief Enable color tiling */
 
    int               irq;              /**< \brief IRQ number */
    int               page_flip_enable; /**< \brief Page Flip enable */
    unsigned int      gen_int_cntl;
    unsigned int      crtc_offset_cntl;
 
+   unsigned long     pcieGartTableOffset;
 } RADEONInfoRec, *RADEONInfoPtr;