unsigned reserved : 4;
unsigned ofs : 28;
}ni;
- uint32_t ui;
+ u_int32_t ui;
} savageRegZPixelOffset;
/* This reg exists only on Savage4. */
unsigned passZpassOp : 3;
unsigned reserved : 3;
}ni;
- uint32_t ui;
+ u_int32_t ui;
} savageRegStencilCtrl;
/**************************
unsigned palSize : 2;
unsigned newPal : 1;
}ni;
- uint32_t ui;
+ u_int32_t ui;
} savageRegTexDescr_s4;
typedef union
{
unsigned reserved3 : 10;
unsigned newPal : 1;
}ni;
- uint32_t ui;
+ u_int32_t ui;
} savageRegTexDescr_s3d;
/* The layout of this reg is the same on Savage4 and Savage3D,
unsigned reserved : 1;
unsigned addr : 29;
}ni;
- uint32_t ui;
+ u_int32_t ui;
} savageRegTexAddr;
/* The layout of this reg is the same on Savage4 and Savage3D. */
unsigned reserved : 3;
unsigned addr : 29;
}ni;
- uint32_t ui;
+ u_int32_t ui;
} savageRegTexPalAddr;
/* The layout of this reg on Savage4 and Savage3D are very similar. */
unsigned xprClr0 : 16;
unsigned xprClr1 : 16; /* this is reserved on Savage3D */
}ni;
- uint32_t ui;
+ u_int32_t ui;
} savageRegTexXprClr; /* transparency color in RGB565 format*/
/* The layout of this reg differs between Savage4 and Savage3D.
unsigned alphaArg1Invert : 1;
unsigned alphaArg2Invert : 1;
}ni;
- uint32_t ui;
+ u_int32_t ui;
} savageRegTexCtrl_s4;
typedef union
{
unsigned texXprEn : 1;
unsigned reserved2 : 11;
}ni;
- uint32_t ui;
+ u_int32_t ui;
} savageRegTexCtrl_s3d;
/* This reg exists only on Savage4. */
unsigned colorDoDiffMul : 1;
unsigned LeftShiftVal : 2;
}ni;
- uint32_t ui;
+ u_int32_t ui;
} savageRegTexBlendCtrl;
/* This reg exists only on Savage4. */
unsigned red : 8;
unsigned alpha : 8;
}ni;
- uint32_t ui;
+ u_int32_t ui;
} savageRegTexBlendColor;
/********************************
unsigned widthInTile : 6;
unsigned bitPerPixel : 1;
}ni;
- uint32_t ui;
+ u_int32_t ui;
} savageRegTiledSurface;
/********************************
unsigned scissorYStart : 12;
unsigned alphaRefVal : 8;
}ni;
- uint32_t ui;
+ u_int32_t ui;
} savageRegDrawCtrl0;
/* This reg exists only on Savage4. */
unsigned alphaTestCmpFunc : 3;
unsigned alphaTestEn : 1;
}ni;
- uint32_t ui;
+ u_int32_t ui;
} savageRegDrawCtrl1;
/* This reg exists only on Savage4. */
struct
{
unsigned dstAlphaMode : 3;
+
+ /**
+ * This bit enables \c GL_FUNC_SUBTRACT. Like most DirectX oriented
+ * hardware, there's no way to do \c GL_FUNC_REVERSE_SUBTRACT.
+ *
+ * \todo
+ * Add support for \c GL_FUNC_SUBTRACT!
+ */
unsigned dstMinusSrc : 1;
unsigned srcAlphaMode : 3;
unsigned binaryFinalAlpha : 1;
unsigned flushPdDestWrites : 1;
unsigned flushPdZbufWrites : 1;
}ni;
- uint32_t ui;
+ u_int32_t ui;
} savageRegDrawLocalCtrl;
/* This reg exists only on Savage3D. */
unsigned texBlendCtrl : 3;
unsigned flushPdDestWrites : 1;
unsigned flushPdZbufWrites : 1;
- /* havn't found an equivalent for Savage4. Utah-driver sets it to 0. */
+
+ /**
+ * Disable perspective correct interpolation for vertex color, vertex
+ * fog, and vertex alpha. For OpenGL, this should \b always be zero.
+ */
unsigned interpMode : 1;
}ni;
- uint32_t ui;
+ u_int32_t ui;
} savageRegDrawCtrl;
#define SAVAGETBC_DECAL_S3D 0
unsigned scissorYStart : 11;
unsigned reserved2 : 5;
} ni;
- uint32_t ui;
+ u_int32_t ui;
} savageRegScissorsStart;
/* This reg exists only on Savage3D. */
unsigned scissorYEnd : 11;
unsigned reserved2 : 5;
} ni;
- uint32_t ui;
+ u_int32_t ui;
} savageRegScissorsEnd;
/********************************
unsigned reserved : 1;
unsigned addr : 29; /*quad word aligned*/
}ni;
- uint32_t ui;
+ u_int32_t ui;
} savageRegVertBufAddr;
/* I havn't found a Savage3D equivalent of this reg in the Utah-driver.
unsigned reserved : 1;
unsigned addr : 29; /*4-quad word aligned*/
}ni;
- uint32_t ui;
+ u_int32_t ui;
} savageRegDMABufAddr;
/********************************
unsigned reserved : 17;
unsigned kickOff : 1;
}ni;
- uint32_t ui;
+ u_int32_t ui;
} savageRegFlag;
/********************************
unsigned floatZEn : 1;
unsigned wToZEn : 1;
}ni;
- uint32_t ui;
+ u_int32_t ui;
} savageRegZBufCtrl_s4;
typedef union
{
unsigned drawUpdateEn : 1;
unsigned zUpdateEn : 1;
unsigned zBufEn : 1;
+
+ /**
+ * We suspect that, in conjunction with
+ * \c savageRegZBufOffset::zDepthSelect, these 2 bits are actually
+ * \c stencilUpdateEn and \c stencilBufEn. If not, then some of
+ * the bits in \c reserved2 may fulfill that purpose.
+ */
unsigned reserved1 : 2;
+
unsigned zExpOffset : 8;
unsigned wrZafterAlphaTst : 1;
unsigned reserved2 : 15;
}ni;
- uint32_t ui;
+ u_int32_t ui;
} savageRegZBufCtrl_s3d;
/* The layout of this reg on Savage4 and Savage3D is very similar. */
unsigned offset : 14;
unsigned reserved : 11; /* 12-bits in Utah-driver */
unsigned zBufWidthInTiles : 6;
+
+ /**
+ * 0 selects 16-bit depth buffer. On Savage4 hardware, 1 selects
+ * 24-bit depth buffer (with 8-bits for stencil). Though it has never
+ * been tried, we suspect that on Savage3D hardware, 1 selects 15-bit
+ * depth buffer (with 1-bit for stencil).
+ */
unsigned zDepthSelect : 1;
}ni;
- uint32_t ui;
+ u_int32_t ui;
} savageRegZBufOffset;
/* The layout of this reg is the same on Savage4 and Savage3D. */
unsigned wHigh : 6;
unsigned reserved4 : 2;
}ni;
- uint32_t ui;
+ u_int32_t ui;
} savageRegZWatermarks;
/********************************
unsigned fogMode : 1;
unsigned fogEndShift : 2;
}ni;
- uint32_t ui;
+ u_int32_t ui;
} savageRegFogCtrl;
/*not in spec, but tempo for pp and driver*/
unsigned fogDensity : 16;
unsigned fogStart : 16;
}ni;
- uint32_t ui;
+ u_int32_t ui;
} savageRegFogParam;
/**************************************
unsigned antiAliasMode : 2;
unsigned dstPixFmt : 1;
}ni;
- uint32_t ui;
+ u_int32_t ui;
} savageRegDestCtrl;
/* The layout of this reg on Savage4 and Savage3D are very similar. */
* However, it is not used in either driver. */
unsigned destFlush : 2;
}ni;
- uint32_t ui;
+ u_int32_t ui;
} savageRegDestTexWatermarks;
/* Savage4/Twister/ProSavage register BCI addresses */
#define SAVAGE_FIRST_REG 0x18
#define SAVAGE_NR_REGS 34
typedef struct savage_registers_s4_t {
- uint32_t unused1[6]; /* 0x18-0x1d */
+ u_int32_t unused1[6]; /* 0x18-0x1d */
savageRegDrawLocalCtrl drawLocalCtrl; /* 0x1e */
savageRegTexPalAddr texPalAddr; /* 0x1f */
savageRegTexCtrl_s4 texCtrl[2]; /* 0x20, 0x21 */
savageRegTexBlendCtrl texBlendCtrl[2]; /* 0x24, 0x25 */
savageRegTexXprClr texXprClr; /* 0x26 */
savageRegTexDescr_s4 texDescr; /* 0x27 */
- uint8_t fogTable[32]; /* 0x28-0x2f (8dwords) */
+ u_int8_t fogTable[32]; /* 0x28-0x2f (8dwords) */
savageRegFogCtrl fogCtrl; /* 0x30 */
savageRegStencilCtrl stencilCtrl; /* 0x31 */
savageRegZBufCtrl_s4 zBufCtrl; /* 0x32 */
savageRegTexAddr texAddr; /* 0x1a */
savageRegTexDescr_s3d texDescr; /* 0x1b */
savageRegTexCtrl_s3d texCtrl; /* 0x1c */
- uint32_t unused1[3]; /* 0x1d-0x1f */
- uint8_t fogTable[64]; /* 0x20-0x2f (16dwords) */
+ u_int32_t unused1[3]; /* 0x1d-0x1f */
+ u_int8_t fogTable[64]; /* 0x20-0x2f (16dwords) */
savageRegFogCtrl fogCtrl; /* 0x30 */
savageRegDrawCtrl drawCtrl; /* 0x31 */
savageRegZBufCtrl_s3d zBufCtrl; /* 0x32 */
savageRegScissorsEnd scissorsEnd; /* 0x36 */
savageRegZWatermarks zWatermarks; /* 0x37 */
savageRegDestTexWatermarks destTexWatermarks; /* 0x38 */
- uint32_t unused2; /* 0x39 */
+ u_int32_t unused2; /* 0x39 */
} savageRegistersS3D;
typedef union savage_registers_t {
savageRegistersS4 s4;
savageRegistersS3D s3d;
- uint32_t ui[SAVAGE_NR_REGS];
+ u_int32_t ui[SAVAGE_NR_REGS];
} savageRegisters;
((((r) & 0xf8) << 8) | (((g) & 0xfc) << 3) | (((b) & 0xf8) >> 3))
-
-/*AlphaFunc*/
-#define LCS_A_NEVER 0x0200
-#define LCS_A_LESS 0x0201
-#define LCS_A_EQUAL 0x0202
-#define LCS_A_LEQUAL 0x0203
-#define LCS_A_GREATER 0x0204
-#define LCS_A_NOTEQUAL 0x0205
-#define LCS_A_GEQUAL 0x0206
-#define LCS_A_ALWAYS 0x0207
-/*stencilFunc*/
-#define LCS_S_NEVER 0x0200
-#define LCS_S_LESS 0x0201
-#define LCS_S_EQUAL 0x0202
-#define LCS_S_LEQUAL 0x0203
-#define LCS_S_GREATER 0x0204
-#define LCS_S_NOTEQUAL 0x0205
-#define LCS_S_GEQUAL 0x0206
-#define LCS_S_ALWAYS 0x0207
-/*depthFunc*/
-
-#define LCS_Z_NEVER 0x0200
-#define LCS_Z_LESS 0x0201
-#define LCS_Z_EQUAL 0x0202
-#define LCS_Z_LEQUAL 0x0203
-#define LCS_Z_GREATER 0x0204
-#define LCS_Z_NOTEQUAL 0x0205
-#define LCS_Z_GEQUAL 0x0206
-#define LCS_Z_ALWAYS 0x0207
-#if 0
-#define LCS_UPDATE_LINEWIDTH (0x1<<15)
-#define LCS_LINEWIDTH_MASK (0x7<<12)
-#define LCS_LINEWIDTH_SHIFT 12
-#define LCS_LINEWIDTH_0_5 (0x1<<12)
-#define LCS_LINEWIDTH_1_0 (0x2<<12)
-#define LCS_LINEWIDTH_2_0 (0x4<<12)
-#define LCS_LINEWIDTH_3_0 (0x6<<12)
-#define LCS_UPDATE_ALPHA_INTERP (0x1<<11)
-#define LCS_ALPHA_FLAT (0x1<<10)
-#define LCS_ALPHA_INTERP (0x0<<10)
-#define LCS_UPDATE_FOG_INTERP (0x1<<9)
-#define LCS_FOG_INTERP (0x0<<8)
-#define LCS_FOG_FLAT (0x1<<8)
-#define LCS_UPDATE_SPEC_INTERP (0x1<<7)
-#define LCS_SPEC_INTERP (0x0<<6)
-#define LCS_SPEC_FLAT (0x1<<6)
-#define LCS_UPDATE_RGB_INTERP (0x1<<5)
-#define LCS_RGB_INTERP (0x0<<4)
-#define LCS_RGB_FLAT (0x1<<4)
-#define LCS_UPDATE_CULL_MODE (0x1<<3)
-#define LCS_CULL_MASK (0x7<<0)
-#define LCS_CULL_DISABLE (0x1<<0)
-#define LCS_CULL_CW (0x2<<0)
-#define LCS_CULL_CCW (0x3<<0)
-#define LCS_CULL_BOTH (0x4<<0)
-
-#define LCS_INTERP_FLAT (LCS_ALPHA_FLAT|LCS_RGB_FLAT|LCS_SPEC_FLAT)
-#define LCS_UPDATE_INTERP (LCS_UPDATE_ALPHA_INTERP| \
- LCS_UPDATE_RGB_INTERP| \
- LCS_UPDATE_SPEC_INTERP)
-
-#endif
-
-/*#define GFX_OP_PRIMITIVE ((0x3<<29)|(0x1f<<24))*/
-#define PR_TRIANGLES (0x0<<18)
-/*#define PR_TRISTRIP_0 (0x1<<18)*/
-/*#define PR_TRISTRIP_1 (0x2<<18)*/
-/*#define PR_TRIFAN (0x3<<18)*/
-#define PR_POLYGON (0x4<<18)
-#define PR_LINES (0x5<<18)
-/*#define PR_LINESTRIP (0x6<<18)*/
-/*#define PR_RECTS (0x7<<18)*/
-
-/* GFXRENDERSTATE_MAP_COORD_SETS, p116
- */
-#define GFX_OP_MAP_COORD_SETS ((0x3<<29)|(0x1c<<24)|(0x1<<19))
-#define MCS_COORD_ID_SHIFT 16
-#define MCS_COORD_0 (0<<16)
-#define MCS_COORD_1 (1<<16)
-#define MCS_UPDATE_NORMALIZED (1<<15)
-#define MCS_NORMALIZED_COORDS_MASK (1<<14)
-#define MCS_NORMALIZED_COORDS (1<<14)
-#define MCS_UPDATE_V_STATE (1<<7)
-#define MCS_V_STATE_MASK (0x3<<4)
-#define MCS_V_WRAP (0x0<<4)
-#define MCS_V_MIRROR (0x1<<4)
-#define MCS_V_CLAMP (0x2<<4)
-#define MCS_V_WRAP_SHORTEST (0x3<<4)
-#define MCS_UPDATE_U_STATE (1<<3)
-#define MCS_U_STATE_MASK (0x3<<0)
-#define MCS_U_WRAP (0x0<<0)
-#define MCS_U_MIRROR (0x1<<0)
-#define MCS_U_CLAMP (0x2<<0)
-#define MCS_U_WRAP_SHORTEST (0x3<<0)
-
-#define GFX_OP_MAP_TEXELS ((0x3<<29)|(0x1c<<24)|(0x0<<19))
-#define MT_UPDATE_TEXEL1_STATE (1<<15)
-#define MT_TEXEL1_DISABLE (0<<14)
-#define MT_TEXEL1_ENABLE (1<<14)
-#define MT_TEXEL1_COORD0 (0<<11)
-#define MT_TEXEL1_COORD1 (1<<11)
-#define MT_TEXEL1_MAP0 (0<<8)
-#define MT_TEXEL1_MAP1 (1<<8)
-#define MT_UPDATE_TEXEL0_STATE (1<<7)
-#define MT_TEXEL0_DISABLE (0<<6)
-#define MT_TEXEL0_ENABLE (1<<6)
-#define MT_TEXEL0_COORD0 (0<<3)
-#define MT_TEXEL0_COORD1 (1<<3)
-#define MT_TEXEL0_MAP0 (0<<0)
-#define MT_TEXEL0_MAP1 (1<<0)
-
-#define GFX_OP_COLOR_FACTOR ((0x3<<29)|(0x1d<<24)|(0x1<<16)|0x0)
-
-/* GFXRENDERSTATE_MAP_ALPHA_BLEND_STAGES, p132
- */
-#define GFX_OP_MAP_ALPHA_STAGES ((0x3<<29)|(0x1<<24))
-#define MA_STAGE_SHIFT 20
-#define MA_STAGE_0 (0<<20)
-#define MA_STAGE_1 (1<<20)
-#define MA_STAGE_2 (2<<20)
-#define MA_UPDATE_ARG1 (1<<18)
-#define MA_ARG1_MASK ((0x7<<15)|(0x1<<13))
-#define MA_ARG1_ALPHA_FACTOR (0x1<<15)
-#define MA_ARG1_ITERATED_ALPHA (0x3<<15)
-#define MA_ARG1_CURRENT_ALPHA (0x5<<15)
-#define MA_ARG1_TEX0_ALPHA (0x6<<15)
-#define MA_ARG1_TEX1_ALPHA (0x7<<15)
-#define MA_ARG1_INVERT (0x1<<13)
-#define MA_ARG1_DONT_INVERT (0x0<<13)
-#define MA_UPDATE_ARG2 (1<<12)
-#define MA_ARG2_MASK ((0x7<<8)|(0x1<<6))
-#define MA_ARG2_ALPHA_FACTOR (0x1<<8)
-#define MA_ARG2_ITERATED_ALPHA (0x3<<8)
-#define MA_ARG2_CURRENT_ALPHA (0x5<<8)
-#define MA_ARG2_TEX0_ALPHA (0x6<<8)
-#define MA_ARG2_TEX1_ALPHA (0x7<<8)
-#define MA_ARG2_INVERT (0x1<<6)
-#define MA_ARG2_DONT_INVERT (0x0<<6)
-#define MA_UPDATE_OP (1<<5)
-#define MA_OP_MASK (0xf)
-#define MA_OP_ARG1 (0x1)
-#define MA_OP_ARG2 (0x2)
-#define MA_OP_MODULATE (0x3)
-#define MA_OP_MODULATE_X2 (0x4)
-#define MA_OP_MODULATE_X4 (0x5)
-#define MA_OP_ADD (0x6)
-#define MA_OP_ADD_SIGNED (0x7)
-#define MA_OP_LIN_BLEND_ITER_ALPHA (0x8)
-#define MA_OP_LIN_BLEND_ALPHA_FACTOR (0xa)
-#define MA_OP_LIN_BLEND_TEX0_ALPHA (0x10)
-#define MA_OP_LIN_BLEND_TEX1_ALPHA (0x11)
-
-
-/* GFXRENDERSTATE_MAP_COLOR_BLEND_STAGES, p129
- */
-#define GFX_OP_MAP_COLOR_STAGES ((0x3<<29)|(0x0<<24))
-#define MC_STAGE_SHIFT 20
-#define MC_STAGE_0 (0<<20)
-#define MC_STAGE_1 (1<<20)
-#define MC_STAGE_2 (2<<20)
-#define MC_UPDATE_DEST (1<<19)
-#define MC_DEST_MASK (1<<18)
-#define MC_DEST_CURRENT (0<<18)
-#define MC_DEST_ACCUMULATOR (1<<18)
-#define MC_UPDATE_ARG1 (1<<17)
-#define MC_ARG1_MASK ((0x7<<14)|(0x1<<13)|(0x1<<12))
-#define MC_ARG1_ONE (0x0<<14)
-#define MC_ARG1_COLOR_FACTOR (0x1<<14)
-#define MC_ARG1_ACCUMULATOR (0x2<<14)
-#define MC_ARG1_ITERATED_COLOR (0x3<<14)
-#define MC_ARG1_SPECULAR_COLOR (0x4<<14)
-#define MC_ARG1_CURRENT_COLOR (0x5<<14)
-#define MC_ARG1_TEX0_COLOR (0x6<<14)
-#define MC_ARG1_TEX1_COLOR (0x7<<14)
-#define MC_ARG1_DONT_REPLICATE_ALPHA (0x0<<13)
-#define MC_ARG1_REPLICATE_ALPHA (0x1<<13)
-#define MC_ARG1_DONT_INVERT (0x0<<12)
-#define MC_ARG1_INVERT (0x1<<12)
-#define MC_UPDATE_ARG2 (1<<11)
-#define MC_ARG2_MASK ((0x7<<8)|(0x1<<7)|(0x1<<6))
-#define MC_ARG2_ONE (0x0<<8)
-#define MC_ARG2_COLOR_FACTOR (0x1<<8)
-#define MC_ARG2_ACCUMULATOR (0x2<<8)
-#define MC_ARG2_ITERATED_COLOR (0x3<<8)
-#define MC_ARG2_SPECULAR_COLOR (0x4<<8)
-#define MC_ARG2_CURRENT_COLOR (0x5<<8)
-#define MC_ARG2_TEX0_COLOR (0x6<<8)
-#define MC_ARG2_TEX1_COLOR (0x7<<8)
-#define MC_ARG2_DONT_REPLICATE_ALPHA (0x0<<7)
-#define MC_ARG2_REPLICATE_ALPHA (0x1<<7)
-#define MC_ARG2_DONT_INVERT (0x0<<6)
-#define MC_ARG2_INVERT (0x1<<6)
-#define MC_UPDATE_OP (1<<5)
-#define MC_OP_MASK (0xf)
-#define MC_OP_DISABLE (0x0)
-#define MC_OP_ARG1 (0x1)
-#define MC_OP_ARG2 (0x2)
-#define MC_OP_MODULATE (0x3)
-#define MC_OP_MODULATE_X2 (0x4)
-#define MC_OP_MODULATE_X4 (0x5)
-#define MC_OP_ADD (0x6)
-#define MC_OP_ADD_SIGNED (0x7)
-#define MC_OP_LIN_BLEND_ITER_ALPHA (0x8)
-#define MC_OP_LIN_BLEND_ALPHA_FACTOR (0xa)
-#define MC_OP_LIN_BLEND_TEX0_ALPHA (0x10)
-#define MC_OP_LIN_BLEND_TEX1_ALPHA (0x11)
-#define MC_OP_LIN_BLEND_TEX0_COLOR (0x12)
-#define MC_OP_LIN_BLEND_TEX1_COLOR (0x13)
-#define MC_OP_SUBTRACT (0x14)
-
-/* GFXRENDERSTATE_MAP_PALETTE_LOAD, p128
- *
- * Format:
- * 0: GFX_OP_MAP_PALETTE_LOAD
- * 1: 16bpp color[0]
- * ...
- * 256: 16bpp color[255]
- */
-#define GFX_OP_MAP_PALETTE_LOAD ((0x3<<29)|(0x1d<<24)|(0x82<<16)|0xff)
-
-/* GFXRENDERSTATE_MAP_LOD_CONTROL, p127
- */
-#define GFX_OP_MAP_LOD_CTL ((0x3<<29)|(0x1c<<24)|(0x4<<19))
-#define MLC_MAP_ID_SHIFT 16
-#define MLC_MAP_0 (0<<16)
-#define MLC_MAP_1 (1<<16)
-#define MLC_UPDATE_DITHER_WEIGHT (1<<10)
-#define MLC_DITHER_WEIGHT_MASK (0x3<<8)
-#define MLC_DITHER_WEIGHT_FULL (0x0<<8)
-#define MLC_DITHER_WEIGHT_50 (0x1<<8)
-#define MLC_DITHER_WEIGHT_25 (0x2<<8)
-#define MLC_DITHER_WEIGHT_12 (0x3<<8)
-#define MLC_UPDATE_LOD_BIAS (1<<7)
-#define MLC_LOD_BIAS_MASK ((1<<7)-1)
-
-/* GFXRENDERSTATE_MAP_LOD_LIMITS, p126
- */
-#define GFX_OP_MAP_LOD_LIMITS ((0x3<<29)|(0x1c<<24)|(0x3<<19))
-#define MLL_MAP_ID_SHIFT 16
-#define MLL_MAP_0 (0<<16)
-#define MLL_MAP_1 (1<<16)
-#define MLL_UPDATE_MAX_MIP (1<<13)
-#define MLL_MAX_MIP_SHIFT 5
-#define MLL_MAX_MIP_MASK (0xff<<5)
-#define MLL_MAX_MIP_ONE (0x10<<5)
-#define MLL_UPDATE_MIN_MIP (1<<4)
-#define MLL_MIN_MIP_SHIFT 0
-#define MLL_MIN_MIP_MASK (0xf<<0)
-
-/* GFXRENDERSTATE_MAP_FILTER, p124
- */
-#define GFX_OP_MAP_FILTER ((0x3<<29)|(0x1c<<24)|(0x2<<19))
-#define MF_MAP_ID_SHIFT 16
-#define MF_MAP_0 (0<<16)
-#define MF_MAP_1 (1<<16)
-#define MF_UPDATE_ANISOTROPIC (1<<12)
-#define MF_ANISOTROPIC_MASK (1<<10)
-#define MF_ANISOTROPIC_ENABLE (1<<10)
-#define MF_UPDATE_MIP_FILTER (1<<9)
-#define MF_MIP_MASK (0x3<<6)
-#define MF_MIP_NONE (0x0<<6)
-#define MF_MIP_NEAREST (0x1<<6)
-#define MF_MIP_DITHER (0x2<<6)
-#define MF_MIP_LINEAR (0x3<<6)
-#define MF_UPDATE_MAG_FILTER (1<<5)
-#define MF_MAG_MASK (1<<3)
-#define MF_MAG_LINEAR (1<<3)
-#define MF_MAG_NEAREST (0<<3)
-#define MF_UPDATE_MIN_FILTER (1<<2)
-#define MF_MIN_MASK (1<<0)
-#define MF_MIN_LINEAR (1<<0)
-#define MF_MIN_NEAREST (0<<0)
-
-/* GFXRENDERSTATE_MAP_INFO, p118
- */
-#define GFX_OP_MAP_INFO ((0x3<<29)|(0x1d<<24)|0x2)
-#define MI1_MAP_ID_SHIFT 28
-#define MI1_MAP_0 (0<<28)
-#define MI1_MAP_1 (1<<28)
-#define MI1_FMT_MASK (0x7<<24)
-#define MI1_FMT_8CI (0x0<<24)
-#define MI1_FMT_8BPP (0x1<<24)
-#define MI1_FMT_16BPP (0x2<<24)
-#define MI1_FMT_422 (0x5<<24)
-#define MI1_PF_MASK (0x3<<21)
-#define MI1_PF_8CI_RGB565 (0x0<<21)
-#define MI1_PF_8CI_ARGB1555 (0x1<<21)
-#define MI1_PF_8CI_ARGB4444 (0x2<<21)
-#define MI1_PF_8CI_AY88 (0x3<<21)
-#define MI1_PF_16BPP_RGB565 (0x0<<21)
-#define MI1_PF_16BPP_ARGB1555 (0x1<<21)
-#define MI1_PF_16BPP_ARGB4444 (0x2<<21)
-#define MI1_PF_16BPP_AY88 (0x3<<21)
-#define MI1_PF_422_YCRCB_SWAP_Y (0x0<<21)
-#define MI1_PF_422_YCRCB (0x1<<21)
-#define MI1_PF_422_YCRCB_SWAP_UV (0x2<<21)
-#define MI1_PF_422_YCRCB_SWAP_YUV (0x3<<21)
-#define MI1_OUTPUT_CHANNEL_MASK (0x3<<19)
-#define MI1_COLOR_CONV_ENABLE (1<<18)
-#define MI1_VERT_STRIDE_MASK (1<<17)
-#define MI1_VERT_STRIDE_1 (1<<17)
-#define MI1_VERT_OFFSET_MASK (1<<16)
-#define MI1_VERT_OFFSET_1 (1<<16)
-#define MI1_ENABLE_FENCE_REGS (1<<10)
-#define MI1_TILED_SURFACE (1<<9)
-#define MI1_TILE_WALK_X (0<<8)
-#define MI1_TILE_WALK_Y (1<<8)
-#define MI1_PITCH_MASK (0xf<<0)
-#define MI2_DIMENSIONS_ARE_LOG2 (1<<31)
-#define MI2_DIMENSIONS_ARE_EXACT (0<<31)
-#define MI2_HEIGHT_SHIFT 16
-#define MI2_HEIGHT_MASK (0x1ff<<16)
-#define MI2_WIDTH_SHIFT 0
-#define MI2_WIDTH_MASK (0x1ff<<0)
-#define MI3_BASE_ADDR_MASK (~0xf)
-
-#define SAVAGE_VFMT_T0 (GFX_OP_VERTEX_FMT | \
- VF_TEXCOORD_COUNT_1 | \
- VF_SPEC_FOG_ENABLE | \
- VF_RGBA_ENABLE | \
- VF_XYZW)
-
-#define SAVAGE_VFMT_T0T1 (GFX_OP_VERTEX_FMT | \
- VF_TEXCOORD_COUNT_2 | \
- VF_SPEC_FOG_ENABLE | \
- VF_RGBA_ENABLE | \
- VF_XYZW)
-
-#define GFX_OP_VERTEX_FMT ((0x3<<29)|(0x5<<24))
-#define VF_TEXCOORD_COUNT_SHIFT 8
-#define VF_TEXCOORD_COUNT_0 (0<<8)
-#define VF_TEXCOORD_COUNT_1 (1<<8)
-#define VF_TEXCOORD_COUNT_2 (2<<8)
-#define VF_SPEC_FOG_ENABLE (1<<7)
-#define VF_RGBA_ENABLE (1<<6)
-#define VF_Z_OFFSET_ENABLE (1<<5)
-#define VF_XYZ (0x1<<1)
-#define VF_XYZW (0x2<<1)
-#define VF_XY (0x3<<1)
-#define VF_XYW (0x4<<1)
-
-/* Master data transfer engine */
-#define MDT_SRCADD_ALIGMENT (~0x1fUL)
-#define MDT_SRC_PCI 0x1
-#define MDT_SRC_AGP 0x3
#endif
-
-
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