Remove last of core Mesa dependencies in intel_swapbuffers.c

[mesa.git] / src / mesa / drivers / dri / sis / sis_tris.c

diff --git a/src/mesa/drivers/dri/sis/sis_tris.c b/src/mesa/drivers/dri/sis/sis_tris.c
index 44cbcd667063d402f00371db78123c8995eb51b5..a0e39dcd3c9abd9cadf0cef2d96c82599b609a0b 100644 (file)
--- a/src/mesa/drivers/dri/sis/sis_tris.c
+++ b/src/mesa/drivers/dri/sis/sis_tris.c
@@ -403,21 +403,24 @@ do {                                                              \
 
 #define VERT_COPY_RGBA( v0, v1 ) v0->ui[coloroffset] = v1->ui[coloroffset]
 
-#define VERT_SET_SPEC( v0, c )                                 \
+#define VERT_SET_SPEC( v, c )                                  \
 do {                                                           \
    if (specoffset != 0) {                                      \
-      UNCLAMPED_FLOAT_TO_UBYTE(v0->v.specular.red, (c)[0]);    \
-      UNCLAMPED_FLOAT_TO_UBYTE(v0->v.specular.green, (c)[1]);  \
-      UNCLAMPED_FLOAT_TO_UBYTE(v0->v.specular.blue, (c)[2]);   \
+      sis_color_t *spec = (sis_color_t *)&((v)->ui[specoffset]); \
+      UNCLAMPED_FLOAT_TO_UBYTE(spec->red, (c)[0]);             \
+      UNCLAMPED_FLOAT_TO_UBYTE(spec->green, (c)[1]);           \
+      UNCLAMPED_FLOAT_TO_UBYTE(spec->blue, (c)[2]);            \
    }                                                           \
 } while (0)
-#define VERT_COPY_SPEC( v0, v1 )                       \
-do {                                                   \
-   if (specoffset != 0) {                              \
-      v0->v.specular.red   = v1->v.specular.red;       \
-      v0->v.specular.green = v1->v.specular.green;     \
-      v0->v.specular.blue  = v1->v.specular.blue;      \
-   }                                                   \
+#define VERT_COPY_SPEC( v0, v1 )                               \
+do {                                                           \
+   if (specoffset != 0) {                                      \
+      sis_color_t *spec0 = (sis_color_t *)&((v0)->ui[specoffset]); \
+      sis_color_t *spec1 = (sis_color_t *)&((v1)->ui[specoffset]); \
+      spec0->red   = spec1->red;                               \
+      spec0->green = spec1->green;                             \
+      spec0->blue  = spec1->blue;                              \
+   }                                                           \
 } while (0)
 
 #define VERT_SAVE_RGBA( idx )    color[idx] = v[idx]->ui[coloroffset]
@@ -833,19 +836,18 @@ do {                                                                      \
    smesa->vertex_attrs[smesa->vertex_attr_count].offset = (N);         \
    smesa->vertex_attr_count++;                                         \
 } while (0)
-
-#define SIS_TCL_STATE_BITS \
-       (_TNL_BITS_TEX_ANY | _TNL_BIT_COLOR1 | _TNL_BIT_FOG)
                                
 static void sisRenderStart( GLcontext *ctx )
 {
    TNLcontext *tnl = TNL_CONTEXT(ctx);
    sisContextPtr smesa = SIS_CONTEXT(ctx);
    struct vertex_buffer *VB = &tnl->vb;
-   GLuint index = tnl->render_inputs;
+   DECLARE_RENDERINPUTS(index_bitset);
    GLuint AGPParseSet = smesa->AGPParseSet;
    GLboolean tex_fallback = GL_FALSE;
 
+   RENDERINPUTS_COPY( index_bitset, tnl->render_inputs_bitset );
+
    if (ctx->DrawBuffer->_ColorDrawBufferMask[0] == BUFFER_BIT_FRONT_LEFT && 
       smesa->driDrawable->numClipRects != 0)
    {
@@ -869,7 +871,7 @@ static void sisRenderStart( GLcontext *ctx )
 
    AGPParseSet &= ~(MASK_VertexDWSize | MASK_VertexDataFormat);
    AGPParseSet |= SiS_PS_HAS_XYZ | SiS_PS_HAS_DIFFUSE;
-   if (index & _TNL_BITS_TEX_ANY) {
+   if (RENDERINPUTS_TEST_RANGE( index_bitset, _TNL_FIRST_TEX, _TNL_LAST_TEX )) {
       EMIT_ATTR(_TNL_ATTRIB_POS, EMIT_4F_VIEWPORT);
       AGPParseSet |= SiS_PS_HAS_W;
       smesa->coloroffset = 4;
@@ -880,34 +882,34 @@ static void sisRenderStart( GLcontext *ctx )
 
    EMIT_ATTR(_TNL_ATTRIB_COLOR0, EMIT_4UB_4F_BGRA);
 
-   if (index & (_TNL_BIT_COLOR1|_TNL_BIT_FOG)) {
+   smesa->specoffset = 0;
+   if (RENDERINPUTS_TEST( index_bitset, _TNL_ATTRIB_COLOR1 ) ||
+       RENDERINPUTS_TEST( index_bitset, _TNL_ATTRIB_FOG )) {
       AGPParseSet |= SiS_PS_HAS_SPECULAR;
-      smesa->specoffset = smesa->coloroffset + 1;
 
-      if (index & _TNL_BIT_COLOR1) {
+      if (RENDERINPUTS_TEST( index_bitset, _TNL_ATTRIB_COLOR1 )) {
         EMIT_ATTR(_TNL_ATTRIB_COLOR1, EMIT_3UB_3F_BGR);
+        smesa->specoffset = smesa->coloroffset + 1;
       } else {
         EMIT_PAD(3);
       }
 
-      if (index & _TNL_BIT_FOG) {
+      if (RENDERINPUTS_TEST( index_bitset, _TNL_ATTRIB_FOG )) {
         EMIT_ATTR(_TNL_ATTRIB_FOG, EMIT_1UB_1F);
       } else {
         EMIT_PAD(1);
       }
-   } else {
-      smesa->specoffset = 0;
    }
 
    /* projective textures are not supported by the hardware */
-   if (index & _TNL_BIT_TEX(0)) {
+   if (RENDERINPUTS_TEST( index_bitset, _TNL_ATTRIB_TEX0 )) {
       if (VB->TexCoordPtr[0]->size > 2)
         tex_fallback = GL_TRUE;
       EMIT_ATTR(_TNL_ATTRIB_TEX0, EMIT_2F);
       AGPParseSet |= SiS_PS_HAS_UV0;
    }
    /* Will only hit tex1 on SiS300 */
-   if (index & _TNL_BIT_TEX(1)) {
+   if (RENDERINPUTS_TEST( index_bitset, _TNL_ATTRIB_TEX1 )) {
       if (VB->TexCoordPtr[1]->size > 2)
         tex_fallback = GL_TRUE;
       EMIT_ATTR(_TNL_ATTRIB_TEX1, EMIT_2F);
@@ -915,7 +917,7 @@ static void sisRenderStart( GLcontext *ctx )
    }
    FALLBACK(smesa, SIS_FALLBACK_TEXTURE, tex_fallback);
 
-   if (smesa->last_tcl_state != index) {
+   if (!RENDERINPUTS_EQUAL( smesa->last_tcl_state_bitset, index_bitset )) {
       smesa->AGPParseSet = AGPParseSet;
 
       smesa->vertex_size =  _tnl_install_attrs( ctx, smesa->vertex_attrs,