-/* $XFree86: xc/programs/Xserver/hw/xfree86/drivers/via/via_dri.c,v 1.4 2003/09/24 02:43:30 dawes Exp $ */
/*
* Copyright 1998-2003 VIA Technologies, Inc. All Rights Reserved.
* Copyright 2001-2003 S3 Graphics, Inc. All Rights Reserved.
* ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
* DEALINGS IN THE SOFTWARE.
*/
-#if 0
-#include "xf86.h"
-#include "xf86_OSproc.h"
-#include "xf86_ansic.h"
-#include "xf86Priv.h"
-
-#include "xf86PciInfo.h"
-#include "xf86Pci.h"
-
-#define _XF86DRI_SERVER_
-#include "GL/glxtokens.h"
-
-#else
#include <stdio.h>
#include <stdlib.h>
#include "driver.h"
#include "drm.h"
#include "imports.h"
-#endif
#include "dri_util.h"
#include "via_context.h"
#include "via_dri.h"
#include "via_driver.h"
-#include "via_common.h"
#include "xf86drm.h"
static void VIAEnableMMIO(DRIDriverContext * ctx);
/* _SOLO : missing macros normally defined by X code */
#define xf86DrvMsg(a, b, ...) fprintf(stderr, __VA_ARGS__)
-#define MMIO_IN8(base, addr) ((*(((volatile u_int8_t*)base)+(addr)))+0)
-#define MMIO_OUT8(base, addr, val) ((*(((volatile u_int8_t*)base)+(addr)))=((u_int8_t)val))
-#define MMIO_OUT16(base, addr, val) ((*(volatile u_int16_t*)(((u_int8_t*)base)+(addr)))=((u_int16_t)val))
+#define MMIO_IN8(base, addr) ((*(((volatile uint8_t*)base)+(addr)))+0)
+#define MMIO_OUT8(base, addr, val) ((*(((volatile uint8_t*)base)+(addr)))=((uint8_t)val))
+#define MMIO_OUT16(base, addr, val) ((*(volatile uint16_t*)(((uint8_t*)base)+(addr)))=((uint16_t)val))
#define VIDEO 0
#define AGP 1
#define AGP_CMDBUF_SIZE (AGP_PAGE_SIZE * AGP_CMDBUF_PAGES)
static char VIAKernelDriverName[] = "via";
-static char VIAClientDriverName[] = "via";
+static char VIAClientDriverName[] = "unichrome";
static int VIADRIAgpInit(const DRIDriverContext *ctx, VIAPtr pVia);
static int VIADRIPciInit(DRIDriverContext * ctx, VIAPtr pVia);
static int VIADRIAgpInit(const DRIDriverContext *ctx, VIAPtr pVia)
{
unsigned long agp_phys;
- unsigned int agpaddr;
+ drmAddress agpaddr;
VIADRIPtr pVIADRI;
pVIADRI = pVia->devPrivate;
pVia->agpSize = 0;
return GL_FALSE;
}
/* Map AGP from kernel to Xserver - Not really needed */
- drmMap(pVia->drmFD, pVIADRI->agp.handle,pVIADRI->agp.size,
- (drmAddressPtr)&agpaddr);
+ drmMap(pVia->drmFD, pVIADRI->agp.handle,pVIADRI->agp.size, &agpaddr);
-#if 0
- xf86DrvMsg(pScreen->myNum, X_INFO,
- "[drm] agpBase = 0x%08lx\n", pVia->agpBase);
xf86DrvMsg(pScreen->myNum, X_INFO,
"[drm] agpAddr = 0x%08lx\n", pVia->agpAddr);
-#endif
xf86DrvMsg(pScreen->myNum, X_INFO,
"[drm] agpSize = 0x%08lx\n", pVia->agpSize);
xf86DrvMsg(pScreen->myNum, X_INFO,
#if 0
ctx->shared.SAREASize = ((sizeof(drm_sarea_t) + 0xfff) & 0x1000);
#else
- if (sizeof(drm_sarea_t)+sizeof(VIASAREAPriv) > SAREA_MAX) {
+ if (sizeof(drm_sarea_t)+sizeof(drm_via_sarea_t) > SAREA_MAX) {
xf86DrvMsg(pScrn->scrnIndex, X_ERROR,
"Data does not fit in SAREA\n");
return GL_FALSE;
ctx->driverClientMsg = pVIADRI;
ctx->driverClientMsgSize = sizeof(*pVIADRI);
- pVia->IsPCI = !VIADRIAgpInit(ctx, pVia);
-
- if (pVia->IsPCI) {
- VIADRIPciInit(ctx, pVia);
- xf86DrvMsg(pScrn->scrnIndex, X_INFO, "[dri] use pci.\n" );
- }
- else
- xf86DrvMsg(pScrn->scrnIndex, X_INFO, "[dri] use agp.\n" );
-
- if (!(VIADRIFBInit(ctx, pVia))) {
- VIADRICloseScreen(ctx);
- xf86DrvMsg(pScrn->scrnIndex, X_ERROR, "[dri] frame buffer initialize fail .\n" );
- return GL_FALSE;
- }
-
- xf86DrvMsg(pScrn->scrnIndex, X_INFO, "[dri] frame buffer initialized.\n" );
-
/* DRIScreenInit doesn't add all the common mappings. Add additional mappings here. */
if (!VIADRIMapInit(ctx, pVia)) {
VIADRICloseScreen(ctx);
return GL_FALSE;
}
+
pVIADRI->regs.size = VIA_MMIO_REGSIZE;
- pVIADRI->regs.map = 0;
pVIADRI->regs.handle = pVia->registerHandle;
xf86DrvMsg(pScreen->myNum, X_INFO, "[drm] mmio Registers = 0x%08lx\n",
pVIADRI->regs.handle);
-
- /*pVIADRI->drixinerama = pVia->drixinerama;*/
- /*=* John Sheng [2003.12.9] Tuxracer & VQ *=*/
- pVIADRI->VQEnable = pVia->VQEnable;
if (drmMap(pVia->drmFD,
pVIADRI->regs.handle,
xf86DrvMsg(pScrn->scrnIndex, X_INFO, "[dri] mmio mapped.\n" );
+ VIAEnableMMIO(ctx);
+
+ /* Get video memory clock. */
+ VGAOUT8(0x3D4, 0x3D);
+ pVia->MemClk = (VGAIN8(0x3D5) & 0xF0) >> 4;
+ xf86DrvMsg(0, X_INFO, "[dri] MemClk (0x%x)\n", pVia->MemClk);
+
+ /* 3D rendering has noise if not enabled. */
+ VIAEnableExtendedFIFO(ctx);
+
+ VIAInitialize2DEngine(ctx);
+
+ /* Must disable MMIO or 3D won't work. */
+ VIADisableMMIO(ctx);
+
+ VIAInitialize3DEngine(ctx);
+
+ pVia->IsPCI = !VIADRIAgpInit(ctx, pVia);
+
+ if (pVia->IsPCI) {
+ VIADRIPciInit(ctx, pVia);
+ xf86DrvMsg(pScrn->scrnIndex, X_INFO, "[dri] use pci.\n" );
+ }
+ else
+ xf86DrvMsg(pScrn->scrnIndex, X_INFO, "[dri] use agp.\n" );
+
+ if (!(VIADRIFBInit(ctx, pVia))) {
+ VIADRICloseScreen(ctx);
+ xf86DrvMsg(pScrn->scrnIndex, X_ERROR, "[dri] frame buffer initialize fail .\n" );
+ return GL_FALSE;
+ }
+
+ xf86DrvMsg(pScrn->scrnIndex, X_INFO, "[dri] frame buffer initialized.\n" );
+
return VIADRIFinishScreenInit(ctx);
}
/* set SAREA value */
{
- VIASAREAPriv *saPriv;
+ drm_via_sarea_t *saPriv;
- saPriv=(VIASAREAPriv*)(((char*)ctx->pSAREA) +
+ saPriv=(drm_via_sarea_t*)(((char*)ctx->pSAREA) +
sizeof(drm_sarea_t));
assert(saPriv);
memset(saPriv, 0, sizeof(*saPriv));
- saPriv->CtxOwner = -1;
+ saPriv->ctxOwner = -1;
}
pVIADRI=(VIADRIPtr)pVia->devPrivate;
pVIADRI->deviceID=pVia->Chipset;
drmInfo.fb_offset = pVia->FrameBufferBase;
drmInfo.mmio_offset = pVia->registerHandle;
if (pVia->IsPCI)
- drmInfo.agpAddr = (u_int32_t)NULL;
+ drmInfo.agpAddr = (uint32_t)NULL;
else
- drmInfo.agpAddr = (u_int32_t)pVia->agpAddr;
+ drmInfo.agpAddr = (uint32_t)pVia->agpAddr;
if ((drmCommandWrite(pVia->drmFD, DRM_VIA_MAP_INIT,&drmInfo,
sizeof(drm_via_init_t))) < 0)
static void VIADisableExtendedFIFO(DRIDriverContext *ctx)
{
VIAPtr pVia = VIAPTR(ctx);
- u_int32_t dwGE230, dwGE298;
+ uint32_t dwGE230, dwGE298;
/* Cause of exit XWindow will dump back register value, others chipset no
* need to set extended fifo value */
static void VIAEnableExtendedFIFO(DRIDriverContext *ctx)
{
VIAPtr pVia = VIAPTR(ctx);
- u_int8_t bRegTemp;
- u_int32_t dwGE230, dwGE298;
+ uint8_t bRegTemp;
+ uint32_t dwGE230, dwGE298;
switch (pVia->Chipset) {
case VIA_CLE266:
SR1C[7:0], SR1D[1:0] (10bits) *=*/
wRegTemp = (pBIOSInfo->offsetWidthByQWord >> 1) + 4;
VGAOUT8(0x3c4, 0x1c);
- VGAOUT8(0x3c5, (u_int8_t)(wRegTemp & 0xFF));
+ VGAOUT8(0x3c5, (uint8_t)(wRegTemp & 0xFF));
VGAOUT8(0x3c4, 0x1d);
bRegTemp = VGAIN8(0x3c5) & ~0x03;
VGAOUT8(0x3c5, bRegTemp | ((wRegTemp & 0x300) >> 8));
SR1C[7:0], SR1D[1:0] (10bits) *=*/
wRegTemp = (pBIOSInfo->offsetWidthByQWord >> 1) + 4;
VGAOUT8(0x3c4, 0x1c);
- VGAOUT8(0x3c5, (u_int8_t)(wRegTemp & 0xFF));
+ VGAOUT8(0x3c5, (uint8_t)(wRegTemp & 0xFF));
VGAOUT8(0x3c4, 0x1d);
bRegTemp = VGAIN8(0x3c5) & ~0x03;
VGAOUT8(0x3c5, bRegTemp | ((wRegTemp & 0x300) >> 8));
static void VIAInitialize2DEngine(DRIDriverContext *ctx)
{
VIAPtr pVia = VIAPTR(ctx);
- u_int32_t dwVQStartAddr, dwVQEndAddr;
- u_int32_t dwVQLen, dwVQStartL, dwVQEndL, dwVQStartEndH;
- u_int32_t dwGEMode;
+ uint32_t dwVQStartAddr, dwVQEndAddr;
+ uint32_t dwVQLen, dwVQStartL, dwVQEndL, dwVQStartEndH;
+ uint32_t dwGEMode;
/* init 2D engine regs to reset 2D engine */
VIASETREG(0x04, 0x0);
break;
case 32:
dwGEMode |= VIA_GEM_32bpp;
+ break;
default:
dwGEMode |= VIA_GEM_8bpp;
break;
for (i = 0; i <= 0x7D; i++)
{
- VIASETREG(0x440, (u_int32_t) i << 24);
+ VIASETREG(0x440, (uint32_t) i << 24);
}
VIASETREG(0x43C, 0x00020000);
for (i = 0; i <= 0x94; i++)
{
- VIASETREG(0x440, (u_int32_t) i << 24);
+ VIASETREG(0x440, (uint32_t) i << 24);
}
VIASETREG(0x440, 0x82400000);
for (i = 0; i <= 0x94; i++)
{
- VIASETREG(0x440, (u_int32_t) i << 24);
+ VIASETREG(0x440, (uint32_t) i << 24);
}
VIASETREG(0x440, 0x82400000);
for (i = 0; i <= 0x03; i++)
{
- VIASETREG(0x440, (u_int32_t) i << 24);
+ VIASETREG(0x440, (uint32_t) i << 24);
}
VIASETREG(0x43C, 0x00030000);
pVia->Chipset = VIA_KM400;
break;
case PCI_CHIP_VT3204:
+ case PCI_CHIP_VT3344:
pVia->Chipset = VIA_K8M800;
break;
case PCI_CHIP_VT3259:
pVia->FBFreeStart = ctx->shared.virtualWidth * ctx->cpp *
ctx->shared.virtualHeight;
- pVia->FBFreeEnd = pVia->videoRambytes;
-
- if (!VIADRIScreenInit(ctx))
- return 0;
-
- VIAEnableMMIO(ctx);
- /* Get video memory clock. */
- VGAOUT8(0x3D4, 0x3D);
- pVia->MemClk = (VGAIN8(0x3D5) & 0xF0) >> 4;
- xf86DrvMsg(0, X_INFO, "[dri] MemClk (0x%x)\n", pVia->MemClk);
+#if 1
+ /* Alloc a second framebuffer for the second head */
+ pVia->FBFreeStart += ctx->shared.virtualWidth * ctx->cpp *
+ ctx->shared.virtualHeight;
+#endif
- /* 3D rendering has noise if not enabled. */
- VIAEnableExtendedFIFO(ctx);
+ pVia->VQStart = pVia->FBFreeStart;
+ pVia->VQEnd = pVia->FBFreeStart + VIA_VQ_SIZE - 1;
- VIAInitialize2DEngine(ctx);
+ pVia->FBFreeStart += VIA_VQ_SIZE;
- /* Must disable MMIO or 3D won't work. */
- VIADisableMMIO(ctx);
+ pVia->FBFreeEnd = pVia->videoRambytes;
- VIAInitialize3DEngine(ctx);
+ if (!VIADRIScreenInit(ctx))
+ return 0;
return 1;
}
projects / mesa.git / blobdiff