-/* $XFree86: xc/programs/Xserver/hw/xfree86/drivers/via/via_dri.c,v 1.4 2003/09/24 02:43:30 dawes Exp $ */
/*
* Copyright 1998-2003 VIA Technologies, Inc. All Rights Reserved.
* Copyright 2001-2003 S3 Graphics, Inc. All Rights Reserved.
* ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
* DEALINGS IN THE SOFTWARE.
*/
-#if 0
-#include "xf86.h"
-#include "xf86_OSproc.h"
-#include "xf86_ansic.h"
-#include "xf86Priv.h"
-
-#include "xf86PciInfo.h"
-#include "xf86Pci.h"
-
-#define _XF86DRI_SERVER_
-#include "GL/glxtokens.h"
-
-#else
#include <stdio.h>
#include <stdlib.h>
#include "driver.h"
#include "drm.h"
#include "imports.h"
-#endif
#include "dri_util.h"
-#include "sarea.h"
#include "via_context.h"
#include "via_dri.h"
#include "via_driver.h"
-#include "via_common.h"
#include "xf86drm.h"
static void VIAEnableMMIO(DRIDriverContext * ctx);
/* _SOLO : missing macros normally defined by X code */
#define xf86DrvMsg(a, b, ...) fprintf(stderr, __VA_ARGS__)
-#define MMIO_IN8(base, addr) ((*(((volatile CARD8*)base)+(addr)))+0)
-#define MMIO_OUT8(base, addr, val) ((*(((volatile CARD8*)base)+(addr)))=((CARD8)val))
-#define MMIO_OUT16(base, addr, val) ((*(volatile CARD16*)(((CARD8*)base)+(addr)))=((CARD16)val))
+#define MMIO_IN8(base, addr) ((*(((volatile uint8_t*)base)+(addr)))+0)
+#define MMIO_OUT8(base, addr, val) ((*(((volatile uint8_t*)base)+(addr)))=((uint8_t)val))
+#define MMIO_OUT16(base, addr, val) ((*(volatile uint16_t*)(((uint8_t*)base)+(addr)))=((uint16_t)val))
#define VIDEO 0
#define AGP 1
#define AGP_PAGE_SIZE 4096
#define AGP_PAGES 8192
#define AGP_SIZE (AGP_PAGE_SIZE * AGP_PAGES)
-#define AGP_CMDBUF_PAGES 256
+#define AGP_CMDBUF_PAGES 512
#define AGP_CMDBUF_SIZE (AGP_PAGE_SIZE * AGP_CMDBUF_PAGES)
static char VIAKernelDriverName[] = "via";
-static char VIAClientDriverName[] = "via";
+static char VIAClientDriverName[] = "unichrome";
static int VIADRIAgpInit(const DRIDriverContext *ctx, VIAPtr pVia);
static int VIADRIPciInit(DRIDriverContext * ctx, VIAPtr pVia);
static int VIADRIKernelInit(DRIDriverContext * ctx, VIAPtr pVia);
static int VIADRIMapInit(DRIDriverContext * ctx, VIAPtr pVia);
+static void VIADRIIrqInit( DRIDriverContext *ctx )
+{
+ VIAPtr pVia = VIAPTR(ctx);
+ VIADRIPtr pVIADRI = pVia->devPrivate;
+
+ pVIADRI->irqEnabled = drmGetInterruptFromBusID(pVia->drmFD,
+ ctx->pciBus,
+ ctx->pciDevice,
+ ctx->pciFunc);
+
+ if ((drmCtlInstHandler(pVia->drmFD, pVIADRI->irqEnabled))) {
+ xf86DrvMsg(pScreen->myNum, X_WARNING,
+ "[drm] Failure adding irq handler. "
+ "Falling back to irq-free operation.\n");
+ pVIADRI->irqEnabled = 0;
+ }
+
+ if (pVIADRI->irqEnabled)
+ xf86DrvMsg(pScreen->myNum, X_INFO,
+ "[drm] Irq handler installed, using IRQ %d.\n",
+ pVIADRI->irqEnabled);
+}
+
+static void VIADRIIrqExit( DRIDriverContext *ctx ) {
+ VIAPtr pVia = VIAPTR(ctx);
+ VIADRIPtr pVIADRI = pVia->devPrivate;
+
+ if (pVIADRI->irqEnabled) {
+ if (drmCtlUninstHandler(pVia->drmFD)) {
+ xf86DrvMsg(pScreen-myNum, X_INFO,"[drm] Irq handler uninstalled.\n");
+ } else {
+ xf86DrvMsg(pScreen->myNum, X_ERROR,
+ "[drm] Could not uninstall irq handler.\n");
+ }
+ }
+}
+
+static void VIADRIRingBufferCleanup(DRIDriverContext *ctx)
+{
+ VIAPtr pVia = VIAPTR(ctx);
+ VIADRIPtr pVIADRI = pVia->devPrivate;
+ drm_via_dma_init_t ringBufInit;
+
+ if (pVIADRI->ringBufActive) {
+ xf86DrvMsg(pScreen->myNum, X_INFO,
+ "[drm] Cleaning up DMA ring-buffer.\n");
+ ringBufInit.func = VIA_CLEANUP_DMA;
+ if (drmCommandWrite(pVia->drmFD, DRM_VIA_DMA_INIT, &ringBufInit,
+ sizeof(ringBufInit))) {
+ xf86DrvMsg(pScreen->myNum, X_WARNING,
+ "[drm] Failed to clean up DMA ring-buffer: %d\n", errno);
+ }
+ pVIADRI->ringBufActive = 0;
+ }
+}
+
+static int VIADRIRingBufferInit(DRIDriverContext *ctx)
+{
+ VIAPtr pVia = VIAPTR(ctx);
+ VIADRIPtr pVIADRI = pVia->devPrivate;
+ drm_via_dma_init_t ringBufInit;
+ drmVersionPtr drmVer;
+
+ pVIADRI->ringBufActive = 0;
+
+ if (NULL == (drmVer = drmGetVersion(pVia->drmFD))) {
+ return GL_FALSE;
+ }
+
+ if (((drmVer->version_major <= 1) && (drmVer->version_minor <= 3))) {
+ return GL_FALSE;
+ }
+
+ /*
+ * Info frome code-snippet on DRI-DEVEL list; Erdi Chen.
+ */
+
+ switch (pVia->ChipId) {
+ case PCI_CHIP_VT3259:
+ ringBufInit.reg_pause_addr = 0x40c;
+ break;
+ default:
+ ringBufInit.reg_pause_addr = 0x418;
+ break;
+ }
+
+ ringBufInit.offset = pVia->agpSize;
+ ringBufInit.size = AGP_CMDBUF_SIZE;
+ ringBufInit.func = VIA_INIT_DMA;
+ if (drmCommandWrite(pVia->drmFD, DRM_VIA_DMA_INIT, &ringBufInit,
+ sizeof(ringBufInit))) {
+ xf86DrvMsg(pScreen->myNum, X_ERROR,
+ "[drm] Failed to initialize DMA ring-buffer: %d\n", errno);
+ return GL_FALSE;
+ }
+ xf86DrvMsg(pScreen->myNum, X_INFO,
+ "[drm] Initialized AGP ring-buffer, size 0x%lx at AGP offset 0x%lx.\n",
+ ringBufInit.size, ringBufInit.offset);
+
+ pVIADRI->ringBufActive = 1;
+ return GL_TRUE;
+}
+
static int VIADRIAgpInit(const DRIDriverContext *ctx, VIAPtr pVia)
{
unsigned long agp_phys;
- unsigned int agpaddr;
+ drmAddress agpaddr;
VIADRIPtr pVIADRI;
pVIADRI = pVia->devPrivate;
pVia->agpSize = 0;
if (drmAgpAcquire(pVia->drmFD) < 0) {
xf86DrvMsg(pScreen->myNum, X_ERROR, "[drm] drmAgpAcquire failed %d\n", errno);
- return FALSE;
+ return GL_FALSE;
}
if (drmAgpEnable(pVia->drmFD, drmAgpGetMode(pVia->drmFD)&~0x0) < 0) {
xf86DrvMsg(pScreen->myNum, X_ERROR, "[drm] drmAgpEnable failed\n");
- return FALSE;
+ return GL_FALSE;
}
xf86DrvMsg(pScreen->myNum, X_INFO, "[drm] drmAgpEnabled succeeded\n");
xf86DrvMsg(pScreen->myNum, X_ERROR,
"[drm] drmAgpAlloc failed\n");
drmAgpRelease(pVia->drmFD);
- return FALSE;
+ return GL_FALSE;
}
if (drmAgpBind(pVia->drmFD, pVia->agpHandle, 0) < 0) {
drmAgpFree(pVia->drmFD, pVia->agpHandle);
drmAgpRelease(pVia->drmFD);
- return FALSE;
+ return GL_FALSE;
}
- pVia->agpSize = AGP_SIZE;
+ /*
+ * Place the ring-buffer last in the AGP region, and restrict the
+ * public map not to include the buffer for security reasons.
+ */
+
+ pVia->agpSize = AGP_SIZE - AGP_CMDBUF_SIZE;
pVia->agpAddr = drmAgpBase(pVia->drmFD);
xf86DrvMsg(pScreen->myNum, X_INFO,
"[drm] agpAddr = 0x%08lx\n",pVia->agpAddr);
pVIADRI->agp.size = pVia->agpSize;
- if (drmAddMap(pVia->drmFD, (drmHandle)0,
+ if (drmAddMap(pVia->drmFD, (drm_handle_t)0,
pVIADRI->agp.size, DRM_AGP, 0,
&pVIADRI->agp.handle) < 0) {
xf86DrvMsg(pScreen->myNum, X_ERROR,
"[drm] Failed to map public agp area\n");
pVIADRI->agp.size = 0;
- return FALSE;
+ return GL_FALSE;
}
/* Map AGP from kernel to Xserver - Not really needed */
- drmMap(pVia->drmFD, pVIADRI->agp.handle,pVIADRI->agp.size,
- (drmAddressPtr)&agpaddr);
+ drmMap(pVia->drmFD, pVIADRI->agp.handle,pVIADRI->agp.size, &agpaddr);
-#if 0
- xf86DrvMsg(pScreen->myNum, X_INFO,
- "[drm] agpBase = 0x%08lx\n", pVia->agpBase);
xf86DrvMsg(pScreen->myNum, X_INFO,
"[drm] agpAddr = 0x%08lx\n", pVia->agpAddr);
-#endif
xf86DrvMsg(pScreen->myNum, X_INFO,
"[drm] agpSize = 0x%08lx\n", pVia->agpSize);
xf86DrvMsg(pScreen->myNum, X_INFO,
"[drm] agp physical addr = 0x%08lx\n", agp_phys);
- drmVIAAgpInit(pVia->drmFD, 0, AGP_SIZE);
- return TRUE;
+ {
+ drm_via_agp_t agp;
+ agp.offset = 0;
+ agp.size = AGP_SIZE-AGP_CMDBUF_SIZE;
+ if (drmCommandWrite(pVia->drmFD, DRM_VIA_AGP_INIT, &agp,
+ sizeof(drm_via_agp_t)) < 0) {
+ drmUnmap(&agpaddr,pVia->agpSize);
+ drmRmMap(pVia->drmFD,pVIADRI->agp.handle);
+ drmAgpUnbind(pVia->drmFD, pVia->agpHandle);
+ drmAgpFree(pVia->drmFD, pVia->agpHandle);
+ drmAgpRelease(pVia->drmFD);
+ return GL_FALSE;
+ }
+ }
+ return GL_TRUE;
}
static int VIADRIFBInit(DRIDriverContext * ctx, VIAPtr pVia)
pVIADRI->fbOffset = FBOffset;
pVIADRI->fbSize = pVia->videoRambytes;
- if (drmVIAFBInit(pVia->drmFD, FBOffset, FBSize) < 0) {
- xf86DrvMsg(pScreen->myNum, X_ERROR,"[drm] failed to init frame buffer area\n");
- return FALSE;
- }
- else {
- xf86DrvMsg(pScreen->myNum, X_INFO,"[drm] FBFreeStart= 0x%08lx FBFreeEnd= 0x%08lx FBSize= 0x%08lx\n", pVia->FBFreeStart, pVia->FBFreeEnd, FBSize);
- return TRUE;
+ {
+ drm_via_fb_t fb;
+ fb.offset = FBOffset;
+ fb.size = FBSize;
+
+ if (drmCommandWrite(pVia->drmFD, DRM_VIA_FB_INIT, &fb,
+ sizeof(drm_via_fb_t)) < 0) {
+ xf86DrvMsg(pScreen->myNum, X_ERROR,
+ "[drm] failed to init frame buffer area\n");
+ return GL_FALSE;
+ } else {
+ xf86DrvMsg(pScreen->myNum, X_INFO,
+ "[drm] FBFreeStart= 0x%08x FBFreeEnd= 0x%08x "
+ "FBSize= 0x%08x\n",
+ pVia->FBFreeStart, pVia->FBFreeEnd, FBSize);
+ return GL_TRUE;
+ }
}
}
static int VIADRIPciInit(DRIDriverContext * ctx, VIAPtr pVia)
{
- return TRUE;
+ return GL_TRUE;
}
static int VIADRIScreenInit(DRIDriverContext * ctx)
int err;
#if 0
- ctx->shared.SAREASize = ((sizeof(XF86DRISAREARec) + 0xfff) & 0x1000);
+ ctx->shared.SAREASize = ((sizeof(drm_sarea_t) + 0xfff) & 0x1000);
#else
- if (sizeof(XF86DRISAREARec)+sizeof(VIASAREAPriv) > SAREA_MAX) {
+ if (sizeof(drm_sarea_t)+sizeof(drm_via_sarea_t) > SAREA_MAX) {
xf86DrvMsg(pScrn->scrnIndex, X_ERROR,
"Data does not fit in SAREA\n");
- return FALSE;
+ return GL_FALSE;
}
ctx->shared.SAREASize = SAREA_MAX;
#endif
/* Need to AddMap the framebuffer and mmio regions here:
*/
if (drmAddMap(ctx->drmFD,
- (drmHandle)ctx->FBStart,
+ (drm_handle_t)ctx->FBStart,
ctx->FBSize,
DRM_FRAME_BUFFER,
#ifndef _EMBEDDED
pVIADRI = (VIADRIPtr) CALLOC(sizeof(VIADRIRec));
if (!pVIADRI) {
drmClose(ctx->drmFD);
- return FALSE;
+ return GL_FALSE;
}
pVia->devPrivate = pVIADRI;
ctx->driverClientMsg = pVIADRI;
ctx->driverClientMsgSize = sizeof(*pVIADRI);
- pVia->IsPCI = !VIADRIAgpInit(ctx, pVia);
-
- if (pVia->IsPCI) {
- VIADRIPciInit(ctx, pVia);
- xf86DrvMsg(pScrn->scrnIndex, X_INFO, "[dri] use pci.\n" );
- }
- else
- xf86DrvMsg(pScrn->scrnIndex, X_INFO, "[dri] use agp.\n" );
-
- if (!(VIADRIFBInit(ctx, pVia))) {
- VIADRICloseScreen(ctx);
- xf86DrvMsg(pScrn->scrnIndex, X_ERROR, "[dri] frame buffer initialize fial .\n" );
- return FALSE;
- }
-
- xf86DrvMsg(pScrn->scrnIndex, X_INFO, "[dri] frame buffer initialized.\n" );
-
/* DRIScreenInit doesn't add all the common mappings. Add additional mappings here. */
if (!VIADRIMapInit(ctx, pVia)) {
VIADRICloseScreen(ctx);
- return FALSE;
+ return GL_FALSE;
}
+
pVIADRI->regs.size = VIA_MMIO_REGSIZE;
- pVIADRI->regs.map = 0;
pVIADRI->regs.handle = pVia->registerHandle;
xf86DrvMsg(pScreen->myNum, X_INFO, "[drm] mmio Registers = 0x%08lx\n",
pVIADRI->regs.handle);
-
- /*pVIADRI->drixinerama = pVia->drixinerama;*/
- /*=* John Sheng [2003.12.9] Tuxracer & VQ *=*/
- pVIADRI->VQEnable = pVia->VQEnable;
if (drmMap(pVia->drmFD,
pVIADRI->regs.handle,
(drmAddress *)&pVia->MapBase) != 0)
{
VIADRICloseScreen(ctx);
- return FALSE;
+ return GL_FALSE;
}
xf86DrvMsg(pScrn->scrnIndex, X_INFO, "[dri] mmio mapped.\n" );
+ VIAEnableMMIO(ctx);
+
+ /* Get video memory clock. */
+ VGAOUT8(0x3D4, 0x3D);
+ pVia->MemClk = (VGAIN8(0x3D5) & 0xF0) >> 4;
+ xf86DrvMsg(0, X_INFO, "[dri] MemClk (0x%x)\n", pVia->MemClk);
+
+ /* 3D rendering has noise if not enabled. */
+ VIAEnableExtendedFIFO(ctx);
+
+ VIAInitialize2DEngine(ctx);
+
+ /* Must disable MMIO or 3D won't work. */
+ VIADisableMMIO(ctx);
+
+ VIAInitialize3DEngine(ctx);
+
+ pVia->IsPCI = !VIADRIAgpInit(ctx, pVia);
+
+ if (pVia->IsPCI) {
+ VIADRIPciInit(ctx, pVia);
+ xf86DrvMsg(pScrn->scrnIndex, X_INFO, "[dri] use pci.\n" );
+ }
+ else
+ xf86DrvMsg(pScrn->scrnIndex, X_INFO, "[dri] use agp.\n" );
+
+ if (!(VIADRIFBInit(ctx, pVia))) {
+ VIADRICloseScreen(ctx);
+ xf86DrvMsg(pScrn->scrnIndex, X_ERROR, "[dri] frame buffer initialize fail .\n" );
+ return GL_FALSE;
+ }
+
+ xf86DrvMsg(pScrn->scrnIndex, X_INFO, "[dri] frame buffer initialized.\n" );
+
return VIADRIFinishScreenInit(ctx);
}
VIAPtr pVia = VIAPTR(ctx);
VIADRIPtr pVIADRI=(VIADRIPtr)pVia->devPrivate;
+ VIADRIRingBufferCleanup(ctx);
+
if (pVia->MapBase) {
xf86DrvMsg(pScreen->myNum, X_INFO, "[drm] Unmapping MMIO registers\n");
drmUnmap(pVia->MapBase, pVIADRI->regs.size);
xf86DrvMsg(pScreen->myNum, X_INFO, "[drm] Releasing agp module\n");
drmAgpRelease(pVia->drmFD);
}
+
+#if 0
+ if (pVia->DRIIrqEnable)
+#endif
+ VIADRIIrqExit(ctx);
}
static int
err = drmCreateContext(ctx->drmFD, &ctx->serverContext);
if (err != 0) {
fprintf(stderr, "%s: drmCreateContext failed %d\n", __FUNCTION__, err);
- return FALSE;
+ return GL_FALSE;
}
DRM_LOCK(ctx->drmFD, ctx->pSAREA, ctx->serverContext, 0);
if (!VIADRIKernelInit(ctx, pVia)) {
VIADRICloseScreen(ctx);
- return FALSE;
+ return GL_FALSE;
}
xf86DrvMsg(pScreen->myNum, X_INFO, "[dri] kernel data initialized.\n");
/* set SAREA value */
{
- VIASAREAPriv *saPriv;
+ drm_via_sarea_t *saPriv;
- saPriv=(VIASAREAPriv*)(((char*)ctx->pSAREA) +
- sizeof(XF86DRISAREARec));
+ saPriv=(drm_via_sarea_t*)(((char*)ctx->pSAREA) +
+ sizeof(drm_sarea_t));
assert(saPriv);
memset(saPriv, 0, sizeof(*saPriv));
- saPriv->CtxOwner = -1;
+ saPriv->ctxOwner = -1;
}
pVIADRI=(VIADRIPtr)pVia->devPrivate;
pVIADRI->deviceID=pVia->Chipset;
pVIADRI->height=ctx->shared.virtualHeight;
pVIADRI->mem=ctx->shared.fbSize;
pVIADRI->bytesPerPixel= (ctx->bpp+7) / 8;
- pVIADRI->sarea_priv_offset = sizeof(XF86DRISAREARec);
+ pVIADRI->sarea_priv_offset = sizeof(drm_sarea_t);
/* TODO */
pVIADRI->scrnX=pVIADRI->width;
pVIADRI->scrnY=pVIADRI->height;
- return TRUE;
+ /* Initialize IRQ */
+#if 0
+ if (pVia->DRIIrqEnable)
+#endif
+ VIADRIIrqInit(ctx);
+
+ pVIADRI->ringBufActive = 0;
+ VIADRIRingBufferInit(ctx);
+
+ return GL_TRUE;
}
/* Initialize the kernel data structures. */
static int VIADRIKernelInit(DRIDriverContext * ctx, VIAPtr pVia)
{
- drmVIAInit drmInfo;
- memset(&drmInfo, 0, sizeof(drmVIAInit));
- drmInfo.sarea_priv_offset = sizeof(XF86DRISAREARec);
+ drm_via_init_t drmInfo;
+ memset(&drmInfo, 0, sizeof(drm_via_init_t));
+ drmInfo.sarea_priv_offset = sizeof(drm_sarea_t);
+ drmInfo.func = VIA_INIT_MAP;
drmInfo.fb_offset = pVia->FrameBufferBase;
drmInfo.mmio_offset = pVia->registerHandle;
if (pVia->IsPCI)
- drmInfo.agpAddr = (CARD32)NULL;
+ drmInfo.agpAddr = (uint32_t)NULL;
else
- drmInfo.agpAddr = (CARD32)pVia->agpAddr;
+ drmInfo.agpAddr = (uint32_t)pVia->agpAddr;
- if (drmVIAInitMAP(pVia->drmFD, &drmInfo) < 0) return FALSE;
+ if ((drmCommandWrite(pVia->drmFD, DRM_VIA_MAP_INIT,&drmInfo,
+ sizeof(drm_via_init_t))) < 0)
+ return GL_FALSE;
- return TRUE;
+ return GL_TRUE;
}
/* Add a map for the MMIO registers */
static int VIADRIMapInit(DRIDriverContext * ctx, VIAPtr pVia)
if (drmAddMap(pVia->drmFD, pVia->MmioBase, VIA_MMIO_REGSIZE,
DRM_REGISTERS, flags, &pVia->registerHandle) < 0) {
- return FALSE;
+ return GL_FALSE;
}
xf86DrvMsg(pScreen->myNum, X_INFO,
"[drm] register handle = 0x%08lx\n", pVia->registerHandle);
- return TRUE;
-}
-
-const __GLcontextModes __glModes[] =
-{
- /* 32 bit, RGBA Depth=16 Stencil=8 */
- {.rgbMode = GL_TRUE, .colorIndexMode = GL_FALSE, .doubleBufferMode = GL_TRUE, .stereoMode = GL_FALSE,
- .haveAccumBuffer = GL_FALSE, .haveDepthBuffer = GL_TRUE, .haveStencilBuffer = GL_TRUE,
- .redBits = 8, .greenBits = 8, .blueBits = 8, .alphaBits = 8,
- .redMask = 0xff0000, .greenMask = 0xff00, .blueMask = 0xff, .alphaMask = 0xff000000,
- .rgbBits = 32, .indexBits = 0,
- .accumRedBits = 0, .accumGreenBits = 0, .accumBlueBits = 0, .accumAlphaBits = 0,
- .depthBits = 16, .stencilBits = 8,
- .numAuxBuffers= 0, .level = 0, .pixmapMode = GL_TRUE, },
-
-#if 0
- /* 16 bit, RGB Depth=16 */
- {.rgbMode = GL_TRUE, .colorIndexMode = GL_FALSE, .doubleBufferMode = GL_TRUE, .stereoMode = GL_FALSE,
- .haveAccumBuffer = GL_FALSE, .haveDepthBuffer = GL_TRUE, .haveStencilBuffer = GL_FALSE,
- .redBits = 5, .greenBits = 6, .blueBits = 5, .alphaBits = 0,
- .redMask = 0xf800, .greenMask = 0x07e0, .blueMask = 0x001f, .alphaMask = 0x0,
- .rgbBits = 16, .indexBits = 0,
- .accumRedBits = 0, .accumGreenBits = 0, .accumBlueBits = 0, .accumAlphaBits = 0,
- .depthBits = 16, .stencilBits = 0,
- .numAuxBuffers= 0, .level = 0, .pixmapMode = GL_TRUE, },
-#endif
-};
-
-static int viaInitContextModes(const DRIDriverContext *ctx,
- int *numModes, const __GLcontextModes **modes)
-{
- *numModes = sizeof(__glModes)/sizeof(__GLcontextModes *);
- *modes = &__glModes[0];
- return 1;
+ return GL_TRUE;
}
static int viaValidateMode(const DRIDriverContext *ctx)
static void VIADisableExtendedFIFO(DRIDriverContext *ctx)
{
VIAPtr pVia = VIAPTR(ctx);
- CARD32 dwGE230, dwGE298;
+ uint32_t dwGE230, dwGE298;
/* Cause of exit XWindow will dump back register value, others chipset no
* need to set extended fifo value */
static void VIAEnableExtendedFIFO(DRIDriverContext *ctx)
{
VIAPtr pVia = VIAPTR(ctx);
- CARD8 bRegTemp;
- CARD32 dwGE230, dwGE298;
+ uint8_t bRegTemp;
+ uint32_t dwGE230, dwGE298;
switch (pVia->Chipset) {
case VIA_CLE266:
bRegTemp &= ~0x7F;
bRegTemp |= 0x3F;
VGAOUT8(0x3C5, bRegTemp);
- pVia->EnableExtendedFIFO = TRUE;
+ pVia->EnableExtendedFIFO = GL_TRUE;
}
}
else /* Single view or Simultaneoue case */
bRegTemp &= ~0x7F;
bRegTemp |= 0x2F;
VGAOUT8(0x3C5, bRegTemp);
- pVia->EnableExtendedFIFO = TRUE;
+ pVia->EnableExtendedFIFO = GL_TRUE;
}
}
/* 3c5.18[0:5] */
bRegTemp |= 0x17;
bRegTemp |= 0x40; /* force the preq always higher than treq */
VGAOUT8(0x3C5, bRegTemp);
- pVia->EnableExtendedFIFO = TRUE;
+ pVia->EnableExtendedFIFO = GL_TRUE;
}
}
break;
bRegTemp |= 0x17;
bRegTemp |= 0x40; /* force the preq always higher than treq */
VGAOUT8(0x3C5, bRegTemp);
- pVia->EnableExtendedFIFO = TRUE;
+ pVia->EnableExtendedFIFO = GL_TRUE;
}
else {
if ( (ctx->shared.virtualWidth > 1024) && (ctx->shared.virtualWidth <= 1280) )
bRegTemp &= ~0x3F;
bRegTemp = (bRegTemp) | (0x17);
VGAOUT8(0x3C5, bRegTemp);
- pVia->EnableExtendedFIFO = TRUE;
+ pVia->EnableExtendedFIFO = GL_TRUE;
}
else if ((ctx->shared.virtualWidth > 1280))
{
bRegTemp &= ~0x3F;
bRegTemp = (bRegTemp) | (0x1C);
VGAOUT8(0x3C5, bRegTemp);
- pVia->EnableExtendedFIFO = TRUE;
+ pVia->EnableExtendedFIFO = GL_TRUE;
}
else
{
SR1C[7:0], SR1D[1:0] (10bits) *=*/
wRegTemp = (pBIOSInfo->offsetWidthByQWord >> 1) + 4;
VGAOUT8(0x3c4, 0x1c);
- VGAOUT8(0x3c5, (CARD8)(wRegTemp & 0xFF));
+ VGAOUT8(0x3c5, (uint8_t)(wRegTemp & 0xFF));
VGAOUT8(0x3c4, 0x1d);
bRegTemp = VGAIN8(0x3c5) & ~0x03;
VGAOUT8(0x3c5, bRegTemp | ((wRegTemp & 0x300) >> 8));
SR1C[7:0], SR1D[1:0] (10bits) *=*/
wRegTemp = (pBIOSInfo->offsetWidthByQWord >> 1) + 4;
VGAOUT8(0x3c4, 0x1c);
- VGAOUT8(0x3c5, (CARD8)(wRegTemp & 0xFF));
+ VGAOUT8(0x3c5, (uint8_t)(wRegTemp & 0xFF));
VGAOUT8(0x3c4, 0x1d);
bRegTemp = VGAIN8(0x3c5) & ~0x03;
VGAOUT8(0x3c5, bRegTemp | ((wRegTemp & 0x300) >> 8));
static void VIAInitialize2DEngine(DRIDriverContext *ctx)
{
VIAPtr pVia = VIAPTR(ctx);
- CARD32 dwVQStartAddr, dwVQEndAddr;
- CARD32 dwVQLen, dwVQStartL, dwVQEndL, dwVQStartEndH;
- CARD32 dwGEMode;
+ uint32_t dwVQStartAddr, dwVQEndAddr;
+ uint32_t dwVQLen, dwVQStartL, dwVQEndL, dwVQStartEndH;
+ uint32_t dwGEMode;
/* init 2D engine regs to reset 2D engine */
VIASETREG(0x04, 0x0);
break;
case 32:
dwGEMode |= VIA_GEM_32bpp;
+ break;
default:
dwGEMode |= VIA_GEM_8bpp;
break;
for (i = 0; i <= 0x7D; i++)
{
- VIASETREG(0x440, (CARD32) i << 24);
+ VIASETREG(0x440, (uint32_t) i << 24);
}
VIASETREG(0x43C, 0x00020000);
for (i = 0; i <= 0x94; i++)
{
- VIASETREG(0x440, (CARD32) i << 24);
+ VIASETREG(0x440, (uint32_t) i << 24);
}
VIASETREG(0x440, 0x82400000);
for (i = 0; i <= 0x94; i++)
{
- VIASETREG(0x440, (CARD32) i << 24);
+ VIASETREG(0x440, (uint32_t) i << 24);
}
VIASETREG(0x440, 0x82400000);
for (i = 0; i <= 0x03; i++)
{
- VIASETREG(0x440, (CARD32) i << 24);
+ VIASETREG(0x440, (uint32_t) i << 24);
}
VIASETREG(0x43C, 0x00030000);
pVia->Chipset = VIA_KM400;
break;
case PCI_CHIP_VT3204:
+ case PCI_CHIP_VT3344:
pVia->Chipset = VIA_K8M800;
break;
case PCI_CHIP_VT3259:
pVia->FBFreeStart = ctx->shared.virtualWidth * ctx->cpp *
ctx->shared.virtualHeight;
- pVia->FBFreeEnd = pVia->videoRambytes;
- if (!VIADRIScreenInit(ctx))
- return 0;
+#if 1
+ /* Alloc a second framebuffer for the second head */
+ pVia->FBFreeStart += ctx->shared.virtualWidth * ctx->cpp *
+ ctx->shared.virtualHeight;
+#endif
- VIAEnableMMIO(ctx);
+ pVia->VQStart = pVia->FBFreeStart;
+ pVia->VQEnd = pVia->FBFreeStart + VIA_VQ_SIZE - 1;
- /* Get video memory clock. */
- VGAOUT8(0x3D4, 0x3D);
- pVia->MemClk = (VGAIN8(0x3D5) & 0xF0) >> 4;
- xf86DrvMsg(0, X_INFO, "[dri] MemClk (0x%x)\n", pVia->MemClk);
-
- /* 3D rendering has noise if not enabled. */
- VIAEnableExtendedFIFO(ctx);
+ pVia->FBFreeStart += VIA_VQ_SIZE;
- VIAInitialize2DEngine(ctx);
-
- /* Must disable MMIO or 3D won't work. */
- VIADisableMMIO(ctx);
+ pVia->FBFreeEnd = pVia->videoRambytes;
- VIAInitialize3DEngine(ctx);
+ if (!VIADRIScreenInit(ctx))
+ return 0;
return 1;
}
const struct DRIDriverRec __driDriver =
{
- viaInitContextModes,
viaValidateMode,
viaPostValidateMode,
viaInitFBDev,
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