i965: don't use disk cache with SPIR-V shaders

[mesa.git] / src / mesa / main / format_info.py

diff --git a/src/mesa/main/format_info.py b/src/mesa/main/format_info.py
index 00e27b3fba5b79379469ef576619a94a7db9364d..94017bfae0f55d5711df2fc239b5317b9a87d0c6 100644 (file)
--- a/src/mesa/main/format_info.py
+++ b/src/mesa/main/format_info.py
@@ -126,6 +126,8 @@ def get_channel_bits(fmat, chan_name):
       elif fmat.layout == 'astc':
          bits = 16 if 'RGBA' in fmat.name else 8
          return bits if fmat.has_channel(chan_name) else 0
+      elif fmat.layout == 'atc':
+         return 8 if fmat.has_channel(chan_name) else 0
       else:
          assert False
    else: