Merge vtx-0-2-branch

[mesa.git] / src / mesa / main / nvvertprog.h

diff --git a/src/mesa/main/nvvertprog.h b/src/mesa/main/nvvertprog.h
index 331d373c48a62ca29098a2c735e5e251a817d6d4..820b3e5692bd5ae2f43bcfbab00e113585e0ec5b 100644 (file)
--- a/src/mesa/main/nvvertprog.h
+++ b/src/mesa/main/nvvertprog.h
@@ -1,5 +1,3 @@
-/* $Id: nvvertprog.h,v 1.1 2003/01/14 04:55:46 brianp Exp $ */
-
 /*
  * Mesa 3-D graphics library
  * Version:  5.1
@@ -27,28 +25,15 @@
 
 /* Private vertex program types and constants only used by files
  * related to vertex programs.
+ *
+ * XXX TO-DO: Rename this file "vertprog.h" since it's not NV-specific.
  */
 
+
 #ifndef NVVERTPROG_H
 #define NVVERTPROG_H
 
 
-#define VP_NUM_INPUT_REGS   MAX_NV_VERTEX_PROGRAM_INPUTS
-#define VP_NUM_OUTPUT_REGS  MAX_NV_VERTEX_PROGRAM_INPUTS
-#define VP_NUM_TEMP_REGS    MAX_NV_VERTEX_PROGRAM_TEMPS
-#define VP_NUM_PROG_REGS    MAX_NV_VERTEX_PROGRAM_PARAMS
-
-/* Location of register groups within the whole register file */
-#define VP_INPUT_REG_START  0
-#define VP_INPUT_REG_END    (VP_INPUT_REG_START + VP_NUM_INPUT_REGS - 1)
-#define VP_OUTPUT_REG_START (VP_INPUT_REG_END + 1)
-#define VP_OUTPUT_REG_END   (VP_OUTPUT_REG_START + VP_NUM_OUTPUT_REGS - 1)
-#define VP_TEMP_REG_START   (VP_OUTPUT_REG_END + 1)
-#define VP_TEMP_REG_END     (VP_TEMP_REG_START + VP_NUM_TEMP_REGS - 1)
-#define VP_PROG_REG_START   (VP_TEMP_REG_END + 1)
-#define VP_PROG_REG_END     (VP_PROG_REG_START + VP_NUM_PROG_REGS - 1)
-
-
 /* Vertex program opcodes */
 enum vp_opcode
 {
@@ -73,15 +58,26 @@ enum vp_opcode
    VP_OPCODE_RCC,
    VP_OPCODE_SUB,
    VP_OPCODE_ABS,
-   VP_OPCODE_END
+   VP_OPCODE_END,
+   /* Additional opcodes for GL_ARB_vertex_program */ 
+   VP_OPCODE_FLR,
+   VP_OPCODE_FRC,
+   VP_OPCODE_EX2,
+   VP_OPCODE_LG2,
+   VP_OPCODE_POW,
+   VP_OPCODE_XPD,
+   VP_OPCODE_SWZ
 };
 
 
+
 /* Instruction source register */
 struct vp_src_register
 {
-   GLint Register;    /* or the offset from the address register */
-   GLuint Swizzle[4];
+   enum register_file File;  /* which register file */
+   GLint Index;              /* index into register file */
+   GLubyte Swizzle[4]; /* Each value is 0,1,2,3 for x,y,z,w or */
+                       /* SWIZZLE_ZERO or SWIZZLE_ONE for VP_OPCODE_SWZ. */
    GLboolean Negate;
    GLboolean RelAddr;
 };
@@ -90,7 +86,8 @@ struct vp_src_register
 /* Instruction destination register */
 struct vp_dst_register
 {
-   GLint Register;
+   enum register_file File;  /* which register file */
+   GLint Index;              /* index into register file */
    GLboolean WriteMask[4];
 };
 
@@ -101,6 +98,9 @@ struct vp_instruction
    enum vp_opcode Opcode;
    struct vp_src_register SrcReg[3];
    struct vp_dst_register DstReg;
+#if FEATURE_MESA_program_debug
+   GLint StringPos;
+#endif
 };