radeon: Make RADEON_CMDBUF more fine grained.

[mesa.git] / src / mesa / math / m_debug_util.h

diff --git a/src/mesa/math/m_debug_util.h b/src/mesa/math/m_debug_util.h
index f7ce4679b6d5ea4c3f73eb49e41a5f65f0bd2095..2e67db8e55d61ae584bcce3332731af112f96a49 100644 (file)
--- a/src/mesa/math/m_debug_util.h
+++ b/src/mesa/math/m_debug_util.h
@@ -185,7 +185,7 @@ extern char *mesa_profile;
 
 #endif
 
-#elif defined(__amd64__)
+#elif defined(__x86_64__)
 
 #define rdtscll(val) do { \
      unsigned int a,d; \
@@ -231,8 +231,8 @@ extern char *mesa_profile;
 #define  BEGIN_RACE(x)                                                        \
 x = LONG_MAX;                                                                 \
 for (cycle_i = 0; cycle_i <10; cycle_i++) {                                   \
-   register long cycle_tmp1 asm("l0");                                       \
-   register long cycle_tmp2 asm("l1");                                       \
+   register long cycle_tmp1 __asm__("l0");                                   \
+   register long cycle_tmp2 __asm__("l1");                                   \
    /* rd %tick, %l0 */                                                       \
    __asm__ __volatile__ (".word 0xa1410000" : "=r" (cycle_tmp1));  /*  save timestamp   */
 
@@ -303,7 +303,7 @@ enum { NIL = 0, ONE = 1, NEG = -1, VAR = 2 };
  */
 #if defined(__GNUC__)
 #  define ALIGN16(type, array) type array __attribute__ ((aligned (16)))
-#elif defined(__MSC__)
+#elif defined(_MSC_VER)
 #  define ALIGN16(type, array) type array __declspec(align(16)) /* GH: Does this work? */
 #elif defined(__WATCOMC__)
 #  define ALIGN16(type, array)                     /* Watcom does not support this */