case PIPE_FORMAT_TYPE_UNORM:
return NV40TCL_VTXFMT_TYPE_UBYTE;
default:
- assert(0);
+ NOUVEAU_ERR("Unknown format 0x%08x\n", format);
+ return NV40TCL_VTXFMT_TYPE_FLOAT;
}
}
num_hw++;
vtxbuf = so_new(20, 18);
- so_method(vtxbuf, nv40->curie, NV40TCL_VTXBUF_ADDRESS(0), num_hw);
+ so_method(vtxbuf, nv40->hw->curie, NV40TCL_VTXBUF_ADDRESS(0), num_hw);
vtxfmt = so_new(17, 0);
- so_method(vtxfmt, nv40->curie, NV40TCL_VTXFMT(0), num_hw);
+ so_method(vtxfmt, nv40->hw->curie, NV40TCL_VTXFMT(0), num_hw);
inputs = vp->ir;
for (hw = 0; hw < num_hw; hw++) {
}
if (ib) {
- so_method(vtxbuf, nv40->curie, NV40TCL_IDXBUF_ADDRESS, 2);
+ so_method(vtxbuf, nv40->hw->curie, NV40TCL_IDXBUF_ADDRESS, 2);
so_reloc (vtxbuf, ib, 0, vb_flags | NOUVEAU_BO_LOW, 0, 0);
so_reloc (vtxbuf, ib, ib_format, vb_flags | NOUVEAU_BO_OR,
0, NV40TCL_IDXBUF_FORMAT_DMA1);
so_emit(nv40->nvws, vtxfmt);
so_emit(nv40->nvws, vtxbuf);
so_ref (vtxbuf, &nv40->so_vtxbuf);
+ so_ref (NULL, &vtxbuf);
so_ref (NULL, &vtxfmt);
}
nv40_vbo_validate_state(struct nv40_context *nv40,
struct pipe_buffer *ib, unsigned ib_format)
{
+ unsigned vdn = nv40->dirty & NV40_NEW_ARRAYS;
+
nv40_emit_hw_state(nv40);
- if (nv40->dirty & NV40_NEW_ARRAYS || ib) {
+ if (vdn || ib) {
nv40_vbo_arrays_update(nv40, ib, ib_format);
nv40->dirty &= ~NV40_NEW_ARRAYS;
}
{
struct nv40_context *nv40 = nv40_context(pipe);
unsigned nr;
+ boolean ret;
- assert(nv40_vbo_validate_state(nv40, NULL, 0));
+ ret = nv40_vbo_validate_state(nv40, NULL, 0);
+ if (!ret) {
+ NOUVEAU_ERR("state validate failed\n");
+ return FALSE;
+ }
BEGIN_RING(curie, NV40TCL_BEGIN_END, 1);
OUT_RING (nvgl_primitive(mode));
}
while (count) {
- push = MIN2(count, 2046);
+ push = MIN2(count, 2047 * 2);
- BEGIN_RING_NI(curie, NV40TCL_VB_ELEMENT_U16, push);
+ BEGIN_RING_NI(curie, NV40TCL_VB_ELEMENT_U16, push >> 1);
for (i = 0; i < push; i+=2)
OUT_RING((elts[i+1] << 16) | elts[i]);
}
while (count) {
- push = MIN2(count, 2046);
+ push = MIN2(count, 2047 * 2);
- BEGIN_RING_NI(curie, NV40TCL_VB_ELEMENT_U16, push);
+ BEGIN_RING_NI(curie, NV40TCL_VB_ELEMENT_U16, push >> 1);
for (i = 0; i < push; i+=2)
OUT_RING((elts[i+1] << 16) | elts[i]);
{
struct nv40_context *nv40 = nv40_context(pipe);
struct pipe_winsys *ws = pipe->winsys;
+ boolean ret;
void *map;
- assert(nv40_vbo_validate_state(nv40, NULL, 0));
+ ret = nv40_vbo_validate_state(nv40, NULL, 0);
+ if (!ret) {
+ NOUVEAU_ERR("state validate failed\n");
+ return FALSE;
+ }
map = ws->buffer_map(ws, ib, PIPE_BUFFER_USAGE_CPU_READ);
- if (!ib)
- assert(0);
+ if (!ib) {
+ NOUVEAU_ERR("failed mapping ib\n");
+ return FALSE;
+ }
BEGIN_RING(curie, NV40TCL_BEGIN_END, 1);
OUT_RING (nvgl_primitive(mode));
nv40_draw_elements_u32(nv40, map, start, count);
break;
default:
- assert(0);
+ NOUVEAU_ERR("invalid idxbuf fmt %d\n", ib_size);
break;
}
{
struct nv40_context *nv40 = nv40_context(pipe);
unsigned nr, type;
+ boolean ret;
switch (ib_size) {
case 2:
type = NV40TCL_IDXBUF_FORMAT_TYPE_U32;
break;
default:
- assert(0);
+ NOUVEAU_ERR("invalid idxbuf fmt %d\n", ib_size);
+ return FALSE;
}
- assert(nv40_vbo_validate_state(nv40, ib, type));
+ ret = nv40_vbo_validate_state(nv40, ib, type);
+ if (!ret) {
+ NOUVEAU_ERR("failed state validation\n");
+ return FALSE;
+ }
BEGIN_RING(curie, NV40TCL_BEGIN_END, 1);
OUT_RING (nvgl_primitive(mode));
/* 0x4497 doesn't support real index buffers, and there doesn't appear
* to be support on any chipset for 8-bit indices.
*/
- if (nv40->curie->grclass == NV44TCL || indexSize == 1) {
+ if (nv40->hw->curie->grclass == NV44TCL || indexSize == 1) {
nv40_draw_elements_inline(pipe, indexBuffer, indexSize,
mode, start, count);
} else {