fi.i = 0xFF800000; \
x = fi.f; \
} while (0)
-#elif defined(VMS)
-#define SET_POS_INFINITY(x) x = __MAXFLOAT
-#define SET_NEG_INFINITY(x) x = -__MAXFLOAT
#else
#define SET_POS_INFINITY(x) x = (GLfloat) HUGE_VAL
#define SET_NEG_INFINITY(x) x = (GLfloat) -HUGE_VAL
static const GLfloat ZeroVec[4] = { 0.0F, 0.0F, 0.0F, 0.0F };
-
-/**
- * Return TRUE for +0 and other positive values, FALSE otherwise.
- * Used for RCC opcode.
- */
-static inline GLboolean
-positive(float x)
-{
- fi_type fi;
- fi.f = x;
- if (fi.i & 0x80000000)
- return GL_FALSE;
- return GL_TRUE;
-}
-
-
-
/**
* Return a pointer to the 4-element float vector specified by the given
* source register.
case PROGRAM_CONSTANT:
/* Fallthrough */
case PROGRAM_UNIFORM:
- /* Fallthrough */
- case PROGRAM_NAMED_PARAM:
if (reg >= (GLint) prog->Parameters->NumParameters)
return ZeroVec;
return (GLfloat *) prog->Parameters->ParameterValues[reg];
return dummyReg;
return machine->Outputs[reg];
- case PROGRAM_WRITE_ONLY:
- return dummyReg;
-
default:
_mesa_problem(NULL,
"Invalid dest register file %d in get_dst_register_pointer()",
break;
case OPCODE_ENDSUB: /* end subroutine */
break;
- case OPCODE_BRA: /* branch (conditional) */
- if (eval_condition(machine, inst)) {
- /* take branch */
- /* Subtract 1 here since we'll do pc++ below */
- pc = inst->BranchTarget - 1;
- }
- break;
case OPCODE_BRK: /* break out of loop (conditional) */
ASSERT(program->Instructions[inst->BranchTarget].Opcode
== OPCODE_ENDLOOP);
fetch_vector1(&inst->SrcReg[0], machine, t);
abs_t0 = FABSF(t[0]);
if (abs_t0 != 0.0F) {
- /* Since we really can't handle infinite values on VMS
- * like other OSes we'll use __MAXFLOAT to represent
- * infinity. This may need some tweaking.
- */
-#ifdef VMS
- if (abs_t0 == __MAXFLOAT)
-#else
if (IS_INF_OR_NAN(abs_t0))
-#endif
{
SET_POS_INFINITY(q[0]);
q[1] = 1.0F;
store_vector4(inst, machine, result);
}
break;
- case OPCODE_RCC: /* clamped riciprocal */
- {
- const float largest = 1.884467e+19, smallest = 5.42101e-20;
- GLfloat a[4], r, result[4];
- fetch_vector1(&inst->SrcReg[0], machine, a);
- if (DEBUG_PROG) {
- if (a[0] == 0)
- printf("RCC(0)\n");
- else if (IS_INF_OR_NAN(a[0]))
- printf("RCC(inf)\n");
- }
- if (a[0] == 1.0F) {
- r = 1.0F;
- }
- else {
- r = 1.0F / a[0];
- }
- if (positive(r)) {
- if (r > largest) {
- r = largest;
- }
- else if (r < smallest) {
- r = smallest;
- }
- }
- else {
- if (r < -largest) {
- r = -largest;
- }
- else if (r > -smallest) {
- r = -smallest;
- }
- }
- result[0] = result[1] = result[2] = result[3] = r;
- store_vector4(inst, machine, result);
- }
- break;
case OPCODE_RCP:
{