mesa: fix emit_clamp() so that we don't use an output register as temporary

[mesa.git] / src / mesa / shader / prog_instruction.h

diff --git a/src/mesa/shader/prog_instruction.h b/src/mesa/shader/prog_instruction.h
index f018de82b37643cb7db7c659fbff8c5c0c41252f..c800757aa0f6c993fa0d0e32e508e966aa5ff22a 100644 (file)
--- a/src/mesa/shader/prog_instruction.h
+++ b/src/mesa/shader/prog_instruction.h
@@ -57,6 +57,12 @@
 #define GET_SWZ(swz, idx)      (((swz) >> ((idx)*3)) & 0x7)
 #define GET_BIT(msk, idx)      (((msk) >> (idx)) & 0x1)
 
+#define SWIZZLE_XYZW MAKE_SWIZZLE4(SWIZZLE_X, SWIZZLE_Y, SWIZZLE_Z, SWIZZLE_W)
+#define SWIZZLE_XXXX MAKE_SWIZZLE4(SWIZZLE_X, SWIZZLE_X, SWIZZLE_X, SWIZZLE_X)
+#define SWIZZLE_YYYY MAKE_SWIZZLE4(SWIZZLE_Y, SWIZZLE_Y, SWIZZLE_Y, SWIZZLE_Y)
+#define SWIZZLE_ZZZZ MAKE_SWIZZLE4(SWIZZLE_Z, SWIZZLE_Z, SWIZZLE_Z, SWIZZLE_Z)
+#define SWIZZLE_WWWW MAKE_SWIZZLE4(SWIZZLE_W, SWIZZLE_W, SWIZZLE_W, SWIZZLE_W)
+
 
 /**
  * Writemask values, 1 bit per component.
@@ -143,9 +149,13 @@ typedef enum prog_opcode {
    OPCODE_ARL,       /*   X                X                     */
    OPCODE_ARL_NV,    /*                    2                     */
    OPCODE_ARR,       /*                    2                     */
+   OPCODE_BGNLOOP,   /*                                     opt  */
+   OPCODE_BGNSUB,    /*                                     opt  */
    OPCODE_BRA,       /*                    2                 X   */
+   OPCODE_BRK,       /*                    2                opt  */
    OPCODE_CAL,       /*                    2       2             */
    OPCODE_CMP,       /*            X                             */
+   OPCODE_CONT,      /*                                     opt  */
    OPCODE_COS,       /*            X       2       X         X   */
    OPCODE_DDX,       /*                            X         X   */
    OPCODE_DDY,       /*                            X         X   */
@@ -154,13 +164,15 @@ typedef enum prog_opcode {
    OPCODE_DPH,       /*   X        X       1.1                   */
    OPCODE_DST,       /*   X        X       X       X             */
    OPCODE_ELSE,      /*                                      X   */
-   OPCODE_END,       /*   X        X       X       X         X   */
-   OPCODE_ENDIF,      /*                                     X   */
+   OPCODE_END,       /*   X        X       X       X        opt  */
+   OPCODE_ENDIF,     /*                                     opt  */
+   OPCODE_ENDLOOP,   /*                                     opt  */
+   OPCODE_ENDSUB,    /*                                     opt  */
    OPCODE_EX2,       /*   X        X       2       X         X   */
    OPCODE_EXP,       /*   X                X                 X   */
    OPCODE_FLR,       /*   X        X       2       X         X   */
    OPCODE_FRC,       /*   X        X       2       X         X   */
-   OPCODE_IF,        /*                                      X   */
+   OPCODE_IF,        /*                                     opt  */
    OPCODE_INT,       /*                                      X   */
    OPCODE_KIL,       /*            X                             */
    OPCODE_KIL_NV,    /*                            X         X   */
@@ -286,7 +298,7 @@ struct prog_dst_register
    /*@{*/
    /**
     * Takes one of the 9 possible condition values (EQ, FL, GT, GE, LE, LT,
-    * NE, TR, or UN).  Destination update is enabled if the matching
+    * NE, TR, or UN).  Dest reg is only written to if the matching
     * (swizzled) condition code value passes.  When a conditional update mask
     * is not specified, this will be \c COND_TR.
     */
@@ -394,8 +406,12 @@ struct prog_instruction
 
    /**
     * For BRA and CAL instructions, the location to jump to.
+    * For BGNLOOP, points to ENDLOOP (and vice-versa).
+    * For BRK, points to BGNLOOP (which points to ENDLOOP).
+    * For IF, points to else or endif.
+    * For ELSE, points to endif.
     */
-   GLuint BranchTarget;
+   GLint BranchTarget;
 
    /**
     * For TEX instructions in shaders, the sampler to use for the
@@ -417,6 +433,10 @@ extern struct prog_instruction *
 _mesa_realloc_instructions(struct prog_instruction *oldInst,
                            GLuint numOldInst, GLuint numNewInst);
 
+extern struct prog_instruction *
+_mesa_copy_instructions(struct prog_instruction *dest,
+                        const struct prog_instruction *src, GLuint n);
+
 extern GLuint
 _mesa_num_inst_src_regs(gl_inst_opcode opcode);