#include "main/imports.h"
#include "main/context.h"
-#include "main/macros.h"
#include "shader/program.h"
#include "shader/prog_instruction.h"
#include "shader/prog_parameter.h"
emitInfo->Subroutines = (struct gl_program **)
_mesa_realloc(emitInfo->Subroutines,
- n * sizeof(struct gl_program),
- (n + 1) * sizeof(struct gl_program));
+ n * sizeof(struct gl_program *),
+ (n + 1) * sizeof(struct gl_program *));
emitInfo->Subroutines[n] = ctx->Driver.NewProgram(ctx, emitInfo->prog->Target, 0);
emitInfo->Subroutines[n]->Parameters = emitInfo->prog->Parameters;
emitInfo->NumSubroutines++;
if (!n->Store) {
assert(defaultSize > 0);
n->Store = _slang_new_ir_storage(PROGRAM_TEMPORARY, -1, defaultSize);
+ if (!n->Store) {
+ return GL_FALSE;
+ }
}
/* now allocate actual register(s). I.e. set n->Store->Index >= 0 */
{
assert(size >= 1);
assert(size <= 4);
- _mesa_bzero(temp, sizeof(*temp));
+ memset(temp, 0, sizeof(*temp));
temp->Size = size;
temp->File = PROGRAM_TEMPORARY;
temp->Index = -1;
_mesa_realloc_instructions(prog->Instructions,
prog->NumInstructions,
emitInfo->MaxInstructions);
+ if (!prog->Instructions) {
+ return NULL;
+ }
}
inst = prog->Instructions + prog->NumInstructions;
gl_register_file file, GLint index, GLuint swizzle)
{
struct prog_instruction *inst = new_instruction(emitInfo, OPCODE_ARL);
- inst->SrcReg[0].File = file;
- inst->SrcReg[0].Index = index;
- inst->SrcReg[0].Swizzle = fix_swizzle(swizzle);
- inst->DstReg.File = PROGRAM_ADDRESS;
- inst->DstReg.Index = 0;
- inst->DstReg.WriteMask = WRITEMASK_X;
+ if (inst) {
+ inst->SrcReg[0].File = file;
+ inst->SrcReg[0].Index = index;
+ inst->SrcReg[0].Swizzle = fix_swizzle(swizzle);
+ inst->DstReg.File = PROGRAM_ADDRESS;
+ inst->DstReg.Index = 0;
+ inst->DstReg.WriteMask = WRITEMASK_X;
+ }
return inst;
}
&srcRelAddr,
NULL,
NULL);
+ if (!inst) {
+ return NULL;
+ }
src[i] = &newSrc[i];
}
s = (char *) malloc(len);
sprintf(s, "%s = %s %s %s %s", dstAnnot,
srcAnnot0, operator, srcAnnot1, srcAnnot2);
- assert(_mesa_strlen(s) < len);
+ assert(strlen(s) < len);
free(dstAnnot);
free(srcAnnot0);
emit_comment(slang_emit_info *emitInfo, const char *comment)
{
struct prog_instruction *inst = new_instruction(emitInfo, OPCODE_NOP);
- inst_comment(inst, comment);
+ if (inst) {
+ inst_comment(inst, comment);
+ }
return inst;
}
emit(emitInfo, n->Children[0]->Children[0]); /* A */
emit(emitInfo, n->Children[0]->Children[1]); /* B */
emit(emitInfo, n->Children[1]); /* C */
- alloc_node_storage(emitInfo, n, -1); /* dest */
+ if (!alloc_node_storage(emitInfo, n, -1)) { /* dest */
+ return NULL;
+ }
inst = emit_instruction(emitInfo,
OPCODE_MAD,
emit(emitInfo, n->Children[0]); /* A */
emit(emitInfo, n->Children[1]->Children[0]); /* B */
emit(emitInfo, n->Children[1]->Children[1]); /* C */
- alloc_node_storage(emitInfo, n, -1); /* dest */
+ if (!alloc_node_storage(emitInfo, n, -1)) { /* dest */
+ return NULL;
+ }
inst = emit_instruction(emitInfo,
OPCODE_MAD,
}
/* result storage */
- alloc_node_storage(emitInfo, n, -1);
+ if (!alloc_node_storage(emitInfo, n, -1)) {
+ return NULL;
+ }
inst = emit_instruction(emitInfo,
info->InstOpcode,
n->Children[0]->Store,
n->Children[1]->Store,
NULL);
+ if (!inst) {
+ return NULL;
+ }
inst_comment(inst, "Compare values");
/* Compute val = DOT(temp, temp) (reduction) */
&tempStore,
&tempStore,
NULL);
+ if (!inst) {
+ return NULL;
+ }
inst->SrcReg[0].Swizzle = inst->SrcReg[1].Swizzle = swizzle; /*override*/
inst_comment(inst, "Reduce vec to bool");
n->Store,
&zero,
NULL);
+ if (!inst) {
+ return NULL;
+ }
inst_comment(inst, "Invert true/false");
}
}
&srcStore0,
&srcStore1,
NULL);
+ if (!inst) {
+ return NULL;
+ }
inst_comment(inst, "Begin struct/array comparison");
}
else {
&srcStore0,
&srcStore1,
NULL);
+ if (!inst) {
+ return NULL;
+ }
/* ADD accTemp, accTemp, sneTemp; # like logical-OR */
inst = emit_instruction(emitInfo, OPCODE_ADD,
&accTemp, /* dest */
&accTemp,
&sneTemp,
NULL);
+ if (!inst) {
+ return NULL;
+ }
}
}
&accTemp,
&accTemp,
NULL);
+ if (!inst) {
+ return NULL;
+ }
inst_comment(inst, "End struct/array comparison");
if (n->Opcode == IR_EQUAL) {
n->Store,
&zero,
NULL);
+ if (!inst) {
+ return NULL;
+ }
inst_comment(inst, "Invert true/false");
}
return inst;
}
}
+#else
+ (void) inst;
#endif
if (!alloc_node_storage(emitInfo, n, n->Children[0]->Store->Size))
* dest for this clamp() is an output reg, we can't use that reg for
* the intermediate result. Use a temp register instead.
*/
- _mesa_bzero(&tmpNode, sizeof(tmpNode));
- alloc_node_storage(emitInfo, &tmpNode, n->Store->Size);
+ memset(&tmpNode, 0, sizeof(tmpNode));
+ if (!alloc_node_storage(emitInfo, &tmpNode, n->Store->Size)) {
+ return NULL;
+ }
/* tmp = max(ch[0], ch[1]) */
inst = emit_instruction(emitInfo, OPCODE_MAX,
n->Children[0]->Store,
n->Children[1]->Store,
NULL);
+ if (!inst) {
+ return NULL;
+ }
/* n->dest = min(tmp, ch[2]) */
inst = emit_instruction(emitInfo, OPCODE_MIN,
n->Children[0]->Store,
NULL,
NULL);
- inst->SrcReg[0].Negate = NEGATE_XYZW;
+ if (inst) {
+ inst->SrcReg[0].Negate = NEGATE_XYZW;
+ }
return inst;
}
* really just a NOP to attach the label to.
*/
inst = new_instruction(emitInfo, OPCODE_BGNSUB);
+ if (!inst) {
+ return NULL;
+ }
inst_comment(inst, n->Label->Name);
}
inst = prev_instruction(emitInfo);
if (inst && inst->Opcode != OPCODE_RET) {
inst = new_instruction(emitInfo, OPCODE_RET);
+ if (!inst) {
+ return NULL;
+ }
}
if (emitInfo->EmitBeginEndSub) {
inst = new_instruction(emitInfo, OPCODE_ENDSUB);
+ if (!inst) {
+ return NULL;
+ }
inst_comment(inst, n->Label->Name);
}
/* emit the function call */
inst = new_instruction(emitInfo, OPCODE_CAL);
+ if (!inst) {
+ return NULL;
+ }
/* The branch target is just the subroutine number (changed later) */
inst->BranchTarget = subroutineId;
inst_comment(inst, n->Label->Name);
assert(n->Opcode == IR_RETURN);
assert(n->Label);
inst = new_instruction(emitInfo, OPCODE_RET);
- inst->DstReg.CondMask = COND_TR; /* always return */
+ if (inst) {
+ inst->DstReg.CondMask = COND_TR; /* always return */
+ }
return inst;
}
* Note that ARB-KILL depends on sign of vector operand.
*/
inst = new_instruction(emitInfo, OPCODE_KIL_NV);
+ if (!inst) {
+ return NULL;
+ }
inst->DstReg.CondMask = COND_TR; /* always kill */
assert(emitInfo->prog->Target == GL_FRAGMENT_PROGRAM_ARB);
n->Children[1]->Store,
NULL,
NULL);
+ if (!inst) {
+ return NULL;
+ }
inst->TexShadow = shadow;
&srcStore,
NULL,
NULL);
+ if (!inst) {
+ return NULL;
+ }
inst_comment(inst, "IR_COPY block");
srcStore.Index++;
dstStore.Index++;
n->Children[1]->Store,
NULL,
NULL);
+ if (!inst) {
+ return NULL;
+ }
dstAnnot = storage_annotation(n->Children[0], emitInfo->prog);
srcAnnot = storage_annotation(n->Children[1], emitInfo->prog);
inst->Comment = instruction_annotation(inst->Opcode, dstAnnot,
n->Children[0]->Store,
NULL,
NULL);
+ if (!inst) {
+ return NULL;
+ }
inst->CondUpdate = GL_TRUE;
inst_comment(inst, "COND expr");
_slang_free_temp(emitInfo->vt, n->Store);
n->Children[0]->Store,
&zero,
NULL);
+ if (!inst) {
+ return NULL;
+ }
inst_comment(inst, "NOT");
free_node_storage(emitInfo->vt, n->Children[0]);
if (emitInfo->EmitHighLevelInstructions) {
if (emitInfo->EmitCondCodes) {
/* IF condcode THEN ... */
- struct prog_instruction *ifInst;
- ifInst = new_instruction(emitInfo, OPCODE_IF);
+ struct prog_instruction *ifInst = new_instruction(emitInfo, OPCODE_IF);
+ if (!ifInst) {
+ return NULL;
+ }
ifInst->DstReg.CondMask = COND_NE; /* if cond is non-zero */
/* only test the cond code (1 of 4) that was updated by the
* previous instruction.
ifInst->DstReg.CondSwizzle = writemask_to_swizzle(condWritemask);
}
else {
+ struct prog_instruction *inst;
+
/* IF src[0] THEN ... */
- emit_instruction(emitInfo, OPCODE_IF,
- NULL, /* dst */
- n->Children[0]->Store, /* op0 */
- NULL,
- NULL);
+ inst = emit_instruction(emitInfo, OPCODE_IF,
+ NULL, /* dst */
+ n->Children[0]->Store, /* op0 */
+ NULL,
+ NULL);
+ if (!inst) {
+ return NULL;
+ }
}
}
else {
/* conditional jump to else, or endif */
struct prog_instruction *ifInst = new_instruction(emitInfo, OPCODE_BRA);
+ if (!ifInst) {
+ return NULL;
+ }
ifInst->DstReg.CondMask = COND_EQ; /* BRA if cond is zero */
inst_comment(ifInst, "if zero");
ifInst->DstReg.CondSwizzle = writemask_to_swizzle(condWritemask);
/* have else body */
elseInstLoc = prog->NumInstructions;
if (emitInfo->EmitHighLevelInstructions) {
- (void) new_instruction(emitInfo, OPCODE_ELSE);
+ struct prog_instruction *inst = new_instruction(emitInfo, OPCODE_ELSE);
+ if (!inst) {
+ return NULL;
+ }
+ prog->Instructions[ifInstLoc].BranchTarget = prog->NumInstructions - 1;
}
else {
/* jump to endif instruction */
- struct prog_instruction *inst;
- inst = new_instruction(emitInfo, OPCODE_BRA);
+ struct prog_instruction *inst = new_instruction(emitInfo, OPCODE_BRA);
+ if (!inst) {
+ return NULL;
+ }
inst_comment(inst, "else");
inst->DstReg.CondMask = COND_TR; /* always branch */
+ prog->Instructions[ifInstLoc].BranchTarget = prog->NumInstructions;
}
- prog->Instructions[ifInstLoc].BranchTarget = prog->NumInstructions;
emit(emitInfo, n->Children[2]);
}
else {
}
if (emitInfo->EmitHighLevelInstructions) {
- (void) new_instruction(emitInfo, OPCODE_ENDIF);
+ struct prog_instruction *inst = new_instruction(emitInfo, OPCODE_ENDIF);
+ if (!inst) {
+ return NULL;
+ }
}
- if (n->Children[2]) {
- prog->Instructions[elseInstLoc].BranchTarget = prog->NumInstructions;
+ if (elseInstLoc) {
+ /* point ELSE instruction BranchTarget at ENDIF */
+ if (emitInfo->EmitHighLevelInstructions) {
+ prog->Instructions[elseInstLoc].BranchTarget = prog->NumInstructions - 1;
+ }
+ else {
+ prog->Instructions[elseInstLoc].BranchTarget = prog->NumInstructions;
+ }
}
return NULL;
}
/* emit OPCODE_BGNLOOP */
beginInstLoc = prog->NumInstructions;
if (emitInfo->EmitHighLevelInstructions) {
- (void) new_instruction(emitInfo, OPCODE_BGNLOOP);
+ struct prog_instruction *inst = new_instruction(emitInfo, OPCODE_BGNLOOP);
+ if (!inst) {
+ return NULL;
+ }
}
/* body */
if (emitInfo->EmitHighLevelInstructions) {
/* emit OPCODE_ENDLOOP */
endInst = new_instruction(emitInfo, OPCODE_ENDLOOP);
+ if (!endInst) {
+ return NULL;
+ }
}
else {
/* emit unconditional BRA-nch */
endInst = new_instruction(emitInfo, OPCODE_BRA);
+ if (!endInst) {
+ return NULL;
+ }
endInst->DstReg.CondMask = COND_TR; /* always true */
}
/* ENDLOOP's BranchTarget points to the BGNLOOP inst */
/* Done emitting loop code. Now walk over the loop's linked list of
* BREAK and CONT nodes, filling in their BranchTarget fields (which
- * will point to the ENDLOOP+1 or BGNLOOP instructions, respectively).
+ * will point to the corresponding ENDLOOP instruction.
*/
for (ir = n->List; ir; ir = ir->List) {
struct prog_instruction *inst = prog->Instructions + ir->InstLocation;
ir->Opcode == IR_BREAK_IF_TRUE) {
assert(inst->Opcode == OPCODE_BRK ||
inst->Opcode == OPCODE_BRA);
- /* go to instruction after end of loop */
- inst->BranchTarget = endInstLoc + 1;
+ /* go to instruction at end of loop */
+ if (emitInfo->EmitHighLevelInstructions) {
+ inst->BranchTarget = endInstLoc;
+ }
+ else {
+ inst->BranchTarget = endInstLoc + 1;
+ }
}
else {
assert(ir->Opcode == IR_CONT ||
}
n->InstLocation = emitInfo->prog->NumInstructions;
inst = new_instruction(emitInfo, opcode);
- inst->DstReg.CondMask = COND_TR; /* always true */
+ if (inst) {
+ inst->DstReg.CondMask = COND_TR; /* always true */
+ }
return inst;
}
*/
const GLuint condWritemask = inst->DstReg.WriteMask;
inst = new_instruction(emitInfo, opcode);
- inst->DstReg.CondMask = COND_NE;
- inst->DstReg.CondSwizzle = writemask_to_swizzle(condWritemask);
+ if (inst) {
+ inst->DstReg.CondMask = COND_NE;
+ inst->DstReg.CondSwizzle = writemask_to_swizzle(condWritemask);
+ }
return inst;
}
else {
n->Children[0]->Store,
NULL,
NULL);
+ if (!inst) {
+ return NULL;
+ }
n->InstLocation = emitInfo->prog->NumInstructions;
inst = new_instruction(emitInfo, opcode);
+ if (!inst) {
+ return NULL;
+ }
inst = new_instruction(emitInfo, OPCODE_ENDIF);
+ if (!inst) {
+ return NULL;
+ }
emitInfo->prog->Instructions[ifInstLoc].BranchTarget
- = emitInfo->prog->NumInstructions;
+ = emitInfo->prog->NumInstructions - 1;
return inst;
}
}
const GLuint condWritemask = inst->DstReg.WriteMask;
assert(emitInfo->EmitCondCodes);
inst = new_instruction(emitInfo, OPCODE_BRA);
- inst->DstReg.CondMask = COND_NE;
- inst->DstReg.CondSwizzle = writemask_to_swizzle(condWritemask);
+ if (inst) {
+ inst->DstReg.CondMask = COND_NE;
+ inst->DstReg.CondSwizzle = writemask_to_swizzle(condWritemask);
+ }
return inst;
}
}
indexStore, /* the index */
&elemSizeStore,
NULL);
+ if (!inst) {
+ return NULL;
+ }
indexStore = indexTemp;
}
indexStore, /* the index */
&indirectArray, /* indirect array base */
NULL);
+ if (!inst) {
+ return NULL;
+ }
indexStore = indexTemp;
}
if (n->Comment) {
inst = new_instruction(emitInfo, OPCODE_NOP);
- inst->Comment = _mesa_strdup(n->Comment);
+ if (inst) {
+ inst->Comment = _mesa_strdup(n->Comment);
+ }
inst = NULL;
}
case IR_POW:
/* trinary operators */
case IR_LRP:
+ case IR_CMP:
return emit_arith(emitInfo, n);
case IR_EQUAL:
GLuint *subroutineLoc, i, total;
subroutineLoc
- = (GLuint *) _mesa_malloc(emitInfo->NumSubroutines * sizeof(GLuint));
+ = (GLuint *) malloc(emitInfo->NumSubroutines * sizeof(GLuint));
/* total number of instructions */
total = mainP->NumInstructions;
/* free subroutine list */
if (emitInfo->Subroutines) {
- _mesa_free(emitInfo->Subroutines);
+ free(emitInfo->Subroutines);
emitInfo->Subroutines = NULL;
}
emitInfo->NumSubroutines = 0;
}
}
- _mesa_free(subroutineLoc);
+ free(subroutineLoc);
}
if (withEnd) {
struct prog_instruction *inst;
inst = new_instruction(&emitInfo, OPCODE_END);
+ if (!inst) {
+ return GL_FALSE;
+ }
}
_slang_resolve_subroutines(&emitInfo);
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