class immediate_storage : public exec_node {
public:
- immediate_storage(gl_constant_value *values, int size32, int type)
+ immediate_storage(gl_constant_value *values, int size32, GLenum type)
{
memcpy(this->values, values, size32 * sizeof(gl_constant_value));
this->size32 = size32;
/* doubles are stored across 2 gl_constant_values */
gl_constant_value values[4];
int size32; /**< Number of 32-bit components (1-4) */
- int type; /**< GL_DOUBLE, GL_FLOAT, GL_INT, GL_BOOL, or GL_UNSIGNED_INT */
+ GLenum type; /**< GL_DOUBLE, GL_FLOAT, GL_INT, GL_BOOL, or GL_UNSIGNED_INT */
};
static const st_src_reg undef_src = st_src_reg(PROGRAM_UNDEFINED, 0, GLSL_TYPE_ERROR);
return GLSL_TYPE_ERROR;
}
+struct hwatomic_decl {
+ unsigned location;
+ unsigned binding;
+ unsigned size;
+ unsigned array_id;
+};
+
struct glsl_to_tgsi_visitor : public ir_visitor {
public:
glsl_to_tgsi_visitor();
unsigned num_outputs;
unsigned num_output_arrays;
+ struct hwatomic_decl atomic_info[PIPE_MAX_HW_ATOMIC_BUFFERS];
+ unsigned num_atomics;
+ unsigned num_atomic_arrays;
int num_address_regs;
uint32_t samplers_used;
glsl_base_type sampler_types[PIPE_MAX_SAMPLERS];
- int sampler_targets[PIPE_MAX_SAMPLERS]; /**< One of TGSI_TEXTURE_* */
+ enum tgsi_texture_type sampler_targets[PIPE_MAX_SAMPLERS];
int images_used;
- int image_targets[PIPE_MAX_SHADER_IMAGES];
- unsigned image_formats[PIPE_MAX_SHADER_IMAGES];
+ enum tgsi_texture_type image_targets[PIPE_MAX_SHADER_IMAGES];
+ enum pipe_format image_formats[PIPE_MAX_SHADER_IMAGES];
bool indirect_addr_consts;
int wpos_transform_const;
variable_storage *find_variable_storage(ir_variable *var);
int add_constant(gl_register_file file, gl_constant_value values[8],
- int size, int datatype, uint16_t *swizzle_out);
+ int size, GLenum datatype, uint16_t *swizzle_out);
st_src_reg get_temp(const glsl_type *type);
void reladdr_to_temp(ir_instruction *ir, st_src_reg *reg, int *num_reladdr);
void *mem_ctx;
};
-static st_dst_reg address_reg = st_dst_reg(PROGRAM_ADDRESS, WRITEMASK_X, GLSL_TYPE_FLOAT, 0);
-static st_dst_reg address_reg2 = st_dst_reg(PROGRAM_ADDRESS, WRITEMASK_X, GLSL_TYPE_FLOAT, 1);
-static st_dst_reg sampler_reladdr = st_dst_reg(PROGRAM_ADDRESS, WRITEMASK_X, GLSL_TYPE_FLOAT, 2);
+static st_dst_reg address_reg = st_dst_reg(PROGRAM_ADDRESS, WRITEMASK_X,
+ GLSL_TYPE_FLOAT, 0);
+static st_dst_reg address_reg2 = st_dst_reg(PROGRAM_ADDRESS, WRITEMASK_X,
+ GLSL_TYPE_FLOAT, 1);
+static st_dst_reg sampler_reladdr = st_dst_reg(PROGRAM_ADDRESS, WRITEMASK_X,
+ GLSL_TYPE_FLOAT, 2);
static void
-fail_link(struct gl_shader_program *prog, const char *fmt, ...) PRINTFLIKE(2, 3);
+fail_link(struct gl_shader_program *prog, const char *fmt, ...)
+ PRINTFLIKE(2, 3);
static void
fail_link(struct gl_shader_program *prog, const char *fmt, ...)
ralloc_vasprintf_append(&prog->data->InfoLog, fmt, args);
va_end(args);
- prog->data->LinkStatus = linking_failure;
+ prog->data->LinkStatus = LINKING_FAILURE;
}
int
/* Update indirect addressing status used by TGSI */
if (dst.reladdr || dst.reladdr2) {
- switch(dst.file) {
+ switch (dst.file) {
case PROGRAM_STATE_VAR:
case PROGRAM_CONSTANT:
case PROGRAM_UNIFORM:
}
else {
for (i = 0; i < 4; i++) {
- if(inst->src[i].reladdr) {
- switch(inst->src[i].file) {
+ if (inst->src[i].reladdr) {
+ switch (inst->src[i].file) {
case PROGRAM_STATE_VAR:
case PROGRAM_CONSTANT:
case PROGRAM_UNIFORM:
*/
for (j = 0; j < 2; j++) {
dst_is_64bit[j] = glsl_base_type_is_64bit(inst->dst[j].type);
- if (!dst_is_64bit[j] && inst->dst[j].file == PROGRAM_OUTPUT && inst->dst[j].type == GLSL_TYPE_ARRAY) {
- enum glsl_base_type type = find_array_type(this->outputs, this->num_outputs, inst->dst[j].array_id);
+ if (!dst_is_64bit[j] && inst->dst[j].file == PROGRAM_OUTPUT &&
+ inst->dst[j].type == GLSL_TYPE_ARRAY) {
+ enum glsl_base_type type = find_array_type(this->outputs,
+ this->num_outputs,
+ inst->dst[j].array_id);
if (glsl_base_type_is_64bit(type))
dst_is_64bit[j] = true;
}
int initial_src_swz[4], initial_src_idx[4];
int initial_dst_idx[2], initial_dst_writemask[2];
/* select the writemask for dst0 or dst1 */
- unsigned writemask = inst->dst[1].file == PROGRAM_UNDEFINED ? inst->dst[0].writemask : inst->dst[1].writemask;
+ unsigned writemask = inst->dst[1].file == PROGRAM_UNDEFINED
+ ? inst->dst[0].writemask : inst->dst[1].writemask;
/* copy out the writemask, index and swizzles for all src/dsts. */
for (j = 0; j < 2; j++) {
int i = u_bit_scan(&writemask);
- /* before emitting the instruction, see if we have to adjust load / store
- * address */
- if (i > 1 && (inst->op == TGSI_OPCODE_LOAD || inst->op == TGSI_OPCODE_STORE) &&
+ /* before emitting the instruction, see if we have to adjust
+ * load / store address */
+ if (i > 1 && (inst->op == TGSI_OPCODE_LOAD ||
+ inst->op == TGSI_OPCODE_STORE) &&
addr.file == PROGRAM_UNDEFINED) {
/* We have to advance the buffer address by 16 */
addr = get_temp(glsl_type::uint_type);
dinst->dst[j].writemask = (i & 1) ? WRITEMASK_ZW : WRITEMASK_XY;
dinst->dst[j].index = initial_dst_idx[j];
if (i > 1) {
- if (dinst->op == TGSI_OPCODE_LOAD || dinst->op == TGSI_OPCODE_STORE)
+ if (dinst->op == TGSI_OPCODE_LOAD ||
+ dinst->op == TGSI_OPCODE_STORE)
dinst->src[0] = addr;
if (dinst->op != TGSI_OPCODE_STORE)
dinst->dst[j].index++;
}
} else {
- /* if we aren't writing to a double, just get the bit of the initial writemask
- for this channel */
+ /* if we aren't writing to a double, just get the bit of the
+ * initial writemask for this channel
+ */
dinst->dst[j].writemask = initial_dst_writemask[j] & (1 << i);
}
}
}
if (swz & 1)
- dinst->src[j].swizzle = MAKE_SWIZZLE4(SWIZZLE_Z, SWIZZLE_W, SWIZZLE_Z, SWIZZLE_W);
+ dinst->src[j].swizzle = MAKE_SWIZZLE4(SWIZZLE_Z, SWIZZLE_W,
+ SWIZZLE_Z, SWIZZLE_W);
else
- dinst->src[j].swizzle = MAKE_SWIZZLE4(SWIZZLE_X, SWIZZLE_Y, SWIZZLE_X, SWIZZLE_Y);
+ dinst->src[j].swizzle = MAKE_SWIZZLE4(SWIZZLE_X, SWIZZLE_Y,
+ SWIZZLE_X, SWIZZLE_Y);
} else {
/* some opcodes are special case in what they use as sources
- - [FUI]2D/[UI]2I64 is a float/[u]int src0, (D)LDEXP is integer src1 */
- if (op == TGSI_OPCODE_F2D || op == TGSI_OPCODE_U2D || op == TGSI_OPCODE_I2D ||
+ * - [FUI]2D/[UI]2I64 is a float/[u]int src0, (D)LDEXP is
+ * integer src1
+ */
+ if (op == TGSI_OPCODE_F2D || op == TGSI_OPCODE_U2D ||
+ op == TGSI_OPCODE_I2D ||
op == TGSI_OPCODE_I2I64 || op == TGSI_OPCODE_U2I64 ||
op == TGSI_OPCODE_DLDEXP || op == TGSI_OPCODE_LDEXP ||
(op == TGSI_OPCODE_UCMP && dst_is_64bit[0])) {
op = TGSI_OPCODE_##c; \
break;
- switch(op) {
+ switch (op) {
/* Some instructions are initially selected without considering the type.
* This fixes the type:
*
casecomp(SGE, FSGE, ISGE, USGE, DSGE, I64SGE, U64SGE);
casecomp(SLT, FSLT, ISLT, USLT, DSLT, I64SLT, U64SLT);
- default: break;
+ default:
+ break;
}
assert(op != TGSI_OPCODE_LAST);
int
glsl_to_tgsi_visitor::add_constant(gl_register_file file,
- gl_constant_value values[8], int size, int datatype,
+ gl_constant_value values[8], int size,
+ GLenum datatype,
uint16_t *swizzle_out)
{
if (file == PROGRAM_CONSTANT) {
GLuint swizzle = swizzle_out ? *swizzle_out : 0;
- int result = _mesa_add_typed_unnamed_constant(this->prog->Parameters, values,
- size, datatype, &swizzle);
+ int result = _mesa_add_typed_unnamed_constant(this->prog->Parameters,
+ values, size, datatype,
+ &swizzle);
if (swizzle_out)
*swizzle_out = swizzle;
return result;
immediate_storage *entry;
int size32 = size * ((datatype == GL_DOUBLE ||
datatype == GL_INT64_ARB ||
- datatype == GL_UNSIGNED_INT64_ARB)? 2 : 1);
+ datatype == GL_UNSIGNED_INT64_ARB) ? 2 : 1);
int i;
/* Search immediate storage to see if we already have an identical
for (i = 0; i * 4 < size32; i++) {
int slot_size = MIN2(size32 - (i * 4), 4);
/* Add this immediate to the list. */
- entry = new(mem_ctx) immediate_storage(&values[i * 4], slot_size, datatype);
+ entry = new(mem_ctx) immediate_storage(&values[i * 4],
+ slot_size, datatype);
this->immediates.push_tail(entry);
this->num_immediates++;
}
for (unsigned int i = 0; i < ir->get_num_state_slots(); i++) {
int index = _mesa_add_state_reference(this->prog->Parameters,
- (gl_state_index *)slots[i].tokens);
+ (gl_state_index *)
+ slots[i].tokens);
if (storage->file == PROGRAM_STATE_VAR) {
if (storage->index == -1) {
* instruction.
*/
bool
-glsl_to_tgsi_visitor::try_emit_mad_for_and_not(ir_expression *ir, int try_operand)
+glsl_to_tgsi_visitor::try_emit_mad_for_and_not(ir_expression *ir,
+ int try_operand)
{
const int other_operand = 1 - try_operand;
st_src_reg a, b;
if (!reg->reladdr && !reg->reladdr2)
return;
- if (reg->reladdr) emit_arl(ir, address_reg, *reg->reladdr);
- if (reg->reladdr2) emit_arl(ir, address_reg2, *reg->reladdr2);
+ if (reg->reladdr)
+ emit_arl(ir, address_reg, *reg->reladdr);
+ if (reg->reladdr2)
+ emit_arl(ir, address_reg2, *reg->reladdr2);
if (*num_reladdr != 1) {
st_src_reg temp = get_temp(glsl_type::get_instance(reg->type, 4, 1));
st_dst_reg result_dst;
int vector_elements = ir->operands[0]->type->vector_elements;
- if (ir->operands[1]) {
+ if (ir->operands[1] &&
+ ir->operation != ir_binop_interpolate_at_offset &&
+ ir->operation != ir_binop_interpolate_at_sample) {
+ st_src_reg *swz_op = NULL;
+ if (vector_elements > ir->operands[1]->type->vector_elements) {
+ assert(ir->operands[1]->type->vector_elements == 1);
+ swz_op = &op[1];
+ } else if (vector_elements < ir->operands[1]->type->vector_elements) {
+ assert(ir->operands[0]->type->vector_elements == 1);
+ swz_op = &op[0];
+ }
+ if (swz_op) {
+ uint16_t swizzle_x = GET_SWZ(swz_op->swizzle, 0);
+ swz_op->swizzle = MAKE_SWIZZLE4(swizzle_x, swizzle_x,
+ swizzle_x, swizzle_x);
+ }
vector_elements = MAX2(vector_elements,
ir->operands[1]->type->vector_elements);
}
+ if (ir->operands[2] &&
+ ir->operands[2]->type->vector_elements != vector_elements) {
+ /* This can happen with ir_triop_lrp, i.e. glsl mix */
+ assert(ir->operands[2]->type->vector_elements == 1);
+ uint16_t swizzle_x = GET_SWZ(op[2].swizzle, 0);
+ op[2].swizzle = MAKE_SWIZZLE4(swizzle_x, swizzle_x,
+ swizzle_x, swizzle_x);
+ }
this->result.file = PROGRAM_UNDEFINED;
* 0.0 and 1.0, 1-x also implements !x.
*/
op[0].negate = ~op[0].negate;
- emit_asm(ir, TGSI_OPCODE_ADD, result_dst, op[0], st_src_reg_for_float(1.0));
+ emit_asm(ir, TGSI_OPCODE_ADD, result_dst, op[0],
+ st_src_reg_for_float(1.0));
}
break;
case ir_unop_neg:
- if (result_dst.type == GLSL_TYPE_INT64 || result_dst.type == GLSL_TYPE_UINT64)
+ if (result_dst.type == GLSL_TYPE_INT64 ||
+ result_dst.type == GLSL_TYPE_UINT64)
emit_asm(ir, TGSI_OPCODE_I64NEG, result_dst, op[0]);
- else if (result_dst.type == GLSL_TYPE_INT || result_dst.type == GLSL_TYPE_UINT)
+ else if (result_dst.type == GLSL_TYPE_INT ||
+ result_dst.type == GLSL_TYPE_UINT)
emit_asm(ir, TGSI_OPCODE_INEG, result_dst, op[0]);
else if (result_dst.type == GLSL_TYPE_DOUBLE)
emit_asm(ir, TGSI_OPCODE_DNEG, result_dst, op[0]);
emit_asm(ir, TGSI_OPCODE_MOV, result_dst, op[0].get_abs());
else if (result_dst.type == GLSL_TYPE_DOUBLE)
emit_asm(ir, TGSI_OPCODE_DABS, result_dst, op[0]);
- else if (result_dst.type == GLSL_TYPE_INT64 || result_dst.type == GLSL_TYPE_UINT64)
+ else if (result_dst.type == GLSL_TYPE_INT64 ||
+ result_dst.type == GLSL_TYPE_UINT64)
emit_asm(ir, TGSI_OPCODE_I64ABS, result_dst, op[0]);
else
emit_asm(ir, TGSI_OPCODE_IABS, result_dst, op[0]);
*/
st_src_reg sge_src = result_src;
sge_src.negate = ~sge_src.negate;
- emit_asm(ir, TGSI_OPCODE_SGE, result_dst, sge_src, st_src_reg_for_float(0.0));
+ emit_asm(ir, TGSI_OPCODE_SGE, result_dst, sge_src,
+ st_src_reg_for_float(0.0));
}
} else {
emit_asm(ir, TGSI_OPCODE_SEQ, result_dst, op[0], op[1]);
*/
dp->saturate = true;
} else {
- /* Negating the result of the dot-product gives values on the range
- * [-4, 0]. Zero stays zero, and negative values become 1.0. This
- * achieved using SLT.
+ /* Negating the result of the dot-product gives values on the
+ * range [-4, 0]. Zero stays zero, and negative values become
+ * 1.0. This achieved using SLT.
*/
st_src_reg slt_src = result_src;
slt_src.negate = ~slt_src.negate;
- emit_asm(ir, TGSI_OPCODE_SLT, result_dst, slt_src, st_src_reg_for_float(0.0));
+ emit_asm(ir, TGSI_OPCODE_SLT, result_dst, slt_src,
+ st_src_reg_for_float(0.0));
}
}
} else {
emit_asm(ir, TGSI_OPCODE_ADD, result_dst, op[0], op[1]);
if (this->prog->Target == GL_FRAGMENT_PROGRAM_ARB) {
/* The clamping to [0,1] can be done for free in the fragment
- * shader with a saturate if floats are being used as boolean values.
+ * shader with a saturate if floats are being used as boolean
+ * values.
*/
add->saturate = true;
} else {
/* Negating the result of the addition gives values on the range
- * [-2, 0]. Zero stays zero, and negative values become 1.0. This
- * is achieved using SLT.
+ * [-2, 0]. Zero stays zero, and negative values become 1.0
+ * This is achieved using SLT.
*/
st_src_reg slt_src = result_src;
slt_src.negate = ~slt_src.negate;
- emit_asm(ir, TGSI_OPCODE_SLT, result_dst, slt_src, st_src_reg_for_float(0.0));
+ emit_asm(ir, TGSI_OPCODE_SLT, result_dst, slt_src,
+ st_src_reg_for_float(0.0));
}
}
break;
/* fallthrough to next case otherwise */
case ir_unop_b2f:
if (native_integers) {
- emit_asm(ir, TGSI_OPCODE_AND, result_dst, op[0], st_src_reg_for_float(1.0));
+ emit_asm(ir, TGSI_OPCODE_AND, result_dst, op[0],
+ st_src_reg_for_float(1.0));
break;
}
/* fallthrough to next case otherwise */
* GLSL requires that int(bool) return 1 for true and 0 for false.
* This conversion is done with AND, but it could be done with NEG.
*/
- emit_asm(ir, TGSI_OPCODE_AND, result_dst, op[0], st_src_reg_for_int(1));
+ emit_asm(ir, TGSI_OPCODE_AND, result_dst, op[0],
+ st_src_reg_for_int(1));
} else {
/* Booleans and integers are both stored as floats when native
* integers are disabled.
result_src.type = GLSL_TYPE_FLOAT;
break;
case ir_unop_f2b:
- emit_asm(ir, TGSI_OPCODE_SNE, result_dst, op[0], st_src_reg_for_float(0.0));
+ emit_asm(ir, TGSI_OPCODE_SNE, result_dst, op[0],
+ st_src_reg_for_float(0.0));
break;
case ir_unop_d2b:
- emit_asm(ir, TGSI_OPCODE_SNE, result_dst, op[0], st_src_reg_for_double(0.0));
+ emit_asm(ir, TGSI_OPCODE_SNE, result_dst, op[0],
+ st_src_reg_for_double(0.0));
break;
case ir_unop_i2b:
if (native_integers)
- emit_asm(ir, TGSI_OPCODE_USNE, result_dst, op[0], st_src_reg_for_int(0));
+ emit_asm(ir, TGSI_OPCODE_USNE, result_dst, op[0],
+ st_src_reg_for_int(0));
else
- emit_asm(ir, TGSI_OPCODE_SNE, result_dst, op[0], st_src_reg_for_float(0.0));
+ emit_asm(ir, TGSI_OPCODE_SNE, result_dst, op[0],
+ st_src_reg_for_float(0.0));
break;
case ir_unop_bitcast_u642d:
case ir_unop_bitcast_i642d:
/* GLSL shift operations have 32-bit shift counts, but TGSI uses
* 64 bits.
*/
- count = get_temp(glsl_type::u64vec(ir->operands[1]->type->components()));
+ count = get_temp(glsl_type::u64vec(ir->operands[1]
+ ->type->components()));
emit_asm(ir, TGSI_OPCODE_U2I64, st_dst_reg(count), op[1]);
} else {
count = op[1];
case ir_unop_get_buffer_size: {
ir_constant *const_offset = ir->operands[0]->as_constant();
+ int buf_base = ctx->st->has_hw_atomics
+ ? 0 : ctx->Const.Program[shader->Stage].MaxAtomicBuffers;
st_src_reg buffer(
PROGRAM_BUFFER,
- ctx->Const.Program[shader->Stage].MaxAtomicBuffers +
- (const_offset ? const_offset->value.u[0] : 0),
+ buf_base + (const_offset ? const_offset->value.u[0] : 0),
GLSL_TYPE_UINT);
if (!const_offset) {
buffer.reladdr = ralloc(mem_ctx, st_src_reg);
temp_dst.writemask = WRITEMASK_X;
if (vector_elements > 3)
temp_dst.writemask |= WRITEMASK_Z;
- op[0].swizzle = MAKE_SWIZZLE4(GET_SWZ(orig_swz, 2), GET_SWZ(orig_swz, 2),
- GET_SWZ(orig_swz, 3), GET_SWZ(orig_swz, 3));
+ op[0].swizzle = MAKE_SWIZZLE4(GET_SWZ(orig_swz, 2),
+ GET_SWZ(orig_swz, 2),
+ GET_SWZ(orig_swz, 3),
+ GET_SWZ(orig_swz, 3));
if (ir->operation == ir_unop_u2i64 || ir->operation == ir_unop_u2u64)
emit_asm(ir, TGSI_OPCODE_MOV, temp_dst, op[0]);
else
- emit_asm(ir, TGSI_OPCODE_AND, temp_dst, op[0], st_src_reg_for_int(1));
+ emit_asm(ir, TGSI_OPCODE_AND, temp_dst, op[0],
+ st_src_reg_for_int(1));
}
break;
}
for (el = 0; el < vector_elements; el++) {
unsigned swz = GET_SWZ(orig_swz, el);
if (swz & 1)
- op[0].swizzle = MAKE_SWIZZLE4(SWIZZLE_Z, SWIZZLE_Z, SWIZZLE_Z, SWIZZLE_Z);
+ op[0].swizzle = MAKE_SWIZZLE4(SWIZZLE_Z, SWIZZLE_Z,
+ SWIZZLE_Z, SWIZZLE_Z);
else
- op[0].swizzle = MAKE_SWIZZLE4(SWIZZLE_X, SWIZZLE_X, SWIZZLE_X, SWIZZLE_X);
+ op[0].swizzle = MAKE_SWIZZLE4(SWIZZLE_X, SWIZZLE_X,
+ SWIZZLE_X, SWIZZLE_X);
if (swz > 2)
op[0].index = orig_idx + 1;
op[0].type = GLSL_TYPE_UINT;
break;
}
case ir_unop_i642b:
- emit_asm(ir, TGSI_OPCODE_U64SNE, result_dst, op[0], st_src_reg_for_int64(0));
+ emit_asm(ir, TGSI_OPCODE_U64SNE, result_dst, op[0],
+ st_src_reg_for_int64(0));
break;
case ir_unop_i642f:
emit_asm(ir, TGSI_OPCODE_I642F, result_dst, op[0]);
if (type->is_matrix()) {
const struct glsl_type *vec_type;
- vec_type = glsl_type::get_instance(type->is_double() ? GLSL_TYPE_DOUBLE : GLSL_TYPE_FLOAT,
+ vec_type = glsl_type::get_instance(type->is_double()
+ ? GLSL_TYPE_DOUBLE : GLSL_TYPE_FLOAT,
type->vector_elements, 1);
for (int i = 0; i < type->matrix_columns; i++) {
if (l_src.file == PROGRAM_OUTPUT &&
this->prog->Target == GL_FRAGMENT_PROGRAM_ARB &&
- (l_src.index == FRAG_RESULT_DEPTH || l_src.index == FRAG_RESULT_STENCIL)) {
+ (l_src.index == FRAG_RESULT_DEPTH ||
+ l_src.index == FRAG_RESULT_STENCIL)) {
/* This is a special case because the source swizzles will be shifted
* later to account for the difference between GLSL (where they're
* plain floats) and TGSI (where they're Z and Y components). */
} else if (ir->write_mask == 0) {
assert(!ir->lhs->type->is_scalar() && !ir->lhs->type->is_vector());
- unsigned num_elements = ir->lhs->type->without_array()->vector_elements;
+ unsigned num_elements =
+ ir->lhs->type->without_array()->vector_elements;
if (num_elements) {
l.writemask = u_bit_consecutive(0, num_elements);
for (i = 0; i < ir->type->matrix_columns; i++) {
switch (ir->type->base_type) {
case GLSL_TYPE_FLOAT:
- values = (gl_constant_value *) &ir->value.f[i * ir->type->vector_elements];
+ values = (gl_constant_value *)
+ &ir->value.f[i * ir->type->vector_elements];
src = st_src_reg(file, -1, ir->type->base_type);
src.index = add_constant(file,
emit_asm(ir, TGSI_OPCODE_MOV, mat_column, src);
break;
case GLSL_TYPE_DOUBLE:
- values = (gl_constant_value *) &ir->value.d[i * ir->type->vector_elements];
+ values = (gl_constant_value *)
+ &ir->value.d[i * ir->type->vector_elements];
src = st_src_reg(file, -1, ir->type->base_type);
src.index = add_constant(file,
values,
&src.swizzle);
if (ir->type->vector_elements >= 2) {
mat_column.writemask = WRITEMASK_XY;
- src.swizzle = MAKE_SWIZZLE4(SWIZZLE_X, SWIZZLE_Y, SWIZZLE_X, SWIZZLE_Y);
+ src.swizzle = MAKE_SWIZZLE4(SWIZZLE_X, SWIZZLE_Y,
+ SWIZZLE_X, SWIZZLE_Y);
emit_asm(ir, TGSI_OPCODE_MOV, mat_column, src);
} else {
mat_column.writemask = WRITEMASK_X;
- src.swizzle = MAKE_SWIZZLE4(SWIZZLE_X, SWIZZLE_X, SWIZZLE_X, SWIZZLE_X);
+ src.swizzle = MAKE_SWIZZLE4(SWIZZLE_X, SWIZZLE_X,
+ SWIZZLE_X, SWIZZLE_X);
emit_asm(ir, TGSI_OPCODE_MOV, mat_column, src);
}
src.index++;
if (ir->type->vector_elements > 2) {
if (ir->type->vector_elements == 4) {
mat_column.writemask = WRITEMASK_ZW;
- src.swizzle = MAKE_SWIZZLE4(SWIZZLE_X, SWIZZLE_Y, SWIZZLE_X, SWIZZLE_Y);
+ src.swizzle = MAKE_SWIZZLE4(SWIZZLE_X, SWIZZLE_Y,
+ SWIZZLE_X, SWIZZLE_Y);
emit_asm(ir, TGSI_OPCODE_MOV, mat_column, src);
} else {
mat_column.writemask = WRITEMASK_Z;
- src.swizzle = MAKE_SWIZZLE4(SWIZZLE_Y, SWIZZLE_Y, SWIZZLE_Y, SWIZZLE_Y);
+ src.swizzle = MAKE_SWIZZLE4(SWIZZLE_Y, SWIZZLE_Y,
+ SWIZZLE_Y, SWIZZLE_Y);
emit_asm(ir, TGSI_OPCODE_MOV, mat_column, src);
mat_column.writemask = WRITEMASK_XYZW;
src.swizzle = SWIZZLE_XYZW;
exec_node *param = ir->actual_parameters.get_head();
ir_dereference *deref = static_cast<ir_dereference *>(param);
ir_variable *location = deref->variable_referenced();
-
- st_src_reg buffer(
- PROGRAM_BUFFER, location->data.binding, GLSL_TYPE_ATOMIC_UINT);
-
+ bool has_hw_atomics = st_context(ctx)->has_hw_atomics;
/* Calculate the surface offset */
st_src_reg offset;
unsigned array_size = 0, base = 0;
uint16_t index = 0;
+ st_src_reg resource;
get_deref_offsets(deref, &array_size, &base, &index, &offset, false);
- if (offset.file != PROGRAM_UNDEFINED) {
- emit_asm(ir, TGSI_OPCODE_MUL, st_dst_reg(offset),
- offset, st_src_reg_for_int(ATOMIC_COUNTER_SIZE));
- emit_asm(ir, TGSI_OPCODE_ADD, st_dst_reg(offset),
- offset, st_src_reg_for_int(location->data.offset + index * ATOMIC_COUNTER_SIZE));
+ if (has_hw_atomics) {
+ variable_storage *entry = find_variable_storage(location);
+ st_src_reg buffer(PROGRAM_HW_ATOMIC, 0, GLSL_TYPE_ATOMIC_UINT,
+ location->data.binding);
+
+ if (!entry) {
+ entry = new(mem_ctx) variable_storage(location, PROGRAM_HW_ATOMIC,
+ num_atomics);
+ _mesa_hash_table_insert(this->variables, location, entry);
+
+ atomic_info[num_atomics].location = location->data.location;
+ atomic_info[num_atomics].binding = location->data.binding;
+ atomic_info[num_atomics].size = location->type->arrays_of_arrays_size();
+ if (atomic_info[num_atomics].size == 0)
+ atomic_info[num_atomics].size = 1;
+ atomic_info[num_atomics].array_id = 0;
+ num_atomics++;
+ }
+
+ if (offset.file != PROGRAM_UNDEFINED) {
+ if (atomic_info[entry->index].array_id == 0) {
+ num_atomic_arrays++;
+ atomic_info[entry->index].array_id = num_atomic_arrays;
+ }
+ buffer.array_id = atomic_info[entry->index].array_id;
+ }
+
+ buffer.index = index;
+ buffer.index += location->data.offset / ATOMIC_COUNTER_SIZE;
+ buffer.has_index2 = true;
+
+ if (offset.file != PROGRAM_UNDEFINED) {
+ buffer.reladdr = ralloc(mem_ctx, st_src_reg);
+ *buffer.reladdr = offset;
+ emit_arl(ir, sampler_reladdr, offset);
+ }
+ offset = st_src_reg_for_int(0);
+
+ resource = buffer;
} else {
- offset = st_src_reg_for_int(location->data.offset + index * ATOMIC_COUNTER_SIZE);
+ st_src_reg buffer(PROGRAM_BUFFER, location->data.binding,
+ GLSL_TYPE_ATOMIC_UINT);
+
+ if (offset.file != PROGRAM_UNDEFINED) {
+ emit_asm(ir, TGSI_OPCODE_MUL, st_dst_reg(offset),
+ offset, st_src_reg_for_int(ATOMIC_COUNTER_SIZE));
+ emit_asm(ir, TGSI_OPCODE_ADD, st_dst_reg(offset),
+ offset, st_src_reg_for_int(location->data.offset + index * ATOMIC_COUNTER_SIZE));
+ } else {
+ offset = st_src_reg_for_int(location->data.offset + index * ATOMIC_COUNTER_SIZE);
+ }
+ resource = buffer;
}
ir->return_deref->accept(this);
inst = emit_asm(ir, opcode, dst, offset, data, data2);
}
- inst->resource = buffer;
+ inst->resource = resource;
}
void
ir_rvalue *offset = ((ir_instruction *)param)->as_rvalue();
ir_constant *const_block = block->as_constant();
-
+ int buf_base = st_context(ctx)->has_hw_atomics
+ ? 0 : ctx->Const.Program[shader->Stage].MaxAtomicBuffers;
st_src_reg buffer(
PROGRAM_BUFFER,
- ctx->Const.Program[shader->Stage].MaxAtomicBuffers +
- (const_block ? const_block->value.u[0] : 0),
+ buf_base + (const_block ? const_block->value.u[0] : 0),
GLSL_TYPE_UINT);
if (!const_block) {
if (ir->callee->intrinsic_id == ir_intrinsic_ssbo_load) {
inst = emit_asm(ir, TGSI_OPCODE_LOAD, dst, off);
if (dst.type == GLSL_TYPE_BOOL)
- emit_asm(ir, TGSI_OPCODE_USNE, dst, st_src_reg(dst), st_src_reg_for_int(0));
+ emit_asm(ir, TGSI_OPCODE_USNE, dst, st_src_reg(dst),
+ st_src_reg_for_int(0));
} else if (ir->callee->intrinsic_id == ir_intrinsic_ssbo_store) {
param = param->get_next();
ir_rvalue *val = ((ir_instruction *)param)->as_rvalue();
}
}
- /* If projection is done and the opcode is not TGSI_OPCODE_TXP, then the shadow
- * comparator was put in the correct place (and projected) by the code,
- * above, that handles by-hand projection.
+ /* If projection is done and the opcode is not TGSI_OPCODE_TXP, then the
+ * shadow comparator was put in the correct place (and projected) by the
+ * code, above, that handles by-hand projection.
*/
if (ir->shadow_comparator && (!ir->projector || opcode == TGSI_OPCODE_TXP)) {
/* Slot the shadow value in as the second to last component of the
if (ir->offset) {
if (!inst->tex_offsets)
- inst->tex_offsets = rzalloc_array(inst, st_src_reg, MAX_GLSL_TEXTURE_OFFSET);
+ inst->tex_offsets = rzalloc_array(inst, st_src_reg,
+ MAX_GLSL_TEXTURE_OFFSET);
- for (i = 0; i < MAX_GLSL_TEXTURE_OFFSET && offset[i].file != PROGRAM_UNDEFINED; i++)
+ for (i = 0; i < MAX_GLSL_TEXTURE_OFFSET &&
+ offset[i].file != PROGRAM_UNDEFINED; i++)
inst->tex_offsets[i] = offset[i];
inst->tex_offset_num_offset = i;
}
num_outputs = 0;
num_input_arrays = 0;
num_output_arrays = 0;
+ num_atomics = 0;
+ num_atomic_arrays = 0;
num_immediates = 0;
num_address_regs = 0;
samplers_used = 0;
&& !(inst->dst[0].writemask & prevWriteMask)
&& inst->src[2].file == inst->dst[0].file
&& inst->src[2].index == inst->dst[0].index
- && inst->dst[0].writemask == get_src_arg_mask(inst->dst[0], inst->src[2])) {
+ && inst->dst[0].writemask ==
+ get_src_arg_mask(inst->dst[0], inst->src[2])) {
inst->op = TGSI_OPCODE_MOV;
inst->info = tgsi_get_opcode_info(inst->op);
}
static void
-rename_temp_handle_src(struct rename_reg_pair *renames,
- struct st_src_reg *src)
+rename_temp_handle_src(struct rename_reg_pair *renames, st_src_reg *src)
{
if (src && src->file == PROGRAM_TEMPORARY) {
int old_idx = src->index;
}
if (inst->op == TGSI_OPCODE_BGNLOOP) {
- if(depth++ == 0)
+ if (depth++ == 0)
loop_start = i;
} else if (inst->op == TGSI_OPCODE_ENDLOOP) {
if (--depth == 0)
}
}
if (inst->op == TGSI_OPCODE_BGNLOOP) {
- if(depth++ == 0)
+ if (depth++ == 0)
loop_start = i;
} else if (inst->op == TGSI_OPCODE_ENDLOOP) {
if (--depth == 0)
last_reads[inst->tex_offsets[j].index] = (depth == 0) ? i : -2;
}
if (inst->op == TGSI_OPCODE_BGNLOOP) {
- if(depth++ == 0)
+ if (depth++ == 0)
loop_start = i;
} else if (inst->op == TGSI_OPCODE_ENDLOOP) {
if (--depth == 0) {
write_level[4 * r + c] = level-1;
}
}
- if(inst->op == TGSI_OPCODE_ENDIF)
+ if (inst->op == TGSI_OPCODE_ENDIF)
--level;
break;
defined = 0;
inst2 = (glsl_to_tgsi_instruction *) inst->next;
- do {
+ while (!inst2->is_tail_sentinel()) {
if (inst->op == inst2->op &&
inst2->dst[defined].file == PROGRAM_UNDEFINED &&
inst->src[0].file == inst2->src[0].file &&
inst->src[0].swizzle == inst2->src[0].swizzle)
break;
inst2 = (glsl_to_tgsi_instruction *) inst2->next;
- } while (inst2);
+ }
- if (!inst2) {
+ if (inst2->is_tail_sentinel()) {
/* Undefined destinations are not allowed, substitute with an unused
* temporary register.
*/
void
glsl_to_tgsi_visitor::merge_registers(void)
{
- assert(need_uarl);
struct lifetime *lifetimes =
rzalloc_array(mem_ctx, struct lifetime, this->next_temp);
struct ureg_src buffers[PIPE_MAX_SHADER_BUFFERS];
struct ureg_src images[PIPE_MAX_SHADER_IMAGES];
struct ureg_src systemValues[SYSTEM_VALUE_MAX];
+ struct ureg_src hw_atomics[PIPE_MAX_HW_ATOMIC_BUFFERS];
struct ureg_src shared_memory;
unsigned *array_sizes;
struct inout_decl *input_decls;
static struct ureg_src
emit_immediate(struct st_translate *t,
gl_constant_value values[4],
- int type, int size)
+ GLenum type, int size)
{
struct ureg_program *ureg = t->ureg;
- switch(type)
- {
+ switch (type) {
case GL_FLOAT:
return ureg_DECL_immediate(ureg, &values[0].f, size);
case GL_DOUBLE:
{
unsigned array;
- switch(file) {
+ switch (file) {
case PROGRAM_UNDEFINED:
return ureg_dst_undef();
return t->outputs[t->outputMapping[index]];
}
else {
- struct inout_decl *decl = find_inout_array(t->output_decls, t->num_output_decls, array_id);
+ struct inout_decl *decl =
+ find_inout_array(t->output_decls,
+ t->num_output_decls, array_id);
unsigned mesa_index = decl->mesa_index;
int slot = t->outputMapping[mesa_index];
int index = src_reg->index;
int double_reg2 = src_reg->double_reg2 ? 1 : 0;
- switch(src_reg->file) {
+ switch (src_reg->file) {
case PROGRAM_UNDEFINED:
src = ureg_imm4f(t->ureg, 0, 0, 0, 0);
break;
case PROGRAM_TEMPORARY:
case PROGRAM_ARRAY:
- src = ureg_src(dst_register(t, src_reg->file, src_reg->index, src_reg->array_id));
+ src = ureg_src(dst_register(t, src_reg->file, src_reg->index,
+ src_reg->array_id));
break;
case PROGRAM_OUTPUT: {
- struct ureg_dst dst = dst_register(t, src_reg->file, src_reg->index, src_reg->array_id);
+ struct ureg_dst dst = dst_register(t, src_reg->file, src_reg->index,
+ src_reg->array_id);
assert(dst.WriteMask != 0);
unsigned shift = ffs(dst.WriteMask) - 1;
src = ureg_swizzle(ureg_src(dst),
src = t->inputs[t->inputMapping[index] + double_reg2];
}
else {
- struct inout_decl *decl = find_inout_array(t->input_decls, t->num_input_decls,
+ struct inout_decl *decl = find_inout_array(t->input_decls,
+ t->num_input_decls,
src_reg->array_id);
unsigned mesa_index = decl->mesa_index;
int slot = t->inputMapping[mesa_index];
src = t->systemValues[src_reg->index];
break;
+ case PROGRAM_HW_ATOMIC:
+ src = ureg_src_array_register(TGSI_FILE_HW_ATOMIC, src_reg->index,
+ src_reg->array_id);
+ break;
+
default:
assert(!"unknown src register file");
return ureg_src_undef();
int num_dst;
int num_src;
- unsigned tex_target = 0;
+ enum tgsi_texture_type tex_target;
num_dst = num_inst_dst_regs(inst);
num_src = num_inst_src_regs(inst);
for (i = 0; i < num_src; i++)
src[i] = translate_src(t, &inst->src[i]);
- switch(inst->op) {
+ switch (inst->op) {
case TGSI_OPCODE_BGNLOOP:
case TGSI_OPCODE_ELSE:
case TGSI_OPCODE_ENDLOOP:
src[0] = t->shared_memory;
} else if (inst->resource.file == PROGRAM_BUFFER) {
src[0] = t->buffers[inst->resource.index];
+ } else if (inst->resource.file == PROGRAM_HW_ATOMIC) {
+ src[0] = translate_src(t, &inst->resource);
} else if (inst->resource.file == PROGRAM_CONSTANT) {
assert(inst->resource.has_index2);
src[0] = ureg_src_register(TGSI_FILE_CONSTBUF, inst->resource.index);
* where T = INPUT[WPOS] is inverted by Y.
*/
struct ureg_src wpostrans = ureg_DECL_constant(ureg, wpos_transform_const);
- struct ureg_dst wpos_temp = ureg_DECL_temporary( ureg );
+ struct ureg_dst wpos_temp = ureg_DECL_temporary(ureg);
struct ureg_src *wpos =
ctx->Const.GLSLFragCoordIsSysVal ?
&t->systemValues[SYSTEM_VALUE_FRAG_COORD] :
} else {
/* MOV wpos_temp, input[wpos]
*/
- ureg_MOV( ureg, wpos_temp, wpos_input );
+ ureg_MOV(ureg, wpos_temp, wpos_input);
}
/* Now the conditional y flip: STATE_FB_WPOS_Y_TRANSFORM.xy/zw will be
if (invert) {
/* MAD wpos_temp.y, wpos_input, wpostrans.xxxx, wpostrans.yyyy
*/
- ureg_MAD( ureg,
- ureg_writemask(wpos_temp, TGSI_WRITEMASK_Y ),
- wpos_input,
- ureg_scalar(wpostrans, 0),
- ureg_scalar(wpostrans, 1));
+ ureg_MAD(ureg,
+ ureg_writemask(wpos_temp, TGSI_WRITEMASK_Y),
+ wpos_input,
+ ureg_scalar(wpostrans, 0),
+ ureg_scalar(wpostrans, 1));
} else {
/* MAD wpos_temp.y, wpos_input, wpostrans.zzzz, wpostrans.wwww
*/
- ureg_MAD( ureg,
- ureg_writemask(wpos_temp, TGSI_WRITEMASK_Y ),
- wpos_input,
- ureg_scalar(wpostrans, 2),
- ureg_scalar(wpostrans, 3));
+ ureg_MAD(ureg,
+ ureg_writemask(wpos_temp, TGSI_WRITEMASK_Y),
+ wpos_input,
+ ureg_scalar(wpostrans, 2),
+ ureg_scalar(wpostrans, 3));
}
/* Use wpos_temp as position input from here on:
std::sort(decls, decls + count, sorter);
}
-static unsigned
+static enum tgsi_interpolate_mode
st_translate_interp(enum glsl_interp_mode glsl_qual, GLuint varying)
{
switch (glsl_qual) {
assert(numInputs <= ARRAY_SIZE(t->inputs));
assert(numOutputs <= ARRAY_SIZE(t->outputs));
+ ASSERT_BITFIELD_SIZE(st_src_reg, type, GLSL_TYPE_ERROR);
+ ASSERT_BITFIELD_SIZE(st_dst_reg, type, GLSL_TYPE_ERROR);
+ ASSERT_BITFIELD_SIZE(glsl_to_tgsi_instruction, tex_type, GLSL_TYPE_ERROR);
+ ASSERT_BITFIELD_SIZE(glsl_to_tgsi_instruction, image_format, PIPE_FORMAT_COUNT);
+ ASSERT_BITFIELD_SIZE(glsl_to_tgsi_instruction, tex_target,
+ (gl_texture_index) (NUM_TEXTURE_TARGETS - 1));
+ ASSERT_BITFIELD_SIZE(glsl_to_tgsi_instruction, image_format,
+ (enum pipe_format) (PIPE_FORMAT_COUNT - 1));
+ ASSERT_BITFIELD_SIZE(glsl_to_tgsi_instruction, op, TGSI_OPCODE_LAST - 1);
+
t = CALLOC_STRUCT(st_translate);
if (!t) {
ret = PIPE_ERROR_OUT_OF_MEMORY;
tgsi_usage_mask = TGSI_WRITEMASK_XYZW;
}
- unsigned interp_mode = 0;
- unsigned interp_location = 0;
+ enum tgsi_interpolate_mode interp_mode = TGSI_INTERPOLATE_CONSTANT;
+ enum tgsi_interpolate_loc interp_location = TGSI_INTERPOLATE_LOC_CENTER;
if (procType == PIPE_SHADER_FRAGMENT) {
assert(interpMode);
interp_mode = interpMode[slot] != TGSI_INTERPOLATE_COUNT ?
- interpMode[slot] :
+ (enum tgsi_interpolate_mode) interpMode[slot] :
st_translate_interp(decl->interp, inputSlotToAttr[slot]);
- interp_location = decl->interp_loc;
+ interp_location = (enum tgsi_interpolate_loc) decl->interp_loc;
}
src = ureg_DECL_fs_input_cyl_centroid_layout(ureg,
(void) pscreen;
if (!ctx->Const.NativeIntegers) {
struct ureg_dst temp = ureg_DECL_local_temporary(t->ureg);
- ureg_U2F( t->ureg, ureg_writemask(temp, TGSI_WRITEMASK_X), t->systemValues[i]);
+ ureg_U2F(t->ureg, ureg_writemask(temp, TGSI_WRITEMASK_X),
+ t->systemValues[i]);
t->systemValues[i] = ureg_scalar(ureg_src(temp), 0);
}
}
/* texture samplers */
for (i = 0; i < frag_const->MaxTextureImageUnits; i++) {
if (program->samplers_used & (1u << i)) {
- unsigned type = st_translate_texture_type(program->sampler_types[i]);
+ enum tgsi_return_type type =
+ st_translate_texture_type(program->sampler_types[i]);
t->samplers[i] = ureg_DECL_sampler(ureg, i);
- ureg_DECL_sampler_view( ureg, i, program->sampler_targets[i],
- type, type, type, type );
+ ureg_DECL_sampler_view(ureg, i, program->sampler_targets[i],
+ type, type, type, type);
}
}
{
struct gl_program *prog = program->prog;
- for (i = 0; i < prog->info.num_abos; i++) {
- unsigned index = prog->sh.AtomicBuffers[i]->Binding;
- assert(index < frag_const->MaxAtomicBuffers);
- t->buffers[index] = ureg_DECL_buffer(ureg, index, true);
+ if (!st_context(ctx)->has_hw_atomics) {
+ for (i = 0; i < prog->info.num_abos; i++) {
+ unsigned index = prog->sh.AtomicBuffers[i]->Binding;
+ assert(index < frag_const->MaxAtomicBuffers);
+ t->buffers[index] = ureg_DECL_buffer(ureg, index, true);
+ }
+ } else {
+ for (i = 0; i < program->num_atomics; i++) {
+ struct hwatomic_decl *ainfo = &program->atomic_info[i];
+ gl_uniform_storage *uni_storage = &prog->sh.data->UniformStorage[ainfo->location];
+ int base = uni_storage->offset / ATOMIC_COUNTER_SIZE;
+ ureg_DECL_hw_atomic(ureg, base, base + ainfo->size - 1, ainfo->binding,
+ ainfo->array_id);
+ }
}
assert(prog->info.num_ssbos <= frag_const->MaxShaderStorageBlocks);
for (i = 0; i < prog->info.num_ssbos; i++) {
- unsigned index = frag_const->MaxAtomicBuffers + i;
+ unsigned index = i;
+ if (!st_context(ctx)->has_hw_atomics)
+ index += frag_const->MaxAtomicBuffers;
+
t->buffers[index] = ureg_DECL_buffer(ureg, index, false);
}
}
_mesa_copy_linked_program_data(shader_program, shader);
shrink_array_declarations(v->inputs, v->num_inputs,
&prog->info.inputs_read,
- prog->info.double_inputs_read,
+ prog->info.vs.double_inputs_read,
&prog->info.patch_inputs_read);
shrink_array_declarations(v->outputs, v->num_outputs,
&prog->info.outputs_written, 0ULL,
struct pipe_screen *pscreen = ctx->st->pipe->screen;
assert(prog->data->LinkStatus);
+ bool use_nir = false;
for (unsigned i = 0; i < MESA_SHADER_STAGES; i++) {
if (prog->_LinkedShaders[i] == NULL)
continue;
unsigned if_threshold = pscreen->get_shader_param(pscreen, ptarget,
PIPE_SHADER_CAP_LOWER_IF_THRESHOLD);
+ enum pipe_shader_ir preferred_ir = (enum pipe_shader_ir)
+ pscreen->get_shader_param(pscreen, ptarget,
+ PIPE_SHADER_CAP_PREFERRED_IR);
+ if (preferred_ir == PIPE_SHADER_IR_NIR)
+ use_nir = true;
+
/* If there are forms of indirect addressing that the driver
* cannot handle, perform the lowering pass.
*/
build_program_resource_list(ctx, prog);
+ if (use_nir)
+ return st_link_nir(ctx, prog);
+
for (unsigned i = 0; i < MESA_SHADER_STAGES; i++) {
struct gl_linked_shader *shader = prog->_LinkedShaders[i];
if (shader == NULL)
continue;
- enum pipe_shader_type ptarget =
- pipe_shader_type_from_mesa(shader->Stage);
- enum pipe_shader_ir preferred_ir = (enum pipe_shader_ir)
- pscreen->get_shader_param(pscreen, ptarget,
- PIPE_SHADER_CAP_PREFERRED_IR);
-
- struct gl_program *linked_prog = NULL;
- if (preferred_ir == PIPE_SHADER_IR_NIR) {
- linked_prog = st_nir_get_mesa_program(ctx, prog, shader);
- } else {
- linked_prog = get_mesa_program_tgsi(ctx, prog, shader);
- st_set_prog_affected_state_flags(linked_prog);
- }
+ struct gl_program *linked_prog =
+ get_mesa_program_tgsi(ctx, prog, shader);
+ st_set_prog_affected_state_flags(linked_prog);
if (linked_prog) {
if (!ctx->Driver.ProgramStringNotify(ctx,
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